ANADIGICS AWT921

AWT921
900 MHz Integrated Power Amp
Data Sheet - Rev 2.0
FEATURES
•
High Power Levels
•
High Efficiency
•
True Surface Mount Package With Integrated
Heat Slug
•
Internal Bias Circuit Requiring Nominal Input
Voltages +10%
•
Low Cost
•
Off Chip Output Matching Circuit Allows
Application Optimization
APPLICATIONS
•
Base Station Driver Amplifier
•
u-Cell Base Station Output Stage
•
Cellular Booster Amplifier
S11
SSOP-28
28 Pin Wide Body w/ Heat Slug
PRODUCT DESCRIPTION
manufactured on a high power MESFET process
and has an on-chip bias circuit that does not require
highly regulated positive and negative supplies to
establish the proper operating point.
The AWT921 is a monolithic amplifier for use in
communication systems that require high gain and
output intercept point. This device has been
specifically designed for multi-carrier and micro-cell
base station applications. This device is
Vd1
Vd2
Bypass
RFC
Vd3
Bypass
Bypass
RFC
RFC
RFout
RFin
M1
M3
M2
Bias Network
Vg3
Vss
On Chip
Rref
Vg1
Vg2
Vref
Vdd
Figure 1: Block Diagram
09/2003
AWT921
Figure 2: Pinout (X-Ray Top View)
Table 1: Pin Description
2
PIN
NAME
DESCRIPTION
1,14,15
28, slug
GND
2
VGS1
First Stage Gate Terminal
3
V DD
Positive Supply of Bias Circuit
4
RFIN
RF Input
5,6
V D1
First Stage Drain Supply
7,8
GND
First Stage Source Ground
9,10
V D2
Second Stage Drain Supply
11
VREF
Bias Control Pin
12
V SS
Negative Supply for Bias Circuit
13
VGS2
Second Stage Gate Terminal
16,17
VGS3
Third Stage Gate Terminal
18-25
V D3
Third stage Drain Supply & RFOUT
26,27
N/C
Not Connected
AC and RF Ground
Data Sheet - Rev 2.0
09/2003
AWT921
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
PARAMETER
MIN
MAX
UNIT
V DD
0
+7
V DC
RFIN
0
+20
dB m
1st Stage Supply (VD1)
0
+10
V DC
2nd Stage Supply (VD2)
0
+10
V DC
3rd Stage Voltage (VD3)
0
+10
V DC
Negative Supply (VSS)
-7
0
V DC
Reference Voltage (VREF)
0
+7
V DC
Storage Temperature
-55
+100
°C
Operating Temperature
-30
+85
°C
Stresses in excess of the absolute ratings may cause permanent
damage. Functional operation is not implied under these conditions.
Exposure to absolute ratings for extended periods of time may
adversely affect reliability.
Table 3: Operating Ranges
PARAMETER
MIN
TYP
MAX
UNIT
Operating Frequency
925
-
960
MHz
RFIN
0
-
+14
dB m
1st Stage Supply (VD1)
0
+8.5
+9
V DC
2nd Stage Supply (VD2)
0
+8.5
+9
V DC
3rd Stage Voltage (VD3)
0
+8.5
+9
V DC
Reference Voltage (VREF)
0
+5
+7
V DC
Negative Supply (VSS)
-7
-3
-2.7
V DC
Operating Temperature
-30
-
+85
°C
The device may be operated safely over these conditions; however, parametric
performance is guaranteed only over the conditions defined in the electrical
specifications.
Data Sheet - Rev 2.0
09/2003
3
AWT921
Table 4: Electrical Specifications (1)
( Pin = +12dBm, fo = 925-960 MHz, Vds1=Vds2=Vds3=8.5V, VSS = -5 V,
VREF = +25 V, VDD = +5 V, TC = +25 °C, 50 Ω system(2) )
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
fo
925
-
960
MHz
Power Output
POUT
-
+39
-
dB m
Power Added Efficiency
ηEFF
-
40
-
%
PG
-
27
31
-
dB
-
37
47
50
-
dB c
Frequency
Gain
@POUT = +39 dBm
@POUT = +30 dBm
Harmonics
2nd
3rd
4th
(3)
-
-
3:1
-
VSWR
load, all
phase
angles
Bias Supply Currents
I SS
I REF
I DD
-
8
1.2
8
-
mA
Quiescent Currents
IDQ1
IDQ2
IDQ3
-
100
250
200
-
mA
-
10
-
-
dB
∆PG
0.5
0.5
-
-
dB
-
4.5
-
C/W
Stability: -60 dBc all
spurious outputs relative to
desired signal
Input Return Loss
Gain Flatness
@ POUT = +39dBm
@ POUT = +30 dBm
Thermal Resistance
(4)
Notes:
(1) As measured in ANADIGICS test fixture, see application section.
(2) 50 Ω Measurement system after off chip matching circuit, input terminated in 50 Ω.
(3) Measured at POUT =+ 39 dBm.
(4) Thermal resistance for junction to bottom of slug. Θjc = (Tj-Tc)/((ID1+ID2 +ID3)*VSUP - POUT)
4
Data Sheet - Rev 2.0
09/2003
AWT921
PERFORMANCE DATA
Figure 4: Output Power and Power Added
Efficiency vs. Frequency
Figure 3: Output Power and Power Added
Efficiency vs. Pin
40
100
43
60
42
38
50
80
60
34
40
32
20
Pout (dBm)
36
PAE (%)
Pout (dBm)
41
40
40
39
30
38
20
37
10
36
30
0.0
2.0
4.0
6.0
8.0
10.0
0
14.0
12.0
35
920
925
930
935
Pin (dBm)
Pout
Pout
50.0
39
40.0
38
30.0
37
20.0
36
10.0
500
400
300
200
100
Vds1=Vds2=Vds3
35
0
0.0
9
10
0
11
1
2
3
150
4
5
6
7
8
9
Vref (V)
Supply Voltage (V)
Pout
PAE
600
Pout
Idq3 (dBm)
(mA)
40
8
0
960
955
700
PAE (%)
Pout (dBm)
60.0
7
950
Figure 6: Third Stage Quiescent Current vs.
Reference Voltage with Various RREF
41
6
945
Freq (MHz)
PAE
Figure 5: Output Power and PAE vs.
Supply Voltage
5
940
Rref=1.5KOhms
PAE
Figure 7: Third Stage Quiescent Current
vs. VDD, RREF = 1.8 KW
500
Rref=3KOhms
Rref=6KOhms
Figure 8: Third Stage Quiescent Current
vs. VSS, RREF = 1.8 KW
450
100
Idq3 (mA)
Idq3 (mA)
400
50
350
300
250
200
150
100
50
0
0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
-7
-6
-5
-4
Vdd (V)
Vss (V)
Idq3
Idq3
Data Sheet - Rev 2.0
09/2003
-3
-2
-1
5
AWT921
Figure 9: Small Signal Gain, Saturated Power,
and Efficiency vs. Temperature
40
Figure 10: Third Stage Quiescent Current,
Reference Current vs. Temperature
60
450
3
36
40
34
30
32
20
2.5
350
300
2
250
1.5
200
150
Iref (mA)
50
PAE (%)
38
Iq3 (mA)
Pout (dBm), Gain (dB)
400
1
100
30
10
28
0
-30 -20 -10
0
10
20
30
40
50
60
70
80
0.5
50
0
0
-30 -20 -10
90
0
SS Gain
1
.5
CH-1S11
REFERENCE PLANE
16.2900 cm
2
1
.2
.5
1
2
50
80
90
Figure 12: Test Circuit Impedance Presented to
the Second Stage Drain (Vd2)
S11 FORWARD REFLECTION
IMPEDANCE
1
CH-1S11
REFERENCE PLANE
16.2900 cm
2
MARKER TO MAX
MARKER TO MIN
1
MARKER 1
0.926500000 GHz
16.486
181.822 j
2
5
.2
0
.2
.5
1
MARKER TO MAX
MARKER TO MIN
2 0.959750000 GHz
19.628
205.440 j
5
2
-5
-5
-.2
-.5
-2
-2
-.5
MARKER READOUT
FUNCTIONS
-1
0.100000000 -
2.000000000 GHz
-1
0.100000000 -
Figure 13: Test Circuit Impedance Presented to
the Third Stage Drain (Vd3)
S11 FORWARD REFLECTION
IMPEDANCE
1
CH-1S11
REFERENCE PLANE
16.2900 cm
2
.5
MARKER 1
0.926500000 GHz
3.233
-1.131 j
5
.2
.2
.5
1
5
2
MARKER TO MAX
MARKER TO MIN
2 0.959750000 GHz
3.045
-344.163 jm
21
-5
-.2
-2
-.5
-1
0.100000000 -
6
70
2 0.959750000 GHz
9.834
126.385 j
5
-.2
0
60
Iref
MARKER 1
0.926500000 GHz
8.126
114.075 j
5
0
40
.5
2
.2
30
Iq3
PAE
Figure 11: Test Circuit Impedance Presented to
the First Stage Drain (Vd1)
S11 FORWARD REFLECTION
IMPEDANCE
20
Temperature (C)
Temperature (C)
Pout
10
2.000000000 GHz
MARKER READOUT
FUNCTIONS
Data Sheet - Rev 2.0
09/2003
2.000000000 GHz
MARKER READOUT
FUNCTIONS
AWT921
APPLICATION INFORMATION
F2
L2
C19
C1
F1
L3
C5
C4
AWT921S11
9
10
5
6
4
C6
RFIN
VD2
25
24
VD1
7
8
GND
11
3
12
VREF
VDD
VSS
C7
C8
VG1
VG2
GND
VG3
2
13
16
17
L1
R4
R1
C11
VD1
C9
R2
C12
C15
F3
C10
SLUG
1
14
15
28
V DD/V REF
RF OUT
C13
19
18
RREF
V D2
C17
23
22
21
20
VD3
RF IN
C14
F4
V SS
C16
V G3
VD3
GND
Figure 14: Application Circuit Schematic
Table 5: Application Circuit Component Values
(925-960 MHz GSM Application)
DESIGNATION
VALUE
DESIGNATION
VALUE
R1
7500 Ω
C10, C11
2700 pF
R2
2.2 KΩ
C 13
11 pF
RREF
1.8 KΩ
C 14
4700 pF
C 1, C 5, C 16
2.2 µF
L1
8 nH Colicraft, A03T
C 4, C 15, C 19
33 pF
L2
12 nH
C 6, C 17
47 pF
L3
6 nH
C 7, C 8, C 9, C 12
0.01 µF
F 1, F 2, F 3, F 4,
Ferrite 47 Ω @ 100
MHz, 1A Rating Taiyo
Yuden, BK2125HS470
Data Sheet - Rev 2.0
09/2003
7
AWT921
PACKAGE OUTLINE
Figure 15: S11 Package Outline - 28 Pin SSOP 28 Thermal Slug Package
Figure 16: Branding Specification
8
Data Sheet - Rev 2.0
09/2003
AWT921
COMPONENT PACKAGING
Figure 17: Tape & Reel Drawing
Table 6: Tape & Reel Dimensions
PACKAGE TYPE
TAPE WIDTH
POCKET PITCH
REEL CAPACITY
MAX REEL DIA
SSOP-28 WIDE
BODY
0.630 INCHES
0.472 INCHES
3500
13 INCHES
Data Sheet - Rev 2.0
09/2003
9
AWT921
NOTES
10
Data Sheet - Rev 2.0
09/2003
AWT921
NOTES
Data Sheet - Rev 2.0
09/2003
11
AWT921
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
E-mail: Mktg@anadigics.com
IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without
notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are
subject to change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are
assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges
customers to verify that the information they are using is current before placing orders.
WARNING
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS
product in any such application without written consent is prohibited.
12
Data Sheet - Rev 2.0
09/2003