P R E L I M I N A R Y OM9369CM FULL-FEATURED POWER MODULE FOR HIGH-VOLTAGE DIRECT DRIVE OF 3-PHASE BRUSHLESS DC MOTORS 25 Amp. Push-Pull 3-Phase Brushless DC Motor Controller/Driver Module in a Ceramic-to-Metal Sealed Module FEATURES • Fully integrated 3-Phase Brushless DC Motor Control Subsystem includes power stage, non-isolated driver stage, and controller stage • Rugged IGBT Power Output Stage with Soft Recovery Diode • 25A Average Phase Current with 300V Maximum Bus Voltage • Internal Precision Current Sense Resistor (6W max. dissipation) • Speed and Direction Control of Motor • Brake Input for Dynamic Braking of Motor • Overvoltage/Coast Input for Shutdown of All Power Switches • Soft Start for Safe Motor Starting • Unique Lightweight Hermetic Ceramic-to-Metal Sealed Module (CERMOD • (4.255" x 2.475" x .74") TM) APPLICATIONS • Fans and Pumps • Hoists • Actuator Systems DESCRIPTION The OM9369CM is one of a series of versatile, integrated three-phase brushless DC motor controller/driver subsystems housed in a CERMOD TM. The OM9369CM is best used as a two quadrant speed controller for controlling/driving fans, pumps, and motors in applications which require small size. Typical size brushless DC motors that the OM9369CM can effectively control range from fractional HP up to several HP. The OM9369CM is ideal for use on DC distribution busses up to and including 270Vdc. Many integral control features provide the user much flexibility in adapting the OM9369CM to specific system requirements. The small size of the complete subsystem is ideal for aerospace, military, and high-end industrial applications. 8 10 R2 Supersedes 6 11 R1 205 Crawford Street, Leominster, MA 01453 USA (978) 534-5776 FAX (978) 537-4246 Visit Our Web Site at www.omnirel.com OM9369CM VCC (1) Delay (2) SIMPLIFIED BLOCK DIAGRAM Vcc Delay Startup Circuit Delay Ground (20) EA1- (3) - R/C V_Ref Vcc V_Motor (B) 11 + 19 EA1+ (5) + EA2- (7) - 25 PDA VREF PUB 8 H2 PDB 10 Hall_3 (21) R/C Quad_Sel (15) Quad_Sel OV_Coast (18) OV_Coast Quad_Sel 22 OV_Coast 23 I_Sense (12) QUAD_SEL ISH ISH 4 ISL (14) ISL ISL 5 Tach_Out (16) Tach_Out RC_Brake (17) RC_Brake with Bootstrap and Charge Pump PUC 16 High-Side/ Low-Side Drivers OV_COAST SSTART PDC 3 ISH (13) Phase_B (D) 13 RC_BRAKE 24 SStart High-Side/ Low-Side Drivers Phase_A (E) DIR 21 RC_Brake 17 H3 6 Direction (25) with Bootstrap and Charge Pump H1 9 Hall_2 (22) 14 E/A_IN(-) 2 Hall_1 (23) High-Side/ Low-Side Drivers PWM_IN 28 V_Ref +5V_Ref (6) 18 E/A_OUT 26 SStart PUA E/A_IN(+) 27 PWM_In (10) Speed_In (24) GND 1 Osc (11) SStart (19) RC_OSC 15 EA2_Out (8) VCC EA2+ (4) PWR_VCC EA1_Out (9) 12 Phase_C (C) with Bootstrap and Charge Pump ISENSE ISENSE_1 ISENSE_2 7 SPEED_IN TACH_OUT 20 R_Sense Tach_Out Pwr_Gnd (A) UC1625 CSH (26) Filter CSL (27) COMMUTATION TRUTH TABLE DIGITAL INPUTS This table shows the Phase Output state versus the state of the Hall-Effect and Direction Inputs. Please note that the OM9369CM Hall-Effect Inputs are Grey-encoded; that is, only one input is allowed to change from one input state to another at a time. The commutation coding shown reflects HallEffect sensors that are spaced at 120° mechanical increments. Also, internal protection logic disables all three Phase Outputs when the Hall-Effect Inputs are set to an illegal condition (i.e. all logic low or all logic high). PHASE OUTPUTS Dir H1 H2 H3 A B C 1 1 1 1 1 1 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 0 1 1 0 0 0 Hi-Z Sink Sink Hi-Z Source Source Sink Sink Hi-Z Source Sink Hi-Z Source Source Hi-Z Sink Source Hi-Z Sink Sink Source Source Hi-Z Sink Sink Hi-Z Hi-Z Source Source Hi-Z 0 0 0 0 1 0 1 1 Source Hi-Z Hi-Z Source Sink Sink X 0 0 0 Hi-Z Hi-Z Hi-Z X 1 1 1 Hi-Z Hi-Z Hi-Z 2.1 - 2 OM9369CM ABSOLUTE MAXIMUM RATINGS Motor Supply Voltage, Vm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 Vdc Peak Motor Supply Voltage Vm pK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 Vdc Average Phase Output Current, Io . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Amperes DC* Peak Phase Output Current, Iom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Amperes Peak** Control Supply Voltage, Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18 V Logic Input Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +8 V Reference Source Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -30 mAdc Error Amplifier Input Voltage Range, (EA1+/EA1-) . . . . . . . . . . . . . . . . . . . . -0.3 Vdc to 10 Vdc Error Amplifier Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±8 mAdc Spare Amplifier Input Voltage (EA2+/EA2-). . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 Vdc to 10 Vdc Spare Amplifier Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±8 mAdc Current Sense Amplifier Input Voltage (ISH/ISL) . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6 Vdc Current Sense Amplifier Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mAdc Tachometer Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mAdc PWM Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.3 Vdc to +6 Vdc Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +150° C Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65° C to +150° C Power Switch Junction-to-Case Thermal Resistance, Rθjc. . . . . . . . . . . . . . . . . . . . . . 0.48°C/W Package Isolation Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 Vrms Lead Soldering Temperature . . . . . . . . . . . . . 300°C, 10 seconds maximum, 0.125” from case * Tcase = 25° C ** Tcase = 25° C, Maximum pulse width = 10mSec RECOMMENDED OPERATING CONDITIONS (Tcase = 25° C) Motor Power Supply Voltage, Vm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + 2 7 0 Vdc Average Phase Output Current, IO With Internal Current Sense Resistor (Note 2) Each Power Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 A Control Supply Voltage, Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Vdc ±10% Logic Low Input Voltage, Vil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8 Vdc (max) Logic High Input Voltage, Vih . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.0 Vdc (min) Note 1: Logic Inputs: Direction, Hall Inputs (H1...H3) Overvoltage - Coast, Speed, and Quad Select. Note 2: The internal 5mΩ current sense resistor is limited to 6 Wdc power dissipation. Other values are available. Please contact the factory for more information. 2.1 - 3 ELECTRICAL CHARACTERISTICS PARAMETER Power Output Section IGBT Leakage Current SYMBOL IGBT c-e Saturation Voltage Vce(sat) Diode Leakage Current Diode Forward Voltage Diode Reverse Recovery Time Ir Vf trr Ices OM9369CM CONDITIONS (NOTE 1) MIN. TYP. Vce = 600Vdc Vge = 0V Ic = 50Adc Vge = 15V Vr = 600Vdc If = 37A Io = 1A, di/dt = -100A/usec, Vr = 30V MAX. UNITS 300 uA 3.2 V 100 1.7 50 uA V ns 100 mA V V 5.1 5.3 30 Control Section Control Supply Current Control Turn-On Threshold Driver Turn-On Threshold Icc Vcc(+) Vcc(+) Vcc over operating range Tc over operating range Tc over operating range 9.45 13.0 Reference Section Output Voltage Output Voltage Output Current Load Regulation Short Circuit Current Vref Vref Io Isc Tc over operating range Iload = 0mA to -20mA Tc over operating range 4.9 4.7 ---40 50 5.0 5.0 ---5 100 150 V V mA mV mA -30 -3 0 nA -50 -45 0 nA 7 6 mV V Error Amplifier / Spare Amplifier Sections EA1 / EA2 Input Offset Current Ios EA1 / EA2 Input Bias Current Iin Input Offset Voltage Amplifier Output Voltage Range Vos -- V(pin 3) = V(pin 5) = 0V V(pin 4) = V(pin 7) = 0V V(pin 3) = V(pin 5) = 0V V(pin 4) = V(pin 7) = 0V 0V < Vcommon-mode < 3V 0 PWM Comparator Section PWM Input Current Iin V(pin 10) = 2.5V 0 3.0 30 uA V(pin 13) = V(pin 14) = 0V V(pin 13) = V(pin 14) = 0V V(pin 13) = 0V, V(pin 14) Varied to Threshold V(pin 13) = 0V, V(pin 14) Varied to Threshold (Note 2) V(pin 13) = 0.3V, V(pin 14) = 0.5V to 0.7V V(pin 13) = V(pin 14) = 0.3V -850 0.14 -320 +/-2 0.20 0 +/-12 0.26 uA uA V 0.26 0.30 0.36 V -1 1.75 1.95 2 2.15 V V/V 2.4 2.5 2.65 V Current-Sense Amplifier Section ISH / ISL Input Current Input Offset Current Peak Current Threshold Voltage Iin Ios Vpk Over Current Threshold Voltage Voc ISH / ISL Input Voltage Range Amplifier Voltage Gain -Av Amplifier Level Shift -- Logic Input Section H1, H2, H3 Low Voltage Threshold H1, H2, H3 High Voltage Threshold H1, H2, H3 Input Current Vil Vih Iin Tc over operating range Tc over operating range Tc over operating range, V(pin 21, 22 or 23) = 0Vdc 0.8 1.6 -400 1.0 1.9 -250 1.2 2.0 -120 V V uA Quad Select / Direction Threshold Voltage Quad Select Voltage Hysteresis Direction Voltage Hysteresis Quad Select Input Current Direction Input Current Vth Vh Vh Iin Iin Tc over operating range 0.8 2.0 -30 -30 1.4 70 0.6 50 -1 150 30 V mV V uA uA Tc over operating range 1.65 1.75 1.85 V Tc over operating range 1.55 0.05 -10 1.65 0.10 -1 1.75 0.15 0 V V uA Overvoltage / Coast Input Section Overvoltage / Coast Inhibit Threshold Voltage Vth Overvoltage / Coast Restart Threshold Voltage Vth Overvoltage / Coast Hysteresis Voltage Vh Overvoltage / Coast Input Current Iin 2.1 - 4 OM9369CM Parameter Symbol MIN. TYP. MAX. Units V(pin 19) = 0V V(pin 19) = 2.5V -16 0.1 0.1 -10 0.4 0.2 -5 3.0 0.3 uA mA V Voh Tc over operating range 4.7 5.0 5.3 V Tachometer Output Low Level Vol (Pin 16) 10kΩ to 2.5 V Tc over operating range (Pin 16) 10kΩ to 2.5 V Tachometer On-Time Tachometer On-Time Variation Brake/Tach Timing Input Current Brake/Tach Timing Threshold Voltage Brake/Tach Timing Voltage Hysteresis Speed Input Threshold Voltage Speed Input Current ton -Iin 85 0.2 140 Tc over operating range V (pin 17) = oV -4.0 100 0.1 -1.9 V us % mA Vth Tc over operating range 0.8 1.0 1.2 V Vh Vth Iin Tc over operating range 220 -30 0.09 257 -5 290 30 V mV uA Measured at pin 11 13.5 14.8 20.0 kHz Soft-Start Section Soft-Start Pull-Up Current Soft-Start Discharge Current Soft-Start Reset Threshold Voltage Ip Id Vth Tachometer/Brake Section Tachometer Output High Level Oscillator Section Oscillator Frequency fo Conditions (Note 1) SPECIFICATION NOTES: 1. All parameters specified for Ta = 25°C, Vcc = 15Vdc, Rosc = 75KΩ (to Vref), Cosc = 1800 pF, and all Phase Outputs unloaded (Ta ~ Tj). All negative currents shown are sourced by (flow from) the pin under test. 2. Either ISH or ISL may be driven over the range shown. 3. Bold parameters tested at -55°C, 25°C, 125°C. PINOUT PIN# NAME PIN# NAME 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 VCC Delay EA1 “-” Input EA2 “+” Input EA1 “+” Input +5V Reference Output EA2 “-” Input EA2 Output EA1 Output PWM Input Oscillator Timing Input Isense ISH ISL Quad Select Input Tachometer Output Brake/Tach Timing Input Overvoltage/Coast Input Soft-Start Input Ground H3 Input H2 Input H1 Input 24 25 26 27 28 A B C D E (Base) Speed Input Direction Input CSH CSL (No Connection) Motor Return Vmotor Phase C Output Phase B Output Phase A Output (No Connection) 2.1 - 5 OM9369CM PIN DESCRIPTIONS / FUNCTIONALITY VCC (Pin 1) -- The Vcc Supply input provides bias voltage to all of the internal control electronics within the OM9369CM, and should be connected to a nominal +15Vdc power source. High frequency bypass capacitors (10uF polarized in parallel with 0.1uF ceramic are recommended) should be connected as close as possible to pin 1 and Ground (pin 20). DELAY (Pin 2) -- This pin must be connected to the Brake/Tach Timing Input pin (pin 17) to ensure that the high-side bootstrap capacitors are charged during initial startup. output clears the internal PWM latch, which in turn commands the Phase Outputs to chop. For voltagemode control systems, pin 10 may be connected to the Oscillator Timing Input, pin 11. OSCILLATOR TIMING INPUT (Pin 11) -- The Oscillator Timing Input sets a fixed PWM chopping frequency by means of an internal resistor (Rosc), whose value is set to 75kΩ, connected from pin 11 to the +5V Reference Output, and an internal capacitor (Cosc), whose value is 1800pF, connected from pin 11 to Ground. In custom applications, the recommended range of values for Rosc is 10kΩ to 100kΩ, and for Cosc is 0.001uF to 0.01uF, and the maximum operating frequency should be kept below 20kHz. The approximate oscillator frequency is: 2 [Hz] fo = (Rosc x Cosc) ERROR AMPLIFIER (EA1- Input, Pin 3; EA1+ Input, Pin 5; EA1 Output, Pin 9) -- The Error Amplifier is an uncommitted LM158-type operational amplifier, providing the user with many external control loop compensation options. This amplifier is compensated for unity gain stability, so it can be used as a unity gain input buffer to the internal PWM comparator when pin 3 is connected to pin 9. The output of the Error Amplifier is internally connected to the PWM comparator's "-" input, simplifying external layout connections. The voltage waveform on pin 11 is a ramp whose magnitude is approximately 1.2Vp-p, centered at approximately 1.6Vdc. In addition to the voltage-mode PWM control, pin 11 may be used for slope compensation in current-mode control applications. +5V REFERENCE OUTPUT (Pin 6) -- This output provides a temperature-compensated, regulated voltage reference for critical external loads. It is recommended that this pin be used to power the external Hall-effect motor position sensors. By design, the +5V reference must be in regulation before the remainder of the control circuitry is activated. This feature allows the Hall-effect sensors to become powered and enabled before any Phase Output is enabled in the OM9369CM, preventing damage at turn-on. High-frequency bypass capacitors (10uF polarized in parallel with 0.1uF ceramic are recommended) should be connected as close as possible to pin 5 and Ground (pin 20). V(Isense) = 2.5V + [2 x ABS (ISH - ISL)] [Volts] SPARE AMPLIFIER (EA2- Input, Pin 7; EA2+ Input, Pin 4; EA2 Output, Pin 8) -- The Spare Amplifier is an uncommitted LM158-type operational amplifier, and in addition to the internal error amplifier, provides the user with additional external control loop compensation options. This amplifier is also compensated for unity gain stability and it can be used as a unity gain input buffer when pin 7 is connected to pin 8. If the Spare Amplifier is unused, pin 4 should be connected to Ground, and pin 7 should be connected to pin 8. PWM INPUT (Pin 10) -- This pin is connected to the "+" input of the internal PWM comparator. The PWM ISENSE (Pin 12) -- This pin is connected to the output of the internal current-sense amplifier. It drives a peakcurrent (cycle-by-cycle) comparator which controls Phase Output chopping, and a fail-safe current comparator which, in the event of an output overcurrent condition, activates the soft-start feature and disables the Phase Outputs until the overcurrent condition is removed. The magnitude of the voltage appearing at pin 12 is dependent upon the voltages present at the current-sense amplifier inputs, ISH and ISL: CURRENT SENSE INPUTS (ISH, Pin 13; ISL, pin 14) -- These inputs to the current-sense amplifier are interchangeable and they can be used as differential inputs. The differential voltage applied between pins 13 and 14 should be kept below +/-0.5Vdc to avoid saturation. QUAD SELECT INPUT (Pin 15) -- This input is used to set the OM9369CM in a half control or full control chopping regime. When driven with a logic low level, the OM9369CM is in the half control mode, whereby only the three lower (pull-down) power switches associated with the Phase Outputs are allowed to chop. Alternately, when driven with a logic high level, the OM9369CM is in the full control mode, where all six power switches (pullup and pull-down) associated with the Phase Outputs are chopped by the PWM. During motor braking, changing the logic state of the Quad Select Input has no effect on the operation of the OM9369CM. 2.1 - 6 OM9369CM TACHOMETER OUTPUT (Pin 16) -- This output provides a fixed width 5V pulse when any Hall-effect Input (1, 2 or 3) changes state. The pulse width of the Tachometer Output is set internally in the OM9369CM to 113µs (nominal). The average value of the output voltage on pin 16 is directly proportional to the motor's speed, so this output may be used (with an external averaging filter) as a true tachometer output, and fed back to the Speed Input (pin 24) to sense the actual motor speed. Note: Whenever pin 16 is high, the internal Hall-effect position latches are inhibited (i.e. "latched"), to reject noise during the chopping portion of the commutation cycle, and this makes additional commutations impossible. This means that in order to prevent false commutation at a speed less than the desired maximum speed, the highest speed as observed at the Tachometer Output should be set above the expected maximum value. BRAKE / TACH TIMING INPUT (Pin 17) -- The Brake/Tach Timing Input is a dual-purpose input. Internal to the OM9369CM are timing components tied from pin 17 to Ground (a 51kΩ resistor and a 3300pF capacitor). These components set the minimum pulse width of the Tachometer Output to 113µs, and this time may be adjusted using external components, according to the equation: T(tach) = 0.67 x (Ct + 3300pf) x Rt x 51kΩ (µs) Rt + 51kΩ ( ) The recommended range of external resistance (to Ground) is 15kΩ to ∞, and the range of external capacitance (to Ground) is 0pF to 0.01uF. With each Tachometer Output pulse, the capacitor tied to pin 17 is discharged from approximately 3.33V to approximately 1.67V by an internal timing resistor. The Brake / Tach Timing Input has another function. If this pin is pulled below the brake threshold voltage, the OM9369CM will enter the brake mode. The brake mode is defined as the disabling of all three high-side (pull-up) drivers associated with the Phase Outputs, and the enabling of all three low-side (pull-down) drivers. OVERVOLTAGE / COAST INPUT (Pin 18) -- This input may be used as a shutdown or an enable/disable input to the OM9369CM. Also, since the switching inhibit threshold is so tightly defined, this input can be directly interfaced with a resistive divider which senses the voltage of the motor supply, Vm, for overvoltage conditions. A high level (greater than the inhibit threshold) on pin 18 causes the coast condition to occur, whereby all Phase Outputs revert to a Hi-Z state and any motor current which flowed prior to the Overvoltage / Coast command is commutated via the power "catch" rectifiers associated with each Phase Output. 2.1 - 7 SOFT-START INPUT (Pin 19) -- The Soft-Start input is internally connected to a 10µA (nominal) current source, the collector of an NPN clamp/discharge transistor, and a voltage comparator whose soft-start/restart threshold is 0.2Vdc (nominal). An external capacitor is connected from this pin to Ground (pin 20). Whenever the Vcc supply input drops below the turn-on threshold, approximately 9Vdc, or the sensed current exceeds the over-current threshold, approximately 0.3V at the current sense amplifier, the soft-start latch is set. This drives the NPN clamp transistor which discharges the external softstart capacitor. When the capacitor voltage drops below the soft-start/restart threshold and a fault condition does not exist, the soft-start latch is cleared; the soft-start capacitor charges via the internal current source. In addition to discharging the soft-start capacitor, the clamp transistor also clamps the output of the error amplifier internal to the controller IC, not allowing the voltage at the output of the error amplifier to exceed the voltage at pin 19, regardless of the inputs to the amplifier. This action provides for an orderly motor start-up either at start-up or when recovering from a fault condition. GROUND (Pin 20) -- The voltages that control the OM9369CM are referenced with respect to this pin. All bypass capacitors, timing resistors and capacitors, loop compensation components, and the Hall-effect filter capacitors must be referenced as close as possible to pin 20 for proper circuit operation. Additionally, pin 20 must be connected as close as physically possible to the Motor Return, pin A. HALL-EFFECT INPUTS (H1, Pin 23; H2, Pin 22; H3, Pin 21) -- Each input has an internal pull-up resistor to the +5V Reference. Each input also has an internal 180pF noise filter capacitor to Ground. In order to minimize the noise which may be coupled from the motor commutation action to these inputs, it is strongly recommended that additional external filter capacitors, whose value is in the range of 2200pF, be connected from each Hall-Effect Input pin to Ground. Whatever capacitor value is used, the rise/fall times of each input must be guaranteed to be less than 20us for proper tachometer action to occur. Motors with 60 degree position sensing may be used if one or two of the Hall-effect sensor signals is inverted prior to connection to the Hall-Effect Inputs. SPEED INPUT (Pin 24) - This pin is connected to the “+” input of a voltage comparator, whose threshold is 0.25Vdc. As long as the Speed Input is less than 0.25V, the direction latch is transparent. When the Speed Input is greater than 0.25V, then the direction latch inhibits all changes in direction. It is recommended, especially while operating in the half control mode, that the Tachometer Output is connected to the Speed Input via a low-pass filter, such that the direction latch is transparent only when the motor is spinning very slowly. In this case, the motor has too little stored energy to damage the power devices during direction reversal. OM9369CM DIRECTION INPUT (Pin 25) - This input is used to select the motor direction. This input has an internal protection feature: the logic-level present on the Direction Input is first loaded into a direction latch, then shifted through a two-bit shift register before interfacing with the internal output phase driver logic decoder. Also, protection circuitry detects when the input and the output of the direction latch or the 2-bit shift register are different, and inhibits the Phase Outputs (i.e. Hi-Z) during those times. This feature may be used to allow the motor to coast to a safe speed before a direction reversal takes place. Power stage cross-conduction (current "shoot-through" from Vmotor to Ground through simultaneously enabled pull-up and pull-down drivers) is prevented by the shift register as it is clocked by the PWM oscillator, so that a fixed delay of between one and two PWM oscillator clock cycles occurs. This delay or "dead-time" guarantees that power-stage cross-conduction will not occur. CURRENT SENSE OUTPUTS (CSH, Pin 26; CSL, Pin 27) - The Current Sense Outputs produce a differential voltage equal to the motor current times the sense resistance value (5mΩ nominal). There is an internal 1000pF filter capacitor across pins 26 and 27, and two 100Ω series resistors, one between each pin and each end of the current sense resistor. To configure the current sense amplifier for cycle-by-cycle current limiting and/or overcurrent protection, connect pin 26 to pin 13 (ISH) and pin 27 to pin 14 (ISL). MOTOR RETURN (Pin A) - This pin is connected to the most negative terminal of the motor supply (Vm-). This connection is electrically isolated from the logic Ground internal to the OM9369CM package to minimize, if not eliminate, noise on the logic ground. The connection to the logic ground is made by the user external to the package (refer to Ground (pin 20)). In order to minimize packaging losses and parasitic effects, it is essential that both of these pins be firmly connected to the motor supply ground, with as short a connection as physically possible. Test/Inspection Precap Visual Inspection Temperature Cycle Mechanical Shock Hermeticity (Fine and Gross Leak) Pre Burn-In Electrical Burn-In (160 hours) Final Electrical Test Group A Testing Final Visual Inspection PHASE OUTPUTS (Phase A, Pin E; Phase B, Pin D; Phase C, Pin C) -- These outputs are connected to either Vmotor via the pull-up driver or Source via the pull-down driver, depending upon the Hall-Effect and Direction Inputs (see Commutation Truth Table). The pin associated with each Phase Output must be connected to one of the three phases of the motor driven by the OM9369CM. VMOTOR (Pin B) - This pin is connected to the most positive terminal of the motor supply (Vm+). For proper operation, this pin must be connected externally with a low impedance power bus. The Vmotor power bus should be bypassed with an adequately voltage-rated ceramic capacitor, 0.1µF (typical), and a low-ESR electrolytic capacitor, whose capacitance value can be selected by the following: 10µF-per-Ampere of average motor current from Vmotor to Motor Return. Note: All connections, including the power bus capacitor connections, must be made as close as possible to the Vmotor and Motor Return pins to minimize parasitic effects. PACKAGE AND SCREENING OPTIONS The OM9369CM is offered in a hermetic CERMODTM, CM-1LP, as shown in Figure 1. The OM9369CM operates over the full military temperature range of -55°C to +125°C, and is available with two standard screening levels, CMP, limited screening, and CMB, MIL-STD-883 screening. The screening levels for the CMP and CMB versions are listed in the table below. All tests and inspections are in accordance with those listed in MIL-STD-883. Note: For lower bus voltages and MOSFET versions in a CERMOD TM package contact the factory. Table 1 CMB 100% 100% 100% 100% 100% 100% -55°C, +25°C, +125°C 100% 100% 2.1 - 8 CMP 100% N.A. N.A. 100% N.A. N.A. +25°C N.A. 100% OM9369CM APPLICATIONS Modes of Operation Figures 2 and 3, shown on the following pages, provide schematic representations of typical voltagemode and current-mode applications for the OM9369CM controller/driver. Figure 2 represents the implementation of a typical voltage-mode controller for velocity control. A voltage or speed command is applied to the non-inverting input of the error amplifier which is configured as a voltage follower. The output of the error amplifier is compared to a pulse width modulated ramp, and since motor speed is nearly proportional to the average phase output voltage, the speed is controlled via duty cycle control. If a speed feedback loop is required, the tachometer output can be connected to the inverting input of the error amplifier via a loop compensation network. Figure 2 also shows the implementation of the cycleby-cycle current limit/overcurrent protection feature of the OM9369CM. The load current is monitored via the controller’s internal sense resistor. The current sense signal is filtered and fed into the current sense amplifier where the absolute value of ISH-ISL is multiplied by two and biased up by 2.5 volts. The output of the current sense amplifier is compared to a fixed reference, thus providing cycle-by-cycle current limiting and/or overcurrent protection as necessary. The typical peak current threshold (ISHISL) is 0.20 volts; the typical over current threshold (ISH-ISL) is 0.30 volts. Figure 3 represents the implementation of a typical current-mode controller for torque control. The load current is monitored via the controller’s internal sense resistor. The current sense signal is filtered and fed into the current sense amplifier where the absolute value of ISH-ISL is multiplied by two and biased up by 2.5 volts. Besides the implementation of the cycle-bycycle current limit/overcurrent protection feature of the OM9369CM discussed in the preceding paragraph, the output of the current sense amplifier is fed into the error amplifier which is configured as a differential amplifier. An error signal representing the difference between the current command input and the value of the amplified current sense signal is produced. Then it is compared to a pulse width modulated ramp and since torque is nearly proportional to the average phase output current, the torque is controlled via duty cycle control. MECHANICAL OUTLINE Fig 1: Mechanical Outline CM-1LP CERMOD 2.1 - 9 TM OM9369CM +15V 10uF .1uF + 3.24k COMMAND 1k 1.50k .1uF 10k .1uF FROM MOTOR HALL SENSORS H3 H2 H1 4700pF 232 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 232 VCC DELAY EA1EA2+ EA1+ +5V_REF EA2EA2_OUT EA1_OUT PWM_IN OSC I_SENSE ISH ISL QUAD_SEL TACH_OUT RC_BRAKE OV_COAST SOFT_START GROUND H3_HALL_INPUT H2_HALL_INPUT H1_HALL_INPUT SPEED_IN DIRECTION CSH CSL N/C PHASE_A_OUT PHASE_B_OUT PHASE_C_OUT V_MOTOR E D MOTOR C B V_Motor C_BUS MOTOR_RETURN + C_FILT H1 H2 H3 A HALL SENSORS OM9369CM Fig 2: Implementation of a Voltage-Mode Controller CURRENT_COMMAND +15V 10uF + .1uF 3.24k 35.6k 1k OFFSET 1800pF 3.24k .26uF 2k 43k .1uF 10k .1uF FROM MOTOR HALL SENSORS H3 H2 H1 4700pF 232 232 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 VCC DELAY EA1EA2+ EA1+ +5V_REF EA2EA2_OUT EA1_OUT PWM_IN OSC I_SENSE ISH ISL QUAD_SEL TACH_OUT RC_BRAKE OV_COAST SOFT_START GROUND H3_HALL_INPUT H2_HALL_INPUT H1_HALL_INPUT SPEED_IN DIRECTION CSH CSL N/C PHASE_A_OUT PHASE_B_OUT PHASE_C_OUT V_MOTOR E D MOTOR C B V_Motor C_BUS MOTOR_RETURN + C_FILT A OM9369CM Fig 3: Implementation of a Current-Mode Controller 2.1 - 10 H1 H2 H3 HALL SENSORS