19-2142; Rev 1; 9/02 3A, 1MHz, DDR Memory Termination Supply The MAX1809 uses a unique current-mode, constantoff-time, PWM control scheme that allows the output to source or sink current. This feature allows energy to return to the input power supply that otherwise would be wasted. The programmable constant-off-time architecture sets switching frequencies up to 1MHz, allowing the user to optimize performance trade-offs between efficiency, output switching noise, component size, and cost. The MAX1809 features an adjustable soft-start to limit surge currents during startup, a 100% duty-cycle mode for low-dropout operation, and a low-power shutdown mode that disables the power switches and reduces supply current below 1µA. The MAX1809 is available in a 28-pin QFN with an exposed backside pad, a 28-pin thin QFN, or a 16-pin QSOP. Applications Features ♦ Source/Sink 3A ♦ ±1% Output Accuracy ♦ Up to 1MHz Switching Frequency ♦ 93% Efficiency ♦ Internal PMOS/NMOS Switches 90mΩ/70mΩ On-Resistance at VIN = 4.5V 110mΩ/80mΩ On-Resistance at VIN = 3V ♦ 1.1V to VIN Adjustable Output Voltage ♦ 3V to 5.5V Input Voltage Range ♦ <1µA Shutdown Supply Current ♦ Programmable Constant-Off-Time Operation ♦ Thermal Shutdown ♦ Adjustable Soft-Start Inrush Current Limiting ♦ Output Short-Circuit Protection Ordering Information PART MAX1809EGI* TEMP RANGE PIN-PACKAGE -40°C to +85°C 28 QFN MAX1809EEE -40°C to +85°C 16 QSOP MAX1809ETI -40°C to +85°C 28 Thin QFN *Contact factory for availability. Pin Configurations DDR Memory Termination VOUT VIN LX SHDN N.C. LX N.C. LX N.C. 27 26 25 24 23 22 2 20 PGND 3 19 LX IN 4 18 LX N.C. 5 17 PGND SS 6 16 VCC EXTREF 7 15 GND MAX1809 GND 11 12 13 14 N.C. GND REF SS N.C. REF N.C. FB 9 TOFF IN LX PGND VSET EXTREF PGND 10 SHDN 21 FB VCC 1 8 MAX1809 N.C. TOFF IN TOP VIEW N.C. Typical Operating Circuit 28 Active Termination Buses THIN QFN Pin Configurations continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX1809 General Description The MAX1809 is a reversible energy flow, constant-offtime, pulse-width modulated (PWM), step-down DC-DC converter. It is ideal for use in notebook and subnotebook computers that require 1.1V to 5V active termination power supplies. This device features an internal PMOS power switch and internal synchronous rectifier for high efficiency and reduced component count. The internal 90mΩ PMOS power switch and 70mΩ NMOS synchronous-rectifier switch easily deliver continuous load currents up to 3A. The MAX1809 accurately tracks an external reference voltage, produces an adjustable output from 1.1V to VIN, and achieves efficiencies as high as 93%. MAX1809 3A, 1MHz, DDR Memory Termination Supply ABSOLUTE MAXIMUM RATINGS VCC, IN to GND ........................................................-0.3V to +6V IN to VCC .............................................................................±0.3V GND to PGND.....................................................................±0.3V SHDN, SS, FB, TOFF, RREF, EXTREF to GND.......................................-0.3V to (VCC + 0.3V) LX Current (Note 1).............................................................±4.7A REF Short Circuit to GND Duration ............................Continuous Continuous Power Dissipation (TA = +70°C) 28-Pin QFN (derate 20mW/°C above +70°C; part mounted on 1in2 of 1oz copper) ..............................1.6W 16-Pin QSOP (derate 12.5mW/°C above +70°C; part mounted on 1in2 of 1oz copper) .................................1W Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: LX has clamp diodes to PGND and IN. If continuous current is applied through these diodes, thermal limits must be observed. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = VCC = 3.3V, VEXTREF = 1.1V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER Input Voltage SYMBOL VIN,VCC Feedback Voltage Accuracy (VFB - VEXTREF) Feedback Load Regulation Error External Reference Voltage Range Reference Voltage CONDITIONS VIN = VCC = 3V to 5.5V, ILOAD = 0, VEXTREF = 1.25V (Note 2) ∆VFB VEXTREF VIN = VCC = 3V to 5.5V ILX = 0.5A NMOS Switch On-Resistance RNMOS ILX = 0.5A ILIMIT VIN > VLX No Load Supply Current 3.0 5.5 V -12 +12 mV TYP 20 VREF 0.01 1.078 RPMOS Switching Frequency UNITS 1.122 V 2.0 mV VIN = 4.5V 90 200 VIN = 3V 110 250 VIN = 4.5V 70 150 VIN = 3V 80 200 4.1 4.7 A 1 MHz 3.5 fSW (Note 3) ICC fSW = 500kHz 1 IIN fSW = 500kHz 16 SHDN = GND, ICC + IIN <1 Hysteresis = 15°C 160 Undervoltage Lockout Threshold VCC falling, hysteresis = 90mV FB Input Bias Current Off-Time ISHDN IFB tOFF VFB = VEXTREF + 0.1V 2.5 2 2.6 tON 15 V nA 60 250 0.30 0.37 RTOFF = 110kΩ 0.9 1.0 1.1 RTOFF = 499kΩ 3.8 4.5 5.2 0.35 _______________________________________________________________________________________ µA °C 0 (Note 3) mΩ 2.7 0.24 4 x tOFF mΩ mA RTOFF = 30.1kΩ Startup Off-Time On-Time V 0.5 Thermal-Shutdown Threshold Shutdown Supply Current mV VIN 1.7 1.100 IREF = -1µA to +10µA PMOS Switch On-Resistance Current-Limit Threshold MAX ILOAD = -3A to +3A, VEXTREF = 1.25V VREF Reference Load Regulation MIN µs µs µs 3A, 1MHz, DDR Memory Termination Supply (VIN = VCC = 3.3V, VEXTREF = 1.1V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL SS Source Current ISS SS Sink Current ISS SHDN Input Current CONDITIONS MIN TYP MAX UNITS 4 5 6 µA VSS = 1V 1 50 V SHDN = 0, VCC -1 VIL SHDN Logic Levels 0.8 VIH Maximum Output RMS Current mA +1 2 IOUT(RMS) µA V 3.1 ARMS MAX UNITS 3.0 5.5 V -24 +24 mV VREF 0.01V VIN 1.9V V 1.067 1.133 V ELECTRICAL CHARACTERISTICS (VIN = VCC = 3.3V, VEXTREF = 1.1V, TA = -40°C to +85°C, unless otherwise noted.) (Note 4) PARAMETER Input Voltage SYMBOL CONDITIONS VIN, VCC Feedback Voltage Accuracy (VFB - VEXTREF) External Reference Voltage Range Reference Voltage VIN = VCC = 3V to 5.5V, ILOAD = 0, VEXTREF = 1.25V VEXTREF VIN = VCC = 3 V to 5.5V VREF PMOS Switch On-Resistance RPMOS ILX = 0.5A NMOS Switch On-Resistance RNMOS ILX = 0.5A ILIMIT VIN > VLX Current-Limit Threshold MIN TYP VIN = 4.5V 200 VIN = 3V 250 VIN = 4.5V 150 VIN = 3V 200 FB Input Bias Current IFB VFB = VEXTREF + 0.1V Off-Time tOFF RTOFF = 110kΩ 3.3 0.85 mΩ mΩ 4.9 A 300 nA 1.15 µs Note 2: The output voltage will have a DC-regulation level lower than the feedback error comparator threshold by 50% of the ripple. Note 3: Recommended operating frequency, not production tested. Note 4: Specifications from 0°C to -40°C are guaranteed by design, not production tested. _______________________________________________________________________________________ 3 MAX1809 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (Circuit of Figure 1, VOUT = 1.25V, for VIN = 5V: L = 1µH, RTOFF = 130kΩ; for VIN = 3.3V: L = 0.68µH, RTOFF = 73.2kΩ.) RDROOP = 0Ω 85 VIN = 5V, VOUT = 2.5V 75 70 VIN = 3.3V, VOUT = 1.25V 65 55 75 VIN = 5V, VOUT = 1.25V 70 65 VIN = 3.3V, VOUT = 1.25V 60 VIN = 5V, VOUT = 1.25V 60 80 -0.2 1 2 OUTPUT CURRENT (A) 3 0 1 2 OUTPUT CURRENT (A) NO-LOAD SUPPLY CURRENT vs. SUPPLY VOLTAGE 5.0 4.5 4.0 3.0 2.5 1.5 1.0 4 -1 0 2 3 1200 VIN = 3.3V 1000 800 600 VIN = 5V 400 200 0.5 0 0 0 1 2 3 4 5 0 6 50 100 150 200 250 300 350 400 450 500 -3 -2 RTOFF (kΩ) VIN (V) LOAD-TRANSIENT RESPONSE MAX1809 toc07 STARTUP AND SHUTDOWN -1 0 1 OUTPUT CURRENT (A) RDROOP = 0Ω IIN 1A/div MAX1809 toc08 0 VOUT (AC-COUPLED) 0A 50mV/div VSHDN 5V/div 0V 0V V(LX) 5V/div 0A IOUT 5A/div VOUT 1V/div 0V VSS 2V/div 0V 1ms/div VIN = 3.3V, ROUT = 0.5Ω 4 1 SWITCHING FREQUENCY vs. OUTPUT CURRENT 2.0 8 -2 OUTPUT CURRENT (A) FREQUECNY (kHz) tOFF (µs) 12 -2.2 -3 3.5 16 -1.8 3 MAX1809 toc05 20 VIN = 5V OFF-TIME vs. RTOFF MAX1809 toc04 24 -1.4 -3.0 50 0 -1.0 -2.6 55 50 VIN = 3.3V -0.6 MAX1809 toc06 80 EFFICIENCY (%) 85 MAX1809 toc03 VIN = 5V, VOUT = 2.5V 90 NORMALIZED OUTPUT ERROR (%) RDROOP = 0Ω 90 EFFICIENCY (%) 95 MAX1809 toc01 100 95 NORMALIZED OUTPUT ERROR vs. OUTPUT CURRENT EFFICIENCY vs. OUTPUT CURRENT (SINKING) MAX1809 toc02 EFFICIENCY vs. OUTPUT CURRENT (SOURCING) NO-LOAD SUPPLY CURRENT (IIN + ICC (mA)) MAX1809 3A, 1MHz, DDR Memory Termination Supply 10µs/div VEXTREF = 1.25V, VIN = 3.3V, IOUT = -2A to +2A to -2A _______________________________________________________________________________________ 2 3 3A, 1MHz, DDR Memory Termination Supply LINE-TRANSIENT RESPONSE MAX1809 toc10 RDROOP 12mΩ MAX1809 toc09 LOAD-TRANSIENT RESPONSE VOUT (AC-COUPLED) 50mV/div VOUT (AC-COUPLED) 50mV/div VIN 2V/div V(LX) 5V/div 0V IOUT 5A/div 0A 0V 20µs/div 10µs/div VEXTREF = 1.25V, VIN = 3.3V, IOUT = -2A to +2A to -2A IOUT = 2A, VIN = 5V to 3.3V to 5V SWITCHING WAVEFORMS (SINKING) MAX1809 toc12 MAX1809 toc11 SWITCHING WAVEFORMS (SOURCING) VOUT (AC-COUPLED) 50mV/div 50mV/div I(LX) 2A/div 0A I(LX) 2A/div 0A 0V V(LX) 5V/div 400ns/div IOUT = 2A, VIN = 5V VOUT (AC-COUPLED) V(LX) 5V/div 0V 400ns/div IOUT = -2A, VIN = 5V _______________________________________________________________________________________ 5 MAX1809 Typical Operating Characteristics (continued) (Circuit of Figure 1, VOUT = 1.25V, for VIN = 5V: L = 1µH, RTOFF = 130kΩ; for VIN = 3.3V: L = 0.68µH, RTOFF = 73.2kΩ.) 3A, 1MHz, DDR Memory Termination Supply MAX1809 Pin Description PIN (QFN) PIN (QSOP) NAME FUNCTION 1, 5, 10, 11, 12, 22, 24, 26, 28 — N.C. 2, 4 2, 4 IN Supply Voltage Input for the Internal PMOS Power Switch. Not internally connected. Externally connect all pins for proper operation. No Connection. Not internally connected. 3, 18, 19, 23, 25 3, 14, 16 LX Inductor Connection. Connection for the drains of the PMOS power switch and NMOS synchronous-rectifier switch. Connect the inductor from this node to the output filter capacitor and load. Not internally connected. Externally connect all pins for proper operation. 6 5 SS Soft-Start. Connect a capacitor from SS to GND to limit inrush current during startup. 7 6 EXTREF External Reference Input. Feedback input regulates to VEXTREF. The PWM controller remains off until EXTREF is greater than REF. 8 7 TOFF Off-Time Select Input. Sets the PMOS power switch constant-off-time. Connect a resistor from TOFF to GND to adjust the PMOS switch off-time. 9 8 FB Feedback Input. Connect directly to output for fixed-voltage operation or to a resistive-divider for adjustable operating modes. 13, backside pad, corner tabs 9 GND Analog Ground. Connect exposed backside pad and corner tabs to analog GND. 14 10 REF Reference Output. Bypass REF to GND with a 1µF capacitor. 15 11 GND Tie to GND (pin 13 QFN; pin 9 QSOP) 16 12 VCC Analog Supply Voltage Input. Supplies internal analog circuitry. Bypass VCC with a 10Ω and 2.2µF low-pass filter (see Figure 1). 17, 20, 21 13, 15 PGND Power Ground. Internally connected to the internal NMOS synchronousrectifier switch. 27 1 SHDN Shutdown Control Input. Drive SHDN low to disable the reference, control circuitry, and internal MOSFETs. Drive high or connect to VCC for normal operation. Detailed Description The MAX1809 synchronous, current-mode, constantoff-time, PWM DC-DC converter steps down input voltages of 3V to 5.5V to an adjustable output voltage from 1.1V to VIN, as set by the voltage applied at EXTREF. It sources and sinks up to 3A of output current. Internal switches composed of a 90mΩ PMOS power switch and a 70mΩ NMOS synchronous-rectifier switch improve efficiency, reduce component count, and eliminate the need for an external Schottky diode across the synchronous switch. The MAX1809 operates in a constant-off-time mode under all loads. A single resistor-programmable constant-off-time control sets switching frequencies up to 1MHz, allowing the user to optimize performance trade6 offs in efficiency, switching noise, component size, and cost. When power is drawn from a regulated supply, constant-off-time PWM architecture essentially provides constant-frequency operation. This architecture has the inherent advantage of quick response to line and load transients. The MAX1809’s current-mode, constant-offtime PWM architecture regulates the output voltage by changing the PMOS switch on-time relative to the constant off-time. Constant-Off-Time Operation In the constant-off-time architecture, the FB voltage comparator turns the PMOS switch on at the end of each off-time, keeping the device in continuous-conduction mode. The PMOS switch remains on until the _______________________________________________________________________________________ 3A, 1MHz, DDR Memory Termination Supply IN 33µF LX MAX1809 10Ω VCC 2.2µF SHDN VSET VDDQ (2.5V) EXTREF VOUT = MAX1809 RDROOP L VIN (VDDQ 2 ) 270µF 2V 15mΩ PGND GND FB REF 1µF 10kΩ 1000pF TOFF SS 0.01µF RTOFF 10kΩ 1000pF FOR VIN = 5V: L = 1µH, RTOFF = 130kΩ FOR VIN = 3.3V: L = 0.68µH, RTOFF = 73.2kΩ VSSQ Figure 1. Typical Application Circuit feedback voltage exceeds the external reference voltage (VEXTREF) or the positive current limit is reached. When the PMOS switch turns off, it remains off for the programmed off-time (tOFF). To control the current under short-circuit conditions, the PMOS switch remains off for approximately 4 ✕ tOFF when VFB < VEXTREF / 4. Synchronous Rectification In a stepdown regulator without synchronous rectification, an external Schottky diode provides a path for current to flow when the inductor is discharging. Replacing the Schottky diode with a low-resistance NMOS synchronous switch reduces conduction losses and improves efficiency. The NMOS synchronous-rectifier switch turns on following a short delay (approximately 50ns) after the PMOS power switch turns off, thus preventing cross-conduction or “shoot-through.” In constant-off-time mode, the synchronous-rectifier switch turns off just prior to the PMOS power switch turning on. While both switches are off, inductor current flows through the internal body diode of the NMOS switch. Current Sourcing and Sinking By operating in a constant-off-time, pseudo-fixed-frequency mode, the MAX1809 can both source and sink current. Depending on the output current requirement, the circuit operates in two modes. In the first mode the output draws current and the MAX1809 behaves as a regular buck controller, sourcing current to the output from the input supply rail. However, when the output is supplied by another source, the MAX1809 operates in a second mode as a synchronous boost, taking power from the output and returning it to the input. Thermal Resistance Junction-to-ambient thermal resistance, θJA, is highly dependent on the amount of copper area immediately surrounding the IC leads. The MAX1809 QFN package has 1in2 of copper area and a thermal resistance of 50°C/W with no forced airflow. The MAX1809 16-pin QSOP evaluation kit has 0.5in2 of copper area and a thermal resistance of 80°C/W with no forced airflow. Airflow over the board significantly reduces the junctionto-ambient thermal resistance. For heat sinking purposes, it is essential to connect the exposed backside pad of the QFN package to a large analog ground plane. Shutdown Drive SHDN to a logic-level low to place the MAX1809 in low-power shutdown mode and reduce supply current to less than 1µA. In shutdown, all circuitry and internal MOSFETs turn off, so the LX node becomes high impedance. Drive SHDN to a logic-level high or connect to VCC for normal operation. Power Dissipation Power dissipation in the MAX1809 is dominated by conduction losses in the two internal power switches. Power dissipation due to charging and discharging the gate capacitance of the internal switches (i.e., switching losses) is approximately: PD(CAP) = C ✕ VIN2 ✕ fSW _______________________________________________________________________________________ 7 MAX1809 3A, 1MHz, DDR Memory Termination Supply Setting the Output Voltage where C = 2.5nF and fSW is the switching frequency. Resistive losses in the two power switches are approximated by: The output voltage of the MAX1809 is set by an external voltage applied to the EXTREF pin. This can come directly from another voltage source or external reference. PD(RES) = IOUT2 ✕ RPMOS where RPMOS is the on-resistance of the PMOS switch. The junction-to-ambient thermal resistance required to dissipate this amount of power is calculated by: As an active termination supply in DDR applications (see Active Bus Termination in the Applications Information section), the output of the MAX1809 is regulated at half the DDR supply voltage. In mobile systems, the DDR supply voltage is 2.5V, and the termination voltage is 1.25V ±40mV. To regulate to 1.25V, an external divide-by-2 resistor network is placed across the DDR supply voltage to generate 1.25V. This 1.25V is connected to EXTREF, which sets the output voltage of the MAX1809. When FB is directly tied to the output (Figure 5), the output voltage range is limited by the external reference’s input voltage limits (see EC table). External reference may not be set within 1.7V of the minimum supply voltage. VEXTREF should be limited to less than 1.4V for 3.3V input voltage. Failure to comply can cause the part to operate abnormally and may cause part damage. Alternatively, the output can be adjusted up to VIN by connecting FB to a resistor-divider between the output voltage and ground (Figure 6). Use 50kΩ for R1. R2 is given by: θJA = (TJ,MAX - TA,MAX) / (PD(CAP) + PD(RES)) where: θJA = junction-to-ambient thermal resistance TJ,MAX = maximum junction temperature TA,MAX = maximum ambient temperature Design Procedure For typical applications, use the recommended component values in Figure 1. For other applications, take the following steps: 1) Select the desired PWM-mode switching frequency. See Figure 4 for maximum operating frequency. 2) Select the constant off-time as a function of input voltage, output voltage, and switching frequency. 3) Select RTOFF as a function of off-time. 4) Select the inductor as a function of output voltage, off-time, and peak-to-peak inductor current. V R2 = R1 OUT − 1 VEXTREF 0.01µF SS FB VCC VIN VIN (3.0V TO 5.5V) IN 2.2µF CIN CERAMIC CURRENT SENSE MAX1809 PWM LOGIC AND DRIVERS EXTREF LX COUT SHDN REF L REF TIMER 1µF PGND GND RTOFF Figure 2. Functional Diagram 8 _______________________________________________________________________________________ 3A, 1MHz, DDR Memory Termination Supply MAX1809 VIN 1400 ISOURCE VOUT OPERATING FREQUENCY (kHz) 1200 1000 VOUT = 2.5V 800 600 VOUT = 1.25V 400 200 SYNCHRONOUS BUCK MODE (SOURCING CURRENT) 0 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 VIN (V) VIN Figure 4. Maximum Recommended Operating Frequency vs. Input Voltage ISINK VSOURCE > VOUT VPMOS = the voltage drop across the internal PMOS power switch |IOUT ✕ RPMOS| VNMOS = the voltage drop across the internal NMOS synchronous-rectifier switch | I OUT ✕ RNMOS| SYNCHRONOUS BOOST MODE (SINKING CURRENT) Figure 3. Sourcing and Sinking Capabilities of the MAX1809 Programming the Switching Frequency and Off-Time and On-Time The MAX1809 features a programmable PWM-mode switching frequency, which is set by the input and output voltage and the value of RTOFF, connected from TOFF to GND. RTOFF sets the PMOS power switch offtime in PWM mode. Use the following equation to select the off-time while sourcing current according to the desired switching frequency in PWM mode: t OFF = (VIN − VOUT − VPMOS ) fSW (VIN − VPMOS + VNMOS ) where: tOFF = the programmed off-time VIN = the input voltage VOUT = the output voltage fSW = switching frequency Make sure that tON and tOFF are greater than 400ns when sourcing current. Select RTOFF according to the formula: RTOFF = (tOFF - 0.07µs) ✕ (117kΩ /1.00µs) Recommended values for RTOFF range from 36kΩ to 430kΩ for off-times of 0.4µs to 4µs. When sinking current, the switching frequency increases due to the on-resistances of the internal switches adding to the voltage across the inductor, reducing the on-time. Calculate tON when sinking current using the equation: VOUT − VNMOS t ON = t OFF VIN − VOUT + VPMOS Check that tON in the current sinking mode is greater than 350ns. Inductor Selection The key inductor parameters must be specified: inductor value (L) and peak current (IPEAK). The following equation includes a constant, denoted as LIR, which is the ratio of peak-to-peak inductor AC current (ripple current) _______________________________________________________________________________________ 9 MAX1809 3A, 1MHz, DDR Memory Termination Supply to maximum DC load current. A higher value of LIR allows smaller inductance but results in higher losses and ripple. A good compromise between size and losses is found at approximately a 25% ripple current to load current ratio (LIR = 0.25). L = (VOUT × t OFF ) (ISOURCE − ISINK ) × LIR The peak inductor current at full load is calculated by: IPEAK = IOUT + (VOUT × tOFF ) 2×L where IOUT is the maximum source or sink current. Choose an inductor with a saturation current at least as high as the peak inductor current. Additionally, verify the peak inductor current while sourcing output current (IOUT = ISOURCE) does not exceed the positive current limit. The inductor selected should exhibit low losses at the chosen operating frequency. Input Capacitor Selection The input filter capacitor reduces peak currents and noise at the voltage source. Use a low-ESR and lowESL capacitor located no further than 5mm from IN. Select the input capacitor according to the RMS input ripple-current requirements and voltage rating: V OUT × (VIN IRIPPLE = IOUT VIN − VOUT ) where IRIPPLE = input RMS current ripple. Output Capacitor Selection The output filter capacitor affects the output voltage ripple, output load-transient response, and feedback loop stability. The output filter capacitor must have low enough ESR to meet output ripple and load transient requirements, yet have high enough ESR to satisfy stability requirements. Also, the capacitance value must be high enough to guarantee stability and absorb the inductor energy going from a full-load sourcing to fullload sinking condition without exceeding the maximum output tolerance. For stable operation, the MAX1809 requires a minimum feedback ripple voltage of VRIPPLE ≥ 1% ✕ VEXTREF. The minimum ESR of the output capacitor should be: RESR > 1% ✕ (L / tOFF) 10 Stable operation requires the correct output filter capacitor. When choosing the output capacitor, ensure that: COUT ≥ t OFF × 79µFV / µs VOUT In applications where the output is subject to large load transients, the output capacitor’s size typically depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance: RESR ≤ ∆VOUT / ∆IOUT(MAX) The actual microfarad capacitance value required is defined by the physical size needed to achieve low ESR, and by the chemistry of the capacitor technology. Thus, the capacitor is usually selected by ESR, size, and voltage rating rather than by capacitance value (this is true of tantalums, OS-CONs, and other electrolytics). When using low-capacity filter capacitors such as ceramic or polymer types, capacitor size is usually determined by the capacity needed to prevent VSAG and VSOAR from causing problems during load transients. Generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising-load edge is no longer a problem. The amount of overshoot and undershoot due to stored inductor energy can be calculated as: VSOAR = L ✕ ∆IOUT2 /(2 ✕ COUT ✕ VOUT) VSAG = L ✕ ∆IOUT2/[2 ✕ COUT ✕ (VIN - VOUT)] Soft-Start Soft-start allows a gradual increase of the internal current limit to reduce input surge currents at startup and at exit from shutdown. A timing capacitor, CSS, placed from SS to GND sets the rate at which the internal current limit is changed. Upon power-up, when the device comes out of undervoltage lockout (2.6V typ) or after the SHDN pin is pulled high, a 4µA constant current source charges the soft-start capacitor and the voltage on SS increases. When the voltage on SS is less than approximately 0.7V, the current limit is set to zero. As the voltage increases from 0.7V to approximately 1.8V, the current limit is adjusted from 0V to the current-limit threshold (see the Electrical Characteristics). The voltage across the softstart capacitor changes with time according to the equation: VSS = 4µA × t CSS ______________________________________________________________________________________ 3A, 1MHz, DDR Memory Termination Supply MAX1809 VOUT = VEXTREF LX VOUT LX VDDQ MAX1809 MAX1809 EXTREF VEXTREF (1.1V ≤ VEXTREF ≤ VIN - 1.7V) EXTREF FB R2 FB R1 R2 = R1[(VOUT / VEXTREF) - 1] Figure 5. Adjusting the Output Voltage Using EXTREF Figure 6. Adjusting the Output Voltage at FB The output current limit during soft-start varies with the voltage on the soft-start pin, SS, according to the equation: careful component placement, and correct routing of traces using appropriate trace widths. The following points are in order of decreasing importance: 1) Minimize switched-current and high-current ground loops. Connect the input capacitor’s ground, the output capacitor’s ground, and PGND close together. Connect the resulting PGND plane to GND at only one point. ILIM(SS) = VSS − 0.7V × ILIMIT 1.1V where I LIMIT is the current-limit threshold from the Electrical Characteristics. The constant-current source stops charging once the voltage across the soft-start capacitor reaches 1.8V. Applications Information Frequency Variation with Output Current The operating frequency of the MAX1809 is determined primarily by t OFF (set by R TOFF), V IN, and V OUT as shown in the following formula: fSW = (VIN − VOUT − VPMOS ) t OFF (VIN − VPMOS + VNMOS ) However, as the output current increases, the voltage drop across the NMOS and PMOS switches increases and the voltage across the inductor decreases. This causes the frequency to drop. Assuming R PMOS = RNMOS, the change in frequency can be approximated with the following formula: ∆fSW = ∆IOUT × RPMOS (VIN × tOFF ) where RPMOS is the resistance of the internal MOSFETs (90mΩ typ). Circuit Layout and Grounding Good layout is necessary to achieve the MAX1809’s intended output power level, high efficiency, and low noise. Good layout includes the use of ground planes, 2) Connect the input filter capacitor less than 5mm away from IN. The connecting copper trace carries large currents and must be at least 1mm wide, preferably 2.5mm. 3) Place the LX node components as close together and as near to the device as possible. This reduces resistive and switching losses as well as noise. 4) Ground planes are essential for optimum performance. In most applications, the circuit is located on a multilayer board and full use of the four or more layers is recommended. For heat dissipation, connect the exposed backside pad of the QFN package to a large analog ground plane, preferably on a surface of the board that receives good airflow. If the ground plane is located on the top layer, make use of the N.C. pins adjacent to GND to lower thermal resistance to the ground plane. If the ground is located elsewhere, use several vias to lower thermal resistance. Typical applications use multiple ground planes to minimize thermal resistance. Avoid large AC currents through the analog ground plane. Voltage Positioning In applications where the load transients are extremely fast (>10A/µs), the total output capacitance has to be large enough to handle the VSAG and VSOAR requirements while keeping within the output tolerance limits. Voltage positioning reduces the total amount of output capacitance needed to meet a given transient response requirement. With voltage positioning, the ______________________________________________________________________________________ 11 MAX1809 3A, 1MHz, DDR Memory Termination Supply output regulates at a slightly lower voltage under a given load, allowing more voltage headroom as the load changes suddenly to zero or to the opposite polarity (sinking mode). By utilizing the full-voltage tolerance limits, the total output capacitance can be reduced and the capacitor’s ESR can be increased. Choose RDROOP such that the output voltage at the maximum load current, including ripple, is just above the lower limit of the output tolerance. RDROOP ✕ IOUT(MAX) ≤ VOUT(TYP) - VOUT(MIN)(VRIPPLE / 2) Voltage positioning results in some loss in efficiency due to the power dissipated in RDROOP. The maximum power loss is given by RDROOP ✕ IOUT(MAX)2. RDROOP must be able to handle this power. SHDN 0 1.8V VSS (V) 0.7V 0 ILIMIT ILIMIT (A) 0 t Figure 7. Soft-Start Current Limit Over Time VDDQ LINE RECEIVERS Ceramic Output Capacitor Applications Ceramic capacitors have advantages and disadvantages. They have ultra-low ESR and are noncombustible, relatively small, and nonpolarized. They are also expensive and brittle, and their ultra-low ESR characteristic can result in excessively low output-voltage ripple (affecting stability in nonvoltage-positioned circuits). In addition, their relatively low capacitance value can cause output overshoot when going abruptly from full-load sourcing to full-load sinking conditions, unless the inductor value can be made small (high switching frequency), or there are some bulk tantalum or electrolytic capacitors in parallel to absorb the stored energy in the inductor. In some cases, there may be no room for electrolytics, creating a need for a DC-DC design that uses nothing but ceramics. The MAX1809 can take full advantage of the small size and low ESR of ceramic output capacitors in a voltagepositioned circuit. The addition of the positioning resistor increases the ripple at FB, satisfying the minimum feedback ripple voltage requirement. Output overshoot (V SOAR) determines the minimum output capacitance requirement (see the Output Capacitor Selection). Often the switching frequency is set as high as possible (near 1000kHz), and the inductor value is reduced to minimize the energy transferred from inductor to capacitor during load-step recovery. Input Source The output of the MAX1809 can accept current due to the reversible properties of the buck and the boost converter. When voltage at the output of the MAX1809 (low-voltage port) exceeds or equals the output set voltage the flow of energy reverses, going from the output to the input (high-voltage port). If the input (highvoltage port) is not connected to a low-impedance 12 COMMON BUS TERMINATION RESISTOR VOUT (MAX1809) + V /2 = VTT - DDQ Figure 8. Active Bus Termination source capable of absorbing energy, the voltage at the input will rise. This voltage can violate the absolute maximum voltage at the input of the MAX1809 and destroy the part. This occurs when sinking current because the topology acts as a boost converter, pumping energy from the low-voltage side (the output), to the high-voltage side (the input). The input (high-voltage side) voltage is limited only by the clamping effect of the voltage source connected there. To avoid this problem, make sure the input to the MAX1809 is connected to a low impedance, two quadrant supply or that the load (excluding the MAX1809) connected to that supply consumes more power than the amount being transferred from the MAX1809 output to the input. Active Bus Termination DDR memory architecture is a high-speed system that clocks data on both the rising and falling edges of the clock. This increases the data rate, and at the same time increases the system power dissipation. Highspeed digital logic requires termination of the buses to minimize ringing and reflection. Using an active termination scheme reduces the power dissipation of the bus. By connecting the termination resistors to a supply voltage (VTT) that is half the memory voltage (VDDQ), ______________________________________________________________________________________ 3A, 1MHz, DDR Memory Termination Supply L IN MAX1809 INPUT VOLTAGE (3V TO 5.5V) VTT = VDDQ/2 LX CIN FB COUT MAX1809 10Ω SHDN VCC (a) PGND 2.2µF 2N7002 GND SHDN VDDQ (2.5V) SHDN (b) 10kΩ 0.1µF 10kΩ 0.1µF EXTREF VSSQ Figure 9. Discharging the Output of the MAX1809 in Shutdown Pin Configurations (continued) INPUT VOLTAGE (3V TO 5.5V) L IN LX CIN VTT =VDDQ/2 FB 10Ω 100Ω VCC MAX1809 COUT TOP VIEW IN 2 15 PGND LX 3 14 LX PGND IN 4 2.2µF 16 LX SHDN 1 MAX1809 13 PGND GND SHDN SHDN SS 0.01µF SS 5 12 VCC EXTREF 6 11 GND TOFF 7 10 REF FB 8 Figure 10. Starting the MAX1809 in Sinking Mode with VOUT >VEXTREF the dissipation in the termination resistor is halved compared to a termination scheme that connects the resistive terminators to ground. The VTT supply requires that it regulates to half the memory voltage (V DDQ ), tracks the changes of the memory voltage, and is able to source and sink current depending on the state of the bus. These requirements are met in the MAX1809. Discharging the Output in Shutdown When SHDN is brought low after the controller has been on for a while, the output may remain high if there is no leakage or discharge path to bring the output down. For DDR memory systems, keeping VTT at 1.25V when VDDQ (2.5V) is shut down violates the DDR specifications. This can result in the bus latching if the sys- 9 GND QSOP tem is subsequently turned on or possibly damaging the memory subsystem. When using the MAX1809 to generate the VTT output of 1.25V, several circuits are recommended to discharge the output when the MAX1809 is shut down. These are shown in Figure 9. Solution (a) is a diode added from VTT to VDDQ so that VTT is discharged when VDDQ goes low. Alternatively, solution (b) uses a small signal transistor to discharge VTT when the MAX1809 is shut down. Startup in Sinking Mode The MAX1809 will not startup until the feedback voltage is made less than the external reference voltage when power is applied or when the part is exiting shutdown. In applications that cannot guarantee VFB < VEXTREF ______________________________________________________________________________________ 13 before startup, a 100Ω resistor should be added in the feedback path, and a diode from FB to SS as shown in Figure 10. SS will keep FB low during the startup sequence, ensuring that the MAX1809 enters into PWM mode and begins sinking current. See the Soft-Start Sink Current specification in the Electrical Characteristics for resistor selection. Chip Information TRANSISTOR COUNT: 3662 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 32L QFN .EPS MAX1809 3A, 1MHz, DDR Memory Termination Supply 14 ______________________________________________________________________________________ 3A, 1MHz, DDR Memory Termination Supply ______________________________________________________________________________________ 15 MAX1809 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) QSOP.EPS MAX1809 3A, 1MHz, DDR Memory Termination Supply 16 ______________________________________________________________________________________ 3A, 1MHz, DDR Memory Termination Supply b CL 0.10 M C A B D2/2 D/2 PIN # 1 I.D. QFN THIN 5x5x0.8 .EPS D2 0.15 C A D k 0.15 C B PIN # 1 I.D. 0.35x45 E/2 E2/2 CL (NE-1) X e E E2 k L DETAIL A e (ND-1) X e CL CL L L e e 0.10 C A C 0.08 C A1 A3 PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE 16, 20, 28, 32L, QFN THIN, 5x5x0.8 mm APPROVAL COMMON DIMENSIONS DOCUMENT CONTROL NO. REV. 21-0140 C 1 2 EXPOSED PAD VARIATIONS NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220. 10. WARPAGE SHALL NOT EXCEED 0.10 mm. PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE 16, 20, 28, 32L, QFN THIN, 5x5x0.8 mm APPROVAL DOCUMENT CONTROL NO. REV. 21-0140 C 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17 © 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX1809 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)