LTC4354 Negative Voltage Diode-OR Controller and Monitor U FEATURES DESCRIPTIO ■ The LTC®4354 is a negative voltage diode-OR controller that drives two external N-channel MOSFETs. It replaces two Schottky diodes and the associated heatsink, saving power and area. The power dissipation is greatly reduced by using N-channel MOSFETs as the pass transistors. Power sources can easily be ORed together to increase total system power and reliability. ■ ■ ■ ■ ■ ■ ■ ■ Controls N-Channel MOSFETs Replaces Power Schottky Diodes 1µs Turn-off Time Limits Peak Fault Current 80V Operation Smooth Switchover Without Oscillation No Reverse DC Current Fault Output Selectable Fault Thresholds Available in 8-Pin (3mm × 2mm) DFN and 8-Pin SO Packages U APPLICATIO S ■ ■ ■ ■ ■ When first powered up, the MOSFET body diode conducts the load current until the pass transistor is turned on. The LTC4354 servos the voltage drop across the pass transistors to ensure smooth transfer of current from one transistor to the other without oscillation. The MOSFETs are turned off in less than 1µs whenever the corresponding power source fails or is shorted. Fast turnoff prevents the reverse current from reaching a level that could damage the pass transistors. AdvancedTCA® Systems –48V Distributed Power Systems Computer Systems/Servers Telecom Infrastructure Optical Networks A fault detection circuit with an open drain output capable of driving an LED or opto-coupler indicates either MOSFET short, MOSFET open or supply failed. , LTC and LT are registered trademarks of Linear Technology Corporation. AdvancedTCA is a registered trademark of the PIC Industrial Computer Manufacturers Group. U TYPICAL APPLICATIO –48V Diode-OR Power Dissipation vs Load Current 6 –48V_RTN 12k 33k VCC LTC4354 DA DB 2k GA LOAD FAULT GB 2k VSS 1µF LED POWER DISSIPATION (W) 5 DIODE (MBR10100) 4 POWER SAVED 3 2 1 FET (IRF3710) VA = –48V 4354 TA01 IRF3710 VB = –48V IRF3710 0 0 2 4 6 CURRENT (A) 8 10 4354 TA01b 4354f 1 LTC4354 U W W W ABSOLUTE AXI U RATI GS (Note 1) ICC (100µs duration) ............................................. 50mA Output Voltages GA, GB ....................................... –0.3V to VCC + 0.3V FAULT .................................................... –0.3V to 7V Input Voltages DA, DB .................................................. –0.3V to 80V Input Current DA, DB, Reverse Current ................................. 20mA Operating Temperature Range LTC4354C ............................................... 0°C to 70°C LTC4354I ............................................. –40°C to 85°C Storage Temperature Range ................. –65°C to 150°C Lead Temperature (Soldering, 10 sec.)................. 300°C U W U PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER TOP VIEW 8 DB DA 1 VSS 2 VCC 3 GA 4 9 7 FAULT 6 GB 5 VSS DDB8 PACKAGE 8-LEAD (3mm × 2mm) PLASTIC DFN EXPOSED PAD (PIN 9) CONNECTION TO PCB OPTIONAL TJMAX = 125°C, θJA = 76°C/W LTC4354CDDB LTC4354IDDB DDB8 PART MARKING LBBK LBMB ORDER PART NUMBER TOP VIEW DA 1 8 DB VSS 2 7 FAULT VCC 3 6 GB GA 4 5 VSS S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 125°C, θJA = 150°C/W LTC4354CS8 LTC4354IS8 S8 PART MARKING 4354 4354I Consult LTC Marketing for parts specified with wider operating temperature ranges. 4354f 2 LTC4354 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. ICC = 5mA, VSS = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS VZ Internal Shunt Regulator Voltage ICC = 5mA ∆VZ Internal Shunt Regulator Load Regulation ICC = 2mA to 10mA VCC Operating Voltage Range ICC VCC Supply Current ● ● VCC = (VZ – 0.1V), Note 2 VCC = 5V ● ● MIN TYP MAX UNITS 10.25 11 11.75 V 200 300 4.5 0.5 1.2 0.8 mV VZ V 2 1.1 mA mA VGATE GATE Pins Output High Voltage VCC = 10.25V VCC = 5V 10 4.75 IGATE GATE Pins Pull-Up Current GATE Pins Pull-Down Current VSD = 60mV; VGATE = 5.5V VSD = 0V; VGATE = 5.5V –15 15 ∆VSD Source Drain Sense Threshold Voltage (VSS – VDX) ● 10 30 55 mV ∆VSD(FLT) Source Drain Fault Detection Threshold (VSS – VDX) ● 200 260 320 mV tOFF Gate Turn-Off Time in Fault Condition CGATE = 3300pF; VGATE ≤ 2V; VOVERDR = 0.5V 0.7 1.2 µs VFAULT FAULT Pin Output Low IFAULT = 5mA ● 200 400 mV IFAULT FAULT Pin Leakage Current VFAULT = 5V ● ±1 µA ID Drain Pin Input Current VDX = 0V VDX = 80V –1.5 1.9 µA mA Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: ICC is defined as the current level where the VCC voltage is lower by 100mV from the value with 2mA of current. –3.5 1.1 –30 30 –2.5 1.5 10.25 V V –60 60 µA µA Note 3: An internal shunt regulator limits the VCC pin to less than 12V above VSS. Driving this pin to voltages beyond the clamp may damage the part. Note 4: All currents into pins are positive; all voltages are referenced to VSS unless otherwise specified. 4354f 3 LTC4354 U W TYPICAL PERFOR A CE CHARACTERISTICS Source Drain Sense Voltage vs Supply Voltage Shunt Regulator Voltage vs Input Current at Temperature 11.4 40 11.5 11.2 35 11.0 11.0 ∆VSD (mV) 12.0 VZ (V) VZ (V) Shunt Regulator Voltage vs Input Current Specifications are at TA = 25°C, ICC= 5mA, VSS= 0V unless otherwise noted. ICC = 10mA 30 ICC = 5mA 10.8 10.5 25 ICC = 2mA 10.0 0 5 10 15 10.6 –50 –25 20 ICC (mA) 20 0 25 50 75 TEMPERATURE (°C) 100 Source Drain Sense Voltage vs Temperature 60 40 30 40 50 70 60 ∆VSD (mV) 4354 G04 90 –3.0 230 VDX = 0V 100 125 –2.8 4354 G06 –2.4 –50 –25 125 VDX = 80V 1.55 1.50 1.45 –2.6 0 25 50 75 TEMPERATURE (°C) 100 Drain Pin Current vs Temperature 1.60 ID (mA) 270 ID (µA) –3.2 250 50 75 0 25 TEMPERATURE (°C) 4354 G05 Drain Pin Current vs Temperature 290 210 –50 –25 80 4354 G07 Fault Threshold Voltage vs Temperature 12 700 660 –50 –25 0 125 11 680 20 100 10 720 tOFF (ns) IGATE(UP) (µA) 25 50 75 0 25 TEMPERATURE (°C) 9 8 VCC (V) 740 80 35 20 –50 –25 7 Gate Turn-Off Time vs Temperature 100 30 6 4354 G03 IGATE(UP) vs ∆VSD 40 ∆VSD (mV) 5 4354 G02 4354 G01 ∆VSD(FLT) (mV) 125 0 25 50 75 TEMPERATURE (°C) 100 125 4354 G08 1.40 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 4354 G09 4354f 4 LTC4354 U U U PI FU CTIO S DA, DB (Pins 1, 8): Drain Voltage Sense Inputs. These pins sense source-drain voltage drop across the N-Channel MOSFETs. An external resistor is recommended to protect these pins from transient voltages exceeding 80V in extreme fault conditions. For Kelvin sensing, connect these pins as close to the drains as possible. Connect to VSS if unused. prevents excessive reverse currents. Leave the pins open if unused. VSS (Pins 2, 5): Negative Supply Voltage Input. This is the device negative supply input and connects to the common source connection of the N-Channel MOSFETs. It also connects to the source voltage sense input of the servo amplifiers. For Kelvin sensing, connect pin 5 as close to the common source terminal of the MOSFETs as possible. VCC (Pin 3): Positive Supply Voltage Input. Connect this pin to the positive side of the supply through a resistor. An internal shunt regulator that can sink up to 20mA typically clamps VCC at 11V. Bypass this pin with a 1µF capacitor to VSS. FAULT (Pin 7): Fault Output. Open drain output that normally pulls the FAULT pin to VSS and shunts current to turn off an external LED or optocoupler. In the fault condition, where the pass transistor is fully on and the voltage drop across it is higher than the fault threshold, the FAULT pin goes high impedance, turning on the LED or optocoupler. This indicates that one or both of the pass transistors have failed open or failed short creating a cross conduction current in between the two power supplies. Connect to VSS if unused. GA, GB (Pins 4, 6): Gate Drive Outputs. Gate pins pull high to 10V minimum, fully enhancing the N-Channel MOSFET, when the load current creates more than 30mV of drop across the FET. When the load current is small, the gates are actively servoed to maintain a 30mV drop across the MOSFET. If reverse current develops more than –60mV of voltage drop across the MOSFET, the pins pull low to VSS in less than 1µs. Quickly turning off the pass transistors EXPOSED PAD (Pin 9): Exposed pad is common to VSS and may be left open or connected to pins 2 and 5. W FU CTIO AL DIAGRA U VCC 3 BV = 11V 5 + – + – 30mV VSS 30mV + AMP A 4 GA – 1 DA + AMP B 6 GB – FAULT 7 8 FAULT DETECTION 2 DB VSS VSS 4354 FD01 4354f 5 U LTC4354 W UW TI I G DIAGRA VDX – VSS 400mV –100mV 2V VGATE tOFF 4354 TD01 U OPERATIO High availability systems often employ parallel-connected power supplies or battery feeds to achieve redundancy and enhance system reliability. ORing diodes have been a popular means of connecting these supplies at the point of load. The disadvantage of this approach is the significant forward voltage drop and resulting efficiency loss. This drop reduces the available supply voltage and dissipates significant power. A desirable circuit would behave like diodes but without the voltage drop and the resulting power dissipation. The LTC4354 is a negative voltage diode-OR controller that drives two external N-channel MOSFETs as pass transistors to replace ORing diodes. The MOSFETs are connected together at the source pins. The common source node is connected to the VSS pin which is the negative supply of the device. It is also connected to the positive inputs of the amplifiers that control the gates to regulate the voltage drop across the pass transistors. Using N-channel MOSFETs to replace Schottky diodes reduces the power dissipation and eliminates the need for costly heat sinks or large thermal layouts in high power applications. At power-up, the initial load current flows through the body diode of the MOSFET and returns to the supply with the lower terminal voltage. The associated gate pin will immediately start ramping up and turn on the MOSFET. The amplifier tries to regulate the voltage drop between the source and drain connections to 30mV. If the load current causes more than 30mV of drop, the gate rises to further enhance the MOSFET. Eventually the MOSFET gate is driven fully on and the voltage drop is equal to the RDS(ON) • ILOAD. When the power supply voltages are nearly equal, this regulation technique ensures that the load current is smoothly shared between them without oscillation. The current level flowing through each pass transistor depends on the RDS(ON) of the MOSFET and the output impedance of the supplies. In the case of supply failure, such as if the supply that is conducting most or all of the current is shorted to the return side, a large reverse current starts flowing through the MOSFET that is on, from any load capacitance and through the body diode of the other MOSFET, to the second supply. The LTC4354 detects this failure condition as soon as it appears and turns off the MOSFET in less than 1µs. This fast turn-off prevents the reverse current from ramping up to a damaging level. In the case where the pass transistor is fully on but the voltage drop across it exceeds the fault threshold, the FAULT pin goes high impedance. This allows an LED or optocoupler to turn on indicating that one or both of the pass transistors have failed. The LTC4354 is powered from system ground through a current limiting resistor. An internal shunt regulator that can sink up to 20mA clamps the VCC pin to 11V above VSS. A 1µF bypass capacitor across VCC and VSS pins filters supply transients and supplies AC current to the device. 4354f 6 LTC4354 U W U U APPLICATIO S I FOR ATIO Input Power Supply The power supply for the device is derived from –48_RTN through an external current limiting resistor (RIN). An internal shunt regulator clamps the voltage at VCC pin to 11V. A 1µF decoupling capacitor to VSS is recommended. It also provides a soft-start to the part. RIN should be chosen to accommodate the maximum supply current requirement of 2mA at the expected input operating voltage. RIN ≤ ( VIN(MIN) − VZ(MAX) ) ICC(MAX) The power dissipation of the resistor is calculated at the maximum DC input voltage: ( VIN(MAX) − VCC(MIN) )2 P= RIN If the power dissipation is too high for a single resistor, use multiple low power resistors in series instead of a single high power component. MOSFET SELECTION The LTC4354 drives N-channel MOSFETs to conduct the load current. The important features of the MOSFETs are on-resistance RDS(ON), the maximum drain-source voltage VDSS, and the threshold voltage. The gate drive for the MOSFET is guaranteed to be more than 10V and less than 12V. This allows the use of standard threshold voltage N-channel MOSFETs. An external zener diode can be used to clamp the potential at the VCC pin to as low as 4.5V if the gate to source rated breakdown voltage is less than 12V. The maximum allowable drain-source voltage, V(BR)DSS, must be higher than the supply voltages. If the inputs are shorted, the full supply voltage will appear across the MOSFETs. The LTC4354 tries to servo the voltage drop across the MOSFET to 30mV in the forward direction by controlling the gate voltage and sends out a fault signal when the voltage drop exceeds the 250mV fault threshold. The RDS(ON) should be small enough to conduct the maximum load current while not triggering a fault, and to stay within the MOSFET’s power rating at the maximum load current (I2 • RDS(ON)). Fault Conditions LTC4354 monitors fault conditions and turns on an LED or optocoupler to indicate a fault. When the voltage drop across the pass transistor is higher than the 250mV fault threshold, the internal pull-down at the FAULT pin turns off and allows the current to flow through the LED or optocoupler. Conditions that cause high voltage across the pass transistor include: short in the load circuitry, excessive load current, FET open while conducting current, and FET short on the channel with the higher supply voltage. The fault threshold is internally set to 250mV. 4354f 7 LTC4354 U U W U APPLICATIO S I FOR ATIO System Power Supply Failure LTC4354 automatically supplies load current from the system supply with the more negative input potential. If this supply is shorted to the return side, a large reverse current flows from its pass transistor. When this reverse current creates –60mV of voltage drop across the drain and source pins of the pass transistor, the LTC4354 drives the gate low fast and turns it off. The remaining system power supply will deliver the load current through the body diode of its pass transistor until the channel turns on. The LTC4354 ramps the gate up and turns on the N-Channel MOSFET to reduce the voltage drop across it, a process that takes less than 1ms depending on the gate charge of the MOSFET. Drain Resistor If this voltage is higher than 80V, the internal ESD devices at the DA and DB pins might break down and become damaged. The external drain resistors limit the current into the pins and protect the ESD devices. A 2k resistor is recommended for 48V applications. Larger resistor values increase the source drain sense threshold voltage due to the input current at the drain pins. Loop Stability The servo loop is compensated by the parasitic capacitance of the power N-channel MOSFET. No further compensation components are normally required. In the case when a MOSFET with very small parasitic capacitance is chosen, a 1000pF compensation capacitor connected across the gate and source pins might be required. Design Example Two resistors are required to protect the DA and DB pins from transient voltages higher than 80V. In the case when the supply with the lower potential is shorted to the return side due to supply failure, a reverse current flows briefly through the pass transistor to the other supply to discharge the output capacitor. This current stores energy in the stray inductance along the current path. Once the pass transistor is turned off, this energy forces the drain terminal of the FET high until it reaches the breakdown voltage. The following demonstrates the calculations involved for selecting components in a –36V to –72V system with 5A maximum load current, see Figure 1. First, select the input dropping resistor. The resistor should allow 2mA of current with the supply at –36V. RIN ≤ (36 V − 11.5V) = 12.25k 2mA The nearest lower 5% value is 12k. –48V_RTN RIN 12k 0.5W R3 33k 3 VCC LTC4354 DA 1 R1 2k VA VB DB 8 R2 2k GA 4 FAULT GB 6 TO MODULE INPUT 7 VSS 2, 5 CIN 1µF D1 LED 4354 F01 M1 IRF3710S M2 IRF3710S Figure 1. –36V to –72V/5A Design Example 4354f 8 LTC4354 U U W U APPLICATIO S I FOR ATIO The worst case power dissipation in RIN: P= The LED, D1, requires at least 1mA of current to fully turn on, therefore R3 is set to 33k to accommodate lowest input supply voltage of –36V. (72V − 10.5V)2 = 0.315W 12k Layout Considerations Choose a 12k 0.5W resistor or use two 5.6k 0.25W resistors in series. The following advice should be considered when laying out a printed circuit board for the LTC4354. Next, choose the N-channel MOSFET. The 100V, IRF3710S in D2Pak package with RDS(ON) = 23mΩ (max.) offers a good solution. The maximum voltage drop across it is: The bypass capacitor provides AC current to the device so place it as close to the VCC and VSS pins as possible. The inputs to the servo amplifiers, DA, DB and VSS pins, should be connected directly to the MOSFETs’ terminals using Kelvin connections for good accuracy. ∆V = (5A)(23mΩ) = 115mV The maximum power dissipation in the FET is a mere: Keep the traces to the MOSFETs wide and short. The PCB traces associated with the power path through the MOSFETs should have low resistance. P = (5A)(115mV) = 0.6W R1 and R2 are chosen to be 2k to protect DA and DB pins from being damaged by high voltage spikes that can occur during an input supply fault. –5.2V Diode-Or Controller GND R3 2k 3 VCC LTC4354 DA 1 VA = –5.2V VB = –5.2V DB 8 GA 4 FAULT GB 6 LOAD 7 VSS 2, 5 CIN 1µF D1 LED 4354 TA02 M1 Si4466DY M2 Si4466DY 4354f 9 LTC4354 U U W U APPLICATIO S I FOR ATIO –36V to –72V/20A High Current with Parallel FETs –48V_RTN RTN RIN1 10k R3 30k 3 VCC LTC4354 DA DB 1 R1 2k FAULT GA 8 R2 2k VA = –48V VSS GB 4 7 6 2, 5 CIN1 1µF D1 LED –48V OUT M1 IRF3710 M2 IRF3710 RTN RIN2 10k R6 30k 3 VCC LTC4354 DA DB 1 R4 2k FAULT GA 8 R5 2k VB = –48V VSS GB 4 7 6 2, 5 CIN2 1µF D2 LED 4354 F03 M3 IRF3710 M4 IRF3710 –12V Diode-OR Controller GND RIN 2k IN754 BV = 6.8V R3 10k 3 VCC CIN 1µF LTC4354 DA 1 VA = –12V VB = –12V DB 8 GA 4 FAULT GB 6 DZ LOAD 7 VSS 2, 5 D1 LED 4354 TA04 M1 Si4862DY M2 Si4862DY 4354f 10 LTC4354 U PACKAGE DESCRIPTIO DDB Package 8-Lead Plastic DFN (3mm × 2mm) (Reference LTC DWG # 05-08-1702) 0.61 ±0.05 (2 SIDES) R = 0.115 TYP 5 0.56 ± 0.05 (2 SIDES) 3.00 ±0.10 (2 SIDES) 0.675 ±0.05 2.50 ±0.05 1.15 ±0.05 PACKAGE OUTLINE 2.00 ±0.10 (2 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) 0.25 ± 0.05 4 0.25 ± 0.05 0.75 ±0.05 0.200 REF 0.50 BSC 2.20 ±0.05 (2 SIDES) 0.38 ± 0.10 8 (DDB8) DFN 1103 0.50 BSC 2.15 ±0.05 (2 SIDES) 0 – 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 1 PIN 1 CHAMFER OF EXPOSED PAD BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .189 – .197 (4.801 – 5.004) NOTE 3 .045 ±.005 .050 BSC 8 .245 MIN 7 6 5 .160 ±.005 .150 – .157 (3.810 – 3.988) NOTE 3 .228 – .244 (5.791 – 6.197) .030 ±.005 TYP 1 RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° (0.254 – 0.508) .008 – .010 (0.203 – 0.254) 3 4 .053 – .069 (1.346 – 1.752) .004 – .010 (0.101 – 0.254) 0°– 8° TYP .016 – .050 (0.406 – 1.270) NOTE: 1. DIMENSIONS IN 2 .014 – .019 (0.355 – 0.483) TYP INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) .050 (1.270) BSC SO8 0303 4354f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC4354 U TYPICAL APPLICATIO –48V Diode-OR Controller with Fuse Monitoring –48V_RTN 12k 0.5W 33k VCC LTC4354 DA DB 2k LOAD FAULT VSS GB GA LED 2k 1µF VA = –48V 4354 TA05 IRF540NS VB = –48V IRF540NS RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1640AH/LT1640AL Negative High Voltage Hot Swap™ Controllers in SO-8 Negative High Voltage Supplies from –10V to –80V LT4250 –48V Hot Swap Controller Active Current Limiting, Supplies from –20V to –80V LTC4251/LTC4251-1 LTC4251-2 –48V Hot Swap Controllers in SOT-23 Fast Active Current Limiting, Supplies from –15V LTC4252-1/LTC4252-2, LTC4252-1A/LTC4252-2A –48V Hot Swap Controllers in MS8/MS10 Fast Active Current Limiting, Supplies from –15V, Drain Accelerated Response LTC4253 –48V Hot Swap Controller with Sequencer Fast Active Current Limiting, Supplies from –15V, Drain Accelerated Response, Sequenced Powergood Outputs LT4351 MOSFET Diode-OR Controller N-Channel MOSFET, 1.2V to 18V, Fast Switching for High Current LTC4412 Low Loss PowerPath™ Controller in ThinSOT™ P-Channel MOSFET, 3V to 28V Range Hot Swap, PowerPath and ThinSOT are trademarks of Linear Technology Corporation. 4354f 12 Linear Technology Corporation LT/TP 0704 1K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2004