MAXIM MAX3510EEP

19-1398; Rev 4; 5/07
KIT
ATION
EVALU
E
L
B
A
IL
AVA
Upstream CATV Amplifier
Features
The MAX3510 is a programmable power amplifier for
use in CATV upstream applications. The device outputs
up to 64dBmV (continuous wave) through a 2:1 (voltage
ratio) transformer. It features variable gain controlled by
a 3-wire digital serial bus. Gain control is available in
1dB steps. The device operates over a frequency
range of 5MHz to 65MHz.
♦ Ultra-Low Power-Up/Down Transients,
7mV Typical at 59dBmV Output
The MAX3510 offers a transmit-disable mode, which
places the device in a high-isolation state for use
between bursts in TDMA systems. In this mode the output stage is shut off, minimizing output noise. When
entering and leaving transmit-disable mode, transients
are kept to 7mV nominal at full gain. In addition, supply
current is reduced to 25mA.
Two power-down modes are available. Software-shutdown
mode permits power-down of all analog circuitry while
maintaining the programmed gain setting. Shutdown
mode disables all circuitry and reduces current consumption to less than 10µA.
The MAX3510 is available in a 20-pin QSOP package
for the extended-industrial temperature range (-40°C to
+85°C).
♦ Low Transmit Output Noise Floor: -47dBmV
(160kHz BW)
♦ Single +5V Supply
♦ Output Level Ranges from <8dBmV to 64dBmV
♦ Gain Programmable in 1dB Steps
♦ Low Transmit-Disable Output Noise: -70dBmV
♦ Two Power-Down Modes
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX3510EEP
-40°C to +85°C
20 QSOP
MAX3510EEP+
-40°C to +85°C
20 QSOP
+Denotes lead-free package.
Applications
Cable Modems
CATV Set-Top Boxes
Telephony-Over-Cable
CATV Status Monitors
Pin Configuration appears at end of data sheet.
Typical Operating Circuit
12
CONTROL
LOGIC
SHDN
GND2
TXEN
VCC2
19
18
CEXT1
0.001µF
5
+
0.0033µF
6
0.1µF
OUTPUT
+5V
MAX3510
+5V
2:1
16
ANTI-ALIAS
FILTER
–
0.1µF
+5V
17
VIN+
VOUT+
INPUT
20
0.001µF 2
4
3
7
1
VIN-
VOUT-
15
0.1µF
0.1µF
VCC1
GND1
GND
CEXT2
N.C.
GND
14
13
11
10
SCLK
GND
GND
SDA
CS
9
8
CONTROL
LOGIC
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX3510
General Description
MAX3510
Upstream CATV Amplifier
ABSOLUTE MAXIMUM RATINGS
VCC (VCC1, VCC2), VOUT+, VOUT- ................... -0.5V to +10.0V
Input Voltage Levels (all inputs),
CEXT1, CEXT2.........................................-0.3V to (VCC + 0.3V)
Continuous Input Voltage (VIN+, VIN-) ...............................2VP-P
Continuous Current (VOUT+, VOUT-).................................80mA
Continuous Power Dissipation (TA = +70°C)
20-Pin QSOP (derate at 12.3mW/°C above +70°C)....1067mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +165°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +4.75V to +5.25V, TXEN = SHDN = high, D7 = 1, TA = -40°C to +85°C, unless otherwise noted. No input signal applied.
Typical parameters are at TA = +25°C.)
PARAMETER
SYMBOL
MAX
UNITS
5.25
V
109
126
mA
TXEN = low
26
30
mA
ICC
TXEN = low, D7 = 0 (Note 3)
1.4
mA
Supply Current Shutdown Mode
ICC
SHDN = low, TXEN = low
1
µA
Input High Voltage
VINH
TA = 25°C
Input Low Voltage
VINL
TA = 25°C
0.8
V
Input High Current
IBIASH
(Note 3)
100
µA
Input Low Current
IBIASL
(Note 3)
Supply Voltage
VCC
Supply Current Transmit Mode
ICC
Supply Current Transmit-Disable
Mode
ICC
Supply Current SoftwareShutdown Mode
CONDITIONS
MIN
TYP
4.75
2.0
V
-100
µA
AC ELECTRICAL CHARACTERISTICS
(VCC = +4.75V to +5.25V, TXEN = SHDN = high, D7 = 1, VIN = 34dBmV differential, output impedance = 75Ω through a 2:1 transformer, TA = -40°C to +85°C, unless otherwise noted. Typical parameters are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
Gain-control word = 1,
TA = -40°C to +85°C
Voltage Gain
AV
fIN = 5MHz
to 42MHz
(Note 3)
fIN = 10MHz
(Note 3)
Bandwidth
Output Step Size
2
Gain-control word = 63,
TA = -40°C to 0°C
26
Gain-control word = 50,
TA = -40°C to +85°C
16.7
P1dB
VOUT = 60dBmV, fIN = 42MHz
VOUT = 60dBmV, fIN = 65MHz
AV = 26dB, 42MHz (Note 1)
Gain Rolloff (Notes 1, 2)
1dB Compression Point
27
VOUT = 60dBmV, -3dB (Note 1)
fIN = 5MHz to 42MHz
(Note 3)
UNITS
-26
Gain-control word = 63,
TA = 0°C to +85°C
f3dB
MAX
dB
20.4
84
100
-1
-1.8
MHz
18.0
-0.9
-1.6
20.0
AV = -26dB to +27dB,
TA = -0°C to +85°C
0.6
1
1.4
AV = -26dB to +26dB,
TA = -40°C to 0°C
0.6
1
1.4
dB
dBm
dB
_______________________________________________________________________________________
Upstream CATV Amplifier
(VCC = +4.75V to +5.25V, TXEN = SHDN = high, D7 = 1, VIN = 34dBmV differential, output impedance = 75Ω through a 2:1 transformer, TA = -40°C to +85°C, unless otherwise noted. Typical parameters are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
Transmit Mode Noise (Note 1)
BW = 160kHz, AV = -26dB
Transmit-Disable Mode Noise
Floor
TXEN = low, BW = 160kHz,
AV = +26dB, fIN = 5MHz to 65MHz (Note 1)
Isolation in Transmit-Disable
Mode
TXEN low, gain control word = 61,
fIN = 65MHz
TXEN Transient Duration
TXEN rise/fall time < 0.1µs, TA = +25°C (Note 1)
TXEN Transient Step Size
(Note 1)
Gain = 26dB, TA = +25°C
⏐ZIN⏐
Output Impedance
ZOUT
Output Return Loss in
Transmit-Disable Mode
Two-Tone Third-Order Distortion
(Note 1)
2nd Harmonic Distortion
RL
RL
fIN = 5MHz to 65MHz, single-ended,
TA = +25°C (Note 1)
36
fIN = 5MHz to 65MHz
(Note 1)
TXEN = low,
fIN = 5MHz to 65MHz
(Note 1)
MAX
dBc
-46
dBmV
-70
dBmV
45
3.2
dB
5
7
37
0.7
3.7
mVP-P
kΩ
75
Ω
TA = 0°C
8.0
13.5
TA = +25°C
8.7
13.5
TA = +85°C
8.9
13.9
TA = 0°C
7.1
12.0
TA = +25°C
7.7
12.2
TA = +85°C
9.7
12.7
-56
dB
dB
-53
IM3
HD3
µs
1.5
Input tones at 40MHz and 40.2MHz,
VIN = 28dBmV/tone, VOUT = +54dBmV/tone,
TA = +25°C
HD2
UNITS
-78
1.4
dBc
Input tones at 65MHz and 65.2MHz,
VIN = 28dBmV/tone, VOUT = 53dBmV/tone,
TA = +25°C
-54
-51
VOUT = +54dBmV
-59
-53
VOUT = +59dBmV
-55
-50
-54
-50
VOUT = +54dBmV
-58
-53
VOUT = +59dBmV
-54
-50
fIN = 65MHz, VOUT = +59dBmV,
TA = +25°C (Note 1)
-49
-44
fIN = 33MHz, (Note 3)
TA = -40°C to +85°C
fIN = 65MHz, VOUT = +59dBmV,
TA = +25°C (Note 1)
3rd Harmonic Distortion
TYP
47
Gain = 2dB or lower, TA = +25°C
Input Impedance
Output Return Loss in Transmit
Mode
MIN
BW = 160kHz, AV = 26dB
fIN = 22MHz,
TA = -40°C to +85°C
dBc
dBc
dBc
AM to AM
AM/AM
AV = 26dB, VIN swept from 34dBmV to
38dBmV (Note 1)
0.1
dB
AM to PM
AM/PM
AV = 26dB, VIN swept from 34dBmV to
38dBmV (Note 1)
1
degrees
_______________________________________________________________________________________
3
MAX3510
AC ELECTRICAL CHARACTERISTICS (continued)
TIMING CHARACTERISTICS
(VCC = +4.75V to +5.25V, TXEN = SHDN = high, D7 = 1, TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
COMMENT
MIN
TYP
MAX
UNITS
CS to SCK Rise Setup Time
tSENS
10
ns
CS to SCK Rise Hold Time
tSENH
20
ns
SDA to SCK Setup Time
tSDAS
10
ns
SDA to SCK Hold Time
tSDAH
20
ns
SDA Pulse-Width High
tDATAH
50
ns
SDA Pulse-Width Low
tDATAL
50
ns
SCK Pulse-Width High
tSCKH
50
ns
SCK Pulse-Width Low
tSCKL
50
ns
Note 1: Guaranteed by design and characterization.
Note 2: Reference to 5MHz.
Note 3: Parameters <25°C guaranteed by design and characterization ±3.
Typical Operating Characteristics
(VCC = +5V, VIN = +34dBmV, TXEN = SHDN = high, fIN = 20MHz, ZLOAD = 75Ω through a 2:1 transformer, TA = +25°C, unless
otherwise noted.)
VOLTAGE GAIN vs. SUPPLY VOLTAGE
(GAIN STATE = 33)
108
VCC = 4.75V
106
0°C
1.2
0.8
+25°C
104
0.4
102
0
MAX3510 toc03
-40°C
1.6
26.8
VOLTAGE GAIN (dB)
VCC = 5.25V
VOLTAGE GAIN (dB)
SUPPLY CURRENT (mA)
110
2.0
MAX3510 toc01
112
VOLTAGE GAIN vs. SUPPLY VOLTAGE
(GAIN STATE = 60)
MAX3510 toc02
SUPPLY CURRENT vs. TEMPERATURE
-40°C
+25°C
+85°C
+85°C
25
50
75
100
26.6
4.75 4.8 4.85 4.9 4.95 5.0 5.05 5.1 5.15 5.2 5.25
4.75 4.8 4.85 4.9 4.95 5.0 5.05 5.1 5.15 5.2 5.25
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
VOLTAGE GAIN vs. TEMPERATURE
(GAIN STATE = 33)
VOLTAGE GAIN vs. FREQUENCY
40
MAX3510 toc04
1.6
1.4
20
VOLTAGE GAIN (dB)
1.2
1.0
5.0V
0.8
5.25V
0.6
4.75V
0.4
D
0
-10
E
-20
F
-30
G
0
-60
-50
-25
0
25
50
TEMPERATURE (°C)
75
100
1
f = 5MHz
10
0
f = 40MHz
-10
-20
GAIN-CONTROL WORD:
A = 63 C = 48 E = 24 G = 6
B = 57 D = 36 F = 12
-50
30
20
10
-40
0.2
4
A
B
C
30
VOLTAGE GAIN vs. GAIN-CONTROL WORD
40
MAX3510 toc06
0
VOLTAGE GAIN (dB)
-25
MAX3510 toc05
-50
VOLTAGE GAIN (dB)
MAX3510
Upstream CATV Amplifier
10
-30
-40
100
FREQUENCY (MHz)
1000
0
6
12 18 24 30 36 42 48 54 60
GAIN-CONTROL WORD (DECIMAL)
_______________________________________________________________________________________
Upstream CATV Amplifier
otherwise noted.)
VOLTAGE GAIN vs. GAIN-CONTROL WORD
26
1.15
GAIN STEP (dB)
f = 40MHz
24
f = 5MHz
22
20
f = 60MHz
MAX3510 toc10
MAX3510 toc08
28
VOLTAGE GAIN (dB)
1.25
MAX3510 toc07
30
OUTPUT IMPEDANCE
(75Ω REFERENCE)
GAIN STEP vs. GAIN-CONTROL WORD
5MHz
1.05
TRANSMIT-DISABLE
MODE
0.95
TRANSMIT
MODE
18
0.85
65MHz
16
14
0.75
50
52
54
56
58
60
62
64
6
12 18 24 30 36 42 48 54 60
GAIN-CONTROL WORD (DECIMAL)
OUTPUT RETURN LOSS vs. FREQUENCY
TRANSMIT OUTPUT NOISE vs. GAIN
TRANSMIT-DISABLE
MODE
12
16
-25
TRANSIENT LEVEL (mVP-P)
TRANSMIT
MODE
8
100
MAX3510 toc12
OUTPUT NOISE (dBmV IN 160kHz)
4
POWER-UP/POWER-DOWN
TRANSIENTS vs. OUTPUT LEVEL
-20
MAX3510 toc11
0
-30
-35
-40
3
9
15 21 27
0
10
GAIN (dB)
FREQUENCY (MHz)
VOUT = 60dBmV
VOUT = 57dBmV
-55
-60
VOUT = 6dBmV
-65
40
50
60
VOUT = 30dBmV
-70
-75
-35
MAX3510 toc15
-45
30
3rd HARMONIC DISTORTION vs.
INPUT FREQUENCY
3rd HARMONIC DISTORTION (dBc)
-40
20
OUTPUT LEVEL (dBmV)
2nd HARMONIC DISTORTION vs.
INPUT FREQUENCY AND OUTPUT LEVEL
-50
1
0.1
-33 -27 -21 -15 -9 -3
15 25 35 45 55 65 75 85 95 105
MAX3510 toc14
5
10
-45
-50
20
2nd HARMONIC DISTORTION (dBc)
RETURN LOSS (dB)
0
GAIN-CONTROL WORD (DECIMAL)
MAX3510 toc13
48
-40
-45
VOUT = 60dBmV
-50
VOUT = 54dBmV
-55
VOUT = 48dBmV
-60
VOUT = 24dBmV
-65
VOUT = 6dBmV
-70
-80
-75
0
10
20
30
40
50
FREQUENCY (MHz)
60
70
0
10
20
30
40
50
60
70
INPUT FREQUENCY (MHz)
_______________________________________________________________________________________
5
MAX3510
Typical Operating Characteristics (continued)
( VCC = +5V, VIN = +34dBmV, TXEN = SHDN = high, fIN = 20MHz, ZLOAD = 75Ω through a 2:1 transformer, TA = +25°C, unless
MAX3510
Upstream CATV Amplifier
Table 1. Reflection Coefficients (75Ω reference)
FREQUENCY
TRANSMIT MODE
TRANSMIT MODE
TRANSMIT DISABLE MODE
MHz
REAL S11
IMAG S11
REAL S22
IMAG S22
REAL S22
IMAG S22
1
0.937
-0.006
-0.494
0.625
-0.509
0.623
2
0.937
-0.007
-0.054
0.550
-0.075
0.577
0.257
5
0.936
-0.005
0.196
0.199
0.219
10
0.932
-0.011
0.183
0.017
0.244
0.062
20
0.932
-0.018
0.143
-0.081
0.219
-0.052
30
0.932
-0.026
0.108
-0.149
0.194
-0.121
40
0.927
-0.033
0.059
-0.199
0.158
-0.175
60
0.922
-0.054
-0.060
-0.257
0.066
-0.252
80
0.913
-0.075
-0.197
-0.252
-0.049
-0.284
120
0.889
-0.145
-0.420
-0.070
-0.281
-0.207
160
0.850
-0.249
-0.442
0.256
-0.409
0.037
200
0.753
-0.408
-0.212
0.543
-0.327
0.345
Pin Description
6
PIN
NAME
1, 3,
7, 11
FUNCTION
GND
Ground Pins
2
VCC1
Programmable-Gain Amplifier (PGA) +5V Supply. Bypass this pin to GND1 with a decoupling capacitor as
close to the part as possible.
4
GND1
PGA RF Ground. As with all ground connections, maintain the shortest possible (low-inductance) length to
the ground plane.
5
VIN+
Positive PGA Input. Along with VIN-, this port forms a high-impedance differential input to the PGA. Driving
this port differentially will increase the rejection of second-order distortion at low output levels.
6
VIN-
Negative PGA Input. When not used, this port must be AC-coupled to ground. See VIN+.
8
CS
9
SDA
Serial-Interface Data. TTL-compatible input. See the Serial Interface section.
10
SCLK
Serial-Interface Clock. TTL-compatible input. See the Serial Interface section.
12
SHDN
Shutdown. When this pin and TXEN (pin 18) are set low, all functions (including the serial interface) are disabled, leaving only leakage currents to flow.
Serial-Interface Enable. TTL-compatible input. See the Serial Interface section.
13
N.C.
14
CEXT2
No Connection
RF Output Bypass. This pin must be bypassed to ground with a 0.1µF capacitor.
15
VOUT-
Negative Output. Along with VOUT+, this port forms a 300Ω impedance output. This port is matched to a
75Ω load using a 2:1 transformer.
16
VOUT+
Positive Output. See VOUT-.
17
CEXT1
Transmit-Disable (Enable) Timing Capacitor. See the Ramp Generator section.
18
TXEN
Power-Amplifier Enable. Setting this pin low shuts off the power amplifier.
19
VCC2
Power Amplifier Bias, +5V Supply. Bypass this pin to GND2 with a decoupling capacitor as close to the part
as possible.
20
GND2
Power Amplifier Bias Ground. As with all ground connections, maintain the shortest possible (low inductance) length to the ground plane.
_______________________________________________________________________________________
Upstream CATV Amplifier
MAX3510
VOUT-
SHDN
VCC1
MAX3510
PGA BIAS
CELL
CEXT2
VOUT+
VIN+
VIN-
VCC2
DAC
SERIAL DATA INTERFACE
CS
RAMP
GENERATOR
POWER
AMP
BIAS
TXEN
CEXT1
SDA SCLK
Figure 1. Functional Diagram
Detailed Description
The following sections describe the blocks shown in the
functional diagram (Figure 1).
Programmable-Gain Amplifier
The programmable-gain amplifier (PGA) consists of the
variable-gain amplifier (VGA) and the digital-to-analog
converter (DAC), which provide better than 52dB of
output level control in 1dB steps.
The PGA is implemented as a programmable Gilbertcell attenuator. It uses a differential architecture to
achieve maximum linearity. The gain of the PGA is
determined by a 6-bit word (D5–D0) programmed
through the serial data interface (Tables 2 and 3).
Specified performance is achieved when the input is
driven differentially. The device may be driven singleended; however, a slight increase in even-order distortion may result at low output levels. To drive the device
in this manner, one of the input pins must be capacitively coupled to ground. Use a capacitor value large
enough to allow for a low-impedance path to ground at
the lowest frequency of operation. For operation down
to 5MHz, a 0.001µF capacitor is suggested.
Power Amplifier
The power amplifier is a Class A differential amplifier
capable of driving +64dBmV differentially. This architecture provides superior even-order distortion performance but requires that a transformer be used to
convert to a single-ended output. In transmit-disable
mode, the power amplifier is shut off. An internal resistor is placed across the output, so that the output
impedance remains matched when the amplifier is in
transmit-disable mode. Disabling the output devices
also allows the lowest standby noise.
To achieve the proper load line, the output impedance
of the power amplifier is 300Ω differential. To match this
output impedance to a 75Ω load, the transformer must
have a turns ratio (voltage ratio) of 2:1 (4:1 impedance
ratio).
The differential amplifier is biased directly from the +5V
supply using the center tap of the output transformer.
This provides a significant benefit when switching
between transmit mode and transmit-disable mode.
Stored energy due to bias currents will cancel within
the transformer and prevent switching transients from
reaching the load.
_______________________________________________________________________________________
7
MAX3510
Upstream CATV Amplifier
Ramp Generator
The ramp generator circuit is a simple RC charging circuit, which is used to control power-up and power-down
of the output power amplifier. It is made up of CEXT1
and an internal 2kΩ resistor. The choice of CEXT1 is governed by the period of the burst on/off cycle. CEXT1
must be small enough to fully charge/discharge within a
burst. A typical value of CEXT1 is 0.0033µF.
Serial Interface
The serial interface has an active-low enable (CS) to
bracket the data, with data clocked in MSB first on the
rising edge of SCLK. Data is stored in the storage latch
on the rising edge of CS. The serial interface controls the
state of the PGA. Tables 2 and 3 show the register format. Serial-interface timing is shown in Figure 2.
tions are disabled in this mode and current consumption is reduced to under 2mA.
Shutdown Mode
In normal operation the shutdown pin (SHDN) is held
high. When SHDN and TXEN are taken low, all circuits
within the IC are disabled. Only leakage currents flow in
this state. Data stored within the serial-data interface
latches will be lost upon entering this mode. Current
draw is reduced to 1µA (typ) in shutdown mode.
G
A
C
B
D
E
F
PGA Bias Cell
The PGA bias cell is accessed by the SHDN pin. When
this pin is taken low, the programmable-gain amplifier
and serial data interface are shut off. Note that any gain
setting stored in the serial data interface latch will be
lost. The power amplifier is unaffected by the PGA Bias
cell, therefore TXEN must be held low to be in shutdown mode. This mode lowers supply current draw to
less than 1µA typical.
D7
D5
D4
D3
D2
D1
D0
E. tSCLKH
F. tSENH
G. tDATAH/tDATAL
A. tSENS
B. tSDAS
C. tSDAH
D. tSCLKL
Power Amp Bias Cell
The power amp bias cell is used to enable and disable
bias to the output differential pair. This is controlled by
the TXEN pin (18).
D6
Figure 2. Serial-Interface Timing Diagram
Functional Modes
The MAX3510 has four functional modes controlled
through the serial interface or external pins (Table 3):
transmit mode, transmit-disable mode, software-shutdown mode, and shutdown mode.
Transmit Mode
Transmit mode is the normal active mode of the
MAX3510. The TXEN pin must be held high in this
mode. Note that SHDN must also be held high.
Transmit-Disable Mode
When in transmit-disable mode, the power amplifier is
completely shut off. This mode is activated by taking
TXEN low while keeping SHDN high. This mode is typically used between bursts in TDMA systems. Transients
are controlled by the action of the transformer balance.
Table 2. Serial-Interface Control Word
BIT
MNEMONIC
DESCRIPTION
MSB 7
D7
Software Shutdown
6
D6
Test Bit
5
D5
Gain Control, Bit 5
4
D4
Gain Control, Bit 4
3
D3
Gain Control, Bit 3
2
D2
Gain Control, Bit 2
1
D1
Gain Control, Bit 1
LSB 0
D0
Gain Control, Bit 0
Software-Shutdown Mode
Software-shutdown mode is enabled when D7 = 0 and
TXEN is low. This mode minimizes current consumption
while maintaining the programmed gain state stored in
the latch of the serial-data interface. All analog func8
_______________________________________________________________________________________
Upstream CATV Amplifier
MAX3510
Table 3. Chip-State Control Bits
SHDN
TXEN
D7
D6
D5
D4
D3
D2
D1
D0
GAIN STATE
(DECIMAL)
0
0
X
X
X
X
X
X
X
X
X
Shutdown Mode
1
0
0
X
X
X
X
X
X
X
X
Software-Shutdown Mode
1
0
1
X
X
X
X
X
X
X
X
Transmit-Disable Mode
1
1
1
X
X
X
X
X
X
X
X
Transmit Mode
1
1
1
X
0
0
0
0
0
0
0
Gain = -32dB*
1
1
1
X
0
0
0
0
0
1
1
Gain = -31dB*
1
1
1
X
—
—
—
—
—
—
—
1
1
1
X
1
0
0
0
0
0
32
1
1
1
X
—
—
—
—
—
—
—
—
1
1
1
X
1
1
1
1
1
0
62
Gain = 29dB*
1
1
1
X
1
1
1
1
1
1
63
Gain = 30dB*
STATE
—
Gain = 0dB*
*Typical gain at +25°C and VCC = +5V
Applications Information
Output Match
The MAX3510’s output circuit is an open-collector differential amplifier. An on-chip resistor across the collectors provides a nominal output impedance of 300Ω in
transmit mode and transmit disable mode.
Transformer
To match the output of the MAX3510 to a 75Ω load, a
2:1 (voltage ratio) transformer is required. This transformer must have adequate bandwidth to cover the
intended application. Note that most RF transformers
specify bandwidth with a 50Ω source on the primary
and a matching resistance on the secondary winding.
Operating in a 75Ω system will tend to shift the low-frequency edge of the transformer bandwidth specification up by a factor of 1.5, due to primary inductance.
Keep this in mind when specifying a transformer.
Bias to the output stage is provided through the center
tap on the transformer primary. This greatly diminishes
the on/off transients present at the output when switching between transmit and transmit-disable modes.
Commercially available transformers typically have
adequate balance between half-windings to achieve
substantial transient cancellation.
Finally, keep in mind that transformer core inductance
varies proportionally with temperature. If the application
requires low temperature extremes (less than 0°C),
adequate primary inductance must be present to sustain low-frequency output capability as temperatures
drop. In general this will not be a problem, as modern
RF transformers have adequate bandwidth.
Input Circuit
To achieve rated performance, the input of the
MAX3510 must be driven differentially with an appropriate input level. The differential input impedance is
approximately 1.5kΩ. Most applications will require a
differential lowpass filter preceding the device. The filter design will dictate terminating impedance of a specified value. Place this load impedance across the
AC-coupled input pins (see Typical Operating Circuit).
The MAX3510 has sufficient gain to produce an output
level of 60dBmV (CW through a 2:1 transformer) when
driven with a 34dBmV input signal. Rated performance
is achieved with this input level. When a lower input
level is present, the maximum output level will be
reduced proportionally and output linearity will
increase. If an input level greater than 34dBmV is used,
the 3rd-order distortion performance will degrade
slightly.
If a single-ended source drives the MAX3510, one of the
input terminals must be capacitively coupled to ground
(VIN+ or VIN-). The value of this capacitor must be
large enough to look like a short circuit at the lowest
frequency of interest. For operation at 5MHz with a 75Ω
source impedance, a value of 0.1µF will suffice.
_______________________________________________________________________________________
9
MAX3510
Upstream CATV Amplifier
VIN+
2kΩ
1.1pF
VIN-
Figure 3. Equivalent Input Circuit
The model for the MAX3510 input impedance is shown
in Figure 3.
Layout Issues
A well-designed printed circuit board is an essential
part of an RF circuit. For best performance pay attention to power-supply layout issues as well the output
circuit layout.
Power-Supply Layout
For minimal coupling between different sections of the
IC, the ideal power-supply layout is a star configuration.
This configuration has a large-value decoupling capacitor at the central power-supply node. The power-supply traces branch out from this node, each going to a
separate power-supply node in the MAX3510 circuit. At
the end of each of these traces is a decoupling capacitor that provides a very low impedance at the frequency of interest. This arrangement provides local powersupply decoupling at each power-supply pin.
The power supply traces must be made as thick as
practical to keep resistance well below 1Ω.
Ground inductance degrades distortion performance.
Therefore, ground plane connections to GND1 and
GND2 should be made with multiple vias if possible.
Output Circuit Layout
The differential implementation of the MAX3510’s output has the benefit of significantly reducing even-order
distortion, the most significant of which is 2nd-harmonic
distortion. The degree of distortion cancellation
depends on the amplitude and phase balance of the
overall circuit. It is critical that the traces that lead from
the output pins be exactly the same length.
10
______________________________________________________________________________________
Upstream CATV Amplifier
Chip Information
TRANSISTOR COUNT: 736
TOP VIEW
GND 1
20 GND2
VCC1 2
19 VCC2
GND 3
18 TXEN
GND1 4
VIN+ 5
17 CEXT1
MAX3510
VIN- 6
16 VOUT+
15 VOUT-
GND 7
14 CEXT2
CS 8
13 N.C.
SDA 9
12 SHDN
SCLK 10
11 GND
QSOP
______________________________________________________________________________________
11
MAX3510
Pin Configuration
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
QSOP.EPS
MAX3510
Upstream CATV Amplifier
Revision History
Pages changed at Rev 4: 1, 2, 12
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2007 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.