IRF IR2086S

Data Sheet PD No.60226
IR2086S
HIGH SPEED, 100V, SELF OSCILLATING 50% DUTY CYCLE,
FULL-BRIDGE DRIVER
Product Summary
Features
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•
•
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Simple primary side control solution to enable full-bridge
DC-Bus Converters for 48V distributed systems with reduced
component count and board space.
Frequency and dead time set by two external components
Maximum 500KHz per channel output with 50% duty cycle
Adjustable dead time 50nsec ~ 200nsec
Floating channel designed for bootstrap operation up to +100Vdc
High and low side pulse width matching to +/- 25nsec
Overcurrent protection with adjustable hiccup period.
Undervoltage lockout and internal soft start
VCC (max)
Voffset(max)
High/low side
output freq (fosc)
Output Current (IO)
High/low side pulse
edge matching
Description
The IR2086S is a self oscillating full-bridge controller and driver IC with
50% duty cycle ideally suited for 36V-75V full-bridge DC Bus Converters.
Dead time can be controlled through proper selection of CT and can range
from 50 to 200nsec. Internal soft start increases pulse width on power up
and maintains equal pulse widths for the high and low outputs throughout
the start up cycle. Undervoltage lockout prevents operation if Vcc is less than
7.5 Vdc. Over current shutdown occurs when the voltage on the Cs pin
exceeds 200mV. Restart after overcurrent trip can be delayed by adjusting
the external capacitor. The delay time ranges from 10µs to 1s.
Typical
Connection
VBUSS (100 VDC MAX)
VCC (9 ~15V)
IR2086S
CS
RT
(Refer to Lead Assignments for correct pin
configuration). This/
These diagram(s)
show electrical connections only. Please refer
to our Application
Notes and DesignTips
for proper circuit board
layout.
CT
VB1
HO1
VS1
DELAY
CT
COM2*
COM1
LO2
VS2
LO1
VCC
HO2
CD**
VB2
RSENSE
*COM2 must be shorted to COM1 for proper operation
**CD is optional
25V
100Vdc
500kHz
+/-1.2A
+/- 25ns
Package
16-Lead SOIC
IR2086S
Absolute Maximum Ratings
VBIAS (VCC, VBS) = 12V, CL = 1000 pF, and TA = 25°C unless otherwise specified.
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. All currents are defined positive into any lead. The thermal resistance and power
dissipation ratings are measured under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
-0.3
25
Units
VCC
Low side supply voltage
VB1,2
High side floating supply voltage
-0.3
150
VS1,2
High side floating supply offset voltage
VB1,2 - 25
VB1,2 + 0.3
VHO1,2
High side floating output voltage
VB1,2 - 0.3
VB1,2 + 0.3
VLO1,2
Vdc
Low side output voltage
-0.3
VCC + 0.3
VCT
CT pin voltage
-0.3
VCC + 0.3
VCS
Cs pin voltage
-0.3
VCC + 0.3
Delay pin voltage
-0.3
VCC + 0.3
Allowable offset voltage slew rate
-50
+50
V/ns
—
40
mA
—
1.0
W
°C/W
VDELAY
dVS/dt
ICC
Supply current
PD
Package power dissipation
(16-lead SOIC)
Thermal resistance, junction to ambient
(16-lead SOIC)
RthJA
—
200
TJ
Junction temperature
-55
150
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
Min.
Max.
9.5
15
°C
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol
Definition
Units
VB1,2
High side floating supply voltage
VS1,2
Steady state high side floating supply offset voltage
-5
100
VCC
Supply voltage
9.5
15
ICC
Supply current
—
1
mA
RT
Timing resistor
10
100
Kohms
CT
Timing capacitor
47
1000
pF
Operating frequency (per channel)
—
500
KHz
Junction temperature
-40
125
°C
fmax
Tj
Vdc
Note1: Care should be taken to avoid output switching conditions where the Vs node flies inductively below ground by
more than 5V.
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IR2086S
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 12V, CL = 1000 pF, and TA = 25°C unless otherwise specified.
Symbol
Min.
Typ.
tr
Turn-on rise time
Definition
—
40
Max. Units Test Conditions
60
tf
Turn-off fall time
—
20
30
450
fout
Per channel output frequency
500
550
tdt
High/low output dead time
50
—
—
PM
High/low pulse width matching
—
25
—
tdcs
Overcurrent shut down delay
—
200
—
Overcurrent restart delay
—
0.5
—
trestart
nsec
VS = 0V
KHz
Ct=100pF,
Rt=10Kohm
nsec
VS = 0V ~ 100V
sec
Vcc =15V, Cd=100nF
Static Electrical Characteristics
VBIAS (VCC, VBS) = 12V, CL = 1000 pF and TA = 25°C unless otherwise specified.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
VOH1,2
High level output voltage, (VBIAS - VO)
—
—
1.5
VOL1,2
Low level output voltage
—
—
0.1
V
Ileak
Offset supply leakage current
—
—
50
IQBS
Quiescent VBS supply current
—
—
150
IQCC
Quiescent VCC supply current
—
—
1.75
mA
VCS+
Overcurrent shutdown threshold
Undervoltage positive going threshold
—
300
—
mV
UVCC+
6.5
7.25
8.0
V
UVCC-
Undervoltage negative going threshold
6.0
6.8
7.7
IO+
Output high short circuit current
—
1.2
—
IO-
Output low short circuit current
—
1.2
—
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µA
A
3
IR2086S
Functional Block Diagrams
VCC
VB1
dv/dt
BOOSTER1
UVLO
UVBS1
DEAD
TIME
CT
PULSE
STEERING
OSC
HV LEVEL
SHIFTER1
R
HO1
S
VS1
VCC
COMP
SOFT
START
DELAY
MATCH 1
LO1
VB2
dv/dt
BOOSTER2
DELAY
R QN
CS
COMP
200mV
COM
S
R
HO2
S
Q
OVER CURRENT
SENSE WITH
DELAYED RESTART
IR2086S
SELF OSCILLATING
FULL BRIGDE DRIVER
WITH SOFT START,
OVER CURRENT
SHUT DOWN, AND
DELAYED RESTART
4
HV LEVEL
SHIFTER2
UVBS2
VS2
VCC
DELAY
MATCH 2
LO2
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IR2086S
Lead Definitions
Lead Assignments
Symbol Description
1
n/c
2
CS
HO1 15
3
DELAY
VS1 14
4
CT
High side output
5
COM1
LO2 12
LO1,2
Low side output
6
LO1
VS1 11
CT
Oscillator Input
7
VCC
HO2 10
CS
Current sense input
8
n/c
VB2
DELAY
Over current restart delay
VCC
COM1,2
Supply
VB1,2
VS1,2
High side floating supply
Floating supply return
HO1,2
Supply return
IR2086S
VB1 16
COM2 13
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Detailed Pin Description
Cs: The input pin to the overcurrent comparator. Exceeding the overcurrent threshold value specified in
“Static Electrical Parameters” Section will terminate output pulses. A new soft start cycle will commence after
the expiration of the programmed delay time at DELAY pin.
DELAY: Delay programming pin for restart after overcurrent condition. A capacitor connected to this pin will
determine the delay form the over current trip to the beginning of a new soft start cycle. The delay time ranges
from 10us to 1s, and is set according to:
td ≈
Cd Vcc
+ 10us
2uA
CT: The oscillator-programming pin. Only two components are required to program the internal oscillator
frequency: a resistor connected between the Vcc pin and the CT pin, and a capacitor connected from the CT
pin to GND. The approximate oscillator frequency is determined by the following simple formula:
fosc = 1 / (2 · RT · CT)
Where frequency is in Hertz (Hz), RT resistance in Ohms (Ω) and CT capacitance in Farads (F). The recommended range of timing resistors is between 10kΩ and 100kΩ and range of time capacitances is between
47pF and 470pF. The timing resistors less than 10kΩ should be avoided.
The value of the timing capacitor determines the amount of dead time between the two output drivers: lower
the CT, shorter the dead time and vice versa. It is not recommended to use a timing capacitor below 47pF.
For best performance, keep the time components as close as possible to the IR2086S. Separated ground and
Vdd traces to the timing components are encouraged.
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IR2086S
Detailed Pin Description continued
COM1, COM2: Signal ground and power ground for all functions. Due to high current and high frequency
operation, a low impedance circuit board ground plane is highly recommended.
HO1, HO2, LO1, LO2: High side and low side gate drive pins. The high and low side drivers can directly drive
the gate of a power MOSFET. The drivers are capable of 1A peak source and sink currents. It is recommended
that the high and low drive pins be very close to the gates of the high side and low side MOSFETs to prevent
any delay and distortion of the drive signals.
Vb1, Vb2: High side power input connection. The high side supplies are derived from bootstrap circuits using
low-leakage Schottky diodes and ceramic capacitors. To prevent noise, the Schottky diodes and bypass
capacitors should be very close to the IR2086S.
Vs1, Vs2: The high side power return connection. Vs should be connected directly to the source terminal of
high side MOSFET with a trace as short as possible.
Vcc: The IC bias input connection for the device. Although the quiescent Vcc current is very low, total supply
current will be higher, depending on the gate charge of the MOSFETs connected to the HO and LO pins, and
the programmed oscillator frequency, Total Vcc current is the sum of quiescent Vcc current and the average
current at HO and LO. Knowing the operating frequency and the MOSFET gate charge (Qg) at selected Vcc
voltage, the average current to drive four power MOSFETs in full-bridge configuration can be calculated from:
Iave = 2 x Qg X fosc
(Note that fosc is equal to the output frequency - twice the frequency of each individual bridge leg on the
primary.)
To prevent noise problem, a bypass ceramic capacitor connected to Vcc and COM1 / COM2 should be placed
as close as possible to the IR2086S.
IR2086S has an under voltage lookout feature for the IC bias supply, Vcc. The minimum voltage required on
Vcc to make sure that IC will work within specifications must be higher than 8.5V (9.5V minimum Vcc is
recommended to prevent asymmetrical gates signals on HO and LO pins that are expected when Vcc is
between 7.5V and 8.5V).
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IR2086S
1000.00
300
250
100.00
200
DT (nsec)
f(KHz)
100pF
200pF
500pF
10.00
1nF
500pF
150
200pF
100
1nF
100pF
50
0
1.00
0
20
40
60
80
100
120
0
20
40
RT (KOhms)
Fig. 1 Output Frequency (-25oC to 125oC)
80
100
120
Fig. 2 Dead Time (@27oC)
1.0E+07
1nF
300
250
500pF
200
200pF
150
100
100pF
50
0
-50
0
50
100
TEMP (C)
Fig. 3 Dead Time vs Temp
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150
OVER CURRENT RESTART DELAY TIME (uSEC
350
DT (nsec)
60
RT(KOhms)
1.0E+06
100nF
1.0E+05
10nF
1.0E+04
1nF
1.0E+03
1.0E+02
10pF
1.0E+01
1.0E+00
-50
0
50
100
150
TEM P (C)
Fig. 4 Over Current Restart Delay Time vs Temp (Vcc = 15V)
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IR2086S
Case outlines
16-Lead SOIC (narrow body)
01-6018
01-3064 00 (MS-012AC)
WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105
This product has been designed and qualified for the industrial market
http://www.irf.com/ Data and specifications subject to change without notice.
11/4/2004
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