Product Specification PE4259 SPDT High Power UltraCMOS™ DC – 3.0 GHz RF Switch Product Description The PE4259 UltraCMOS™ RF Switch is designed to cover a broad range of applications from near DC through 3000 MHz. This reflective switch integrates on-board CMOS control logic with a low voltage CMOS-compatible control interface, and can be controlled using either single-pin or complementary control inputs. Using a nominal +3-volt power supply voltage, a typical input 1 dB compression point of +33.5 dBm can be achieved. Features • Single-pin or complementary CMOS logic control inputs • Low insertion loss: 0.35 dB at 1000 MHz, 0.5 dB at 2000 MHz • Isolation of 30 dB at 1000 MHz, 20 dB at 2000 MHz The PE4259 SPDT High Power UltraCMOS™ RF Switch is manufactured in Peregrine’s patented Ultra Thin Silicon (UTSi®) CMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. • Typical input 1 dB compression point of +33.5 dBm • Ultra-small SC-70 package Figure 1. Functional Diagram Figure 2. Package Type SC-70 RFC RF1 6-lead SC-70 RF2 CMOS Control Driver CTRL CTRL or VDD Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 Ω) Parameter Conditions Operation Frequency1 Minimum Typical DC 0.35 0.50 Maximum Units 3000 MHz 0.45 0.60 dB dB Insertion Loss 1000 MHz 2000 MHz Isolation 1000 MHz 2000 MHz 29 19 30 20 dB dB Return Loss 1000 MHz 2000 MHz 21 24 22 27 dB dB ‘ON’ Switching Time 50% CTRL to 0.1 dB of final value, 1 GHz 1.50 us ‘OFF’ Switching Time 50% CTRL to 25 dB isolation, 1 GHz 1.50 us 15 mVpp 33.5 dBm 55 dBm 2 Video Feedthrough Input 1 dB Compression 1000 MHz Input IP3 1000 MHz, 20dBm input power 31.5 Notes: 1. Device linearity will begin to degrade below 10 MHz. 2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50 Ω test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth. Document No. 70-0134-02 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 8 PE4259 Product Specification Figure 3. Pin Configuration (Top View) Table 4. DC Electrical Specifications Parameter Min Typ Max Units 2.3 3.0 3.3 V 9 20 µA pin 1 1 GND 2 RF2 3 259 RF1 6 CTRL or VDD VDD Power Supply Voltage 5 RFC IDD Power Supply Current (VDD = 3V, VCNTL = 3V) 4 CTRL Control Voltage High 0.7x V DD Control Voltage Low V Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Pin No. Pin Name 1 RF1 RF Port13 2 GND Ground connection. Traces should be physically short and connected to ground plane for best performance. 3 RF2 RF Port23 4 CTRL Switch control input, CMOS logic level. 5 RFC RF Common 3 CTRL or VDD 0.3x VDD Latch-Up Avoidance Table 2. Pin Descriptions 6 V Description This pin supports two interface options: Single-pin control mode. A nominal 3-volt supply connection is required. Complementary-pin control mode. A complementary CMOS control signal to CTRL is supplied to this pin. Bypassing on this pin is not required in this mode. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 3. Figure 4. Maximum Input Power Table 3. Absolute Maximum Ratings Symbol VDD Parameter/Conditions Min Max Units Power supply voltage -0.3 4.0 V V VI Voltage on any input -0.3 VDD+ 0.3 TST Storage temperature range -65 150 °C TOP Operating temperature range -40 85 °C PIN Input power (50Ω) +344 dBm ESD Voltage (HBM, ML_STD 883 Method 3015.7) 2000 V ESD Voltage (MM, JEDEC, JESD22-A114-B) 250 VESD Notes: 3. All RF pins must be DC blocked with an external series capacitor or held at 0 VDC. 4. To maintain optimum device performance, do not exceed Max PIN at desired operating frequency (see Figure 4). ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 8 Document No. 70-0134-02 │ UltraCMOS™ RFIC Solutions PE4259 Product Specification Table 5. Single-pin Control Logic Truth Table Control Voltages Pin 6 (VDD) = VDD Pin 4 (CTRL) = High Pin 6 (VDD) = VDD Pin 4 (CTRL) = Low Signal Path RFC to RF1 RFC to RF2 Table 6. Complementary-pin Control Logic Truth Table Control Voltages Pin 6 (CTRL or VDD) = Low Pin 4 (CTRL) = High Pin 6 (CTRL or VDD) = High Pin 4 (CTRL) = Low Document No. 70-0134-02 │ www.psemi.com Signal Path RFC to RF1 Control Logic Input The PE4259 is a versatile RF CMOS switch that supports two operating control modes; single-pin control mode and complementary-pin control mode. Single-pin control mode enables the switch to operate with a single control pin (pin 4) supporting a +3-volt CMOS logic input, and requires a dedicated +3-volt power supply connection on pin 6 (VDD). This mode of operation reduces the number of control lines required and simplifies the switch control interface typically derived from a CMOS µProcessor I/O port. RFC to RF2 Complementary-pin control mode allows the switch to operate using complementary control pins CTRL and CTRL (pins 4 & 6), that can be directly driven by +3-volt CMOS logic or a suitable µProcessor I/O port. This enables the PE4259 to be used as a potential alternate source for SPDT RF switch products used in positive control voltage mode and operating within the PE4259 operating limits. ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 8 PE4259 Product Specification Typical Performance Data @ -40 °C to 85 °C (Unless Otherwise Noted) Figure 5. Insertion Loss Figure 6. Isolation – Input to Output Figure 7. Isolation – Output to Output Figure 8. Return Loss (Input) ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 8 Document No. 70-0134-02 │ UltraCMOS™ RFIC Solutions PE4259 Product Specification Typical Performance Data @ VDD = 2.3V, T=25°C Figure 9. Insertion Loss Figure 10. Isolation – Input to Output Figure 11. Isolation – Output to Output Figure 12. Return Loss (Input & Output) Document No. 70-0134-02 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 8 PE4259 Product Specification Evaluation Kit Figure 8. Evaluation Board Layouts Peregrine Specification 101/0162 The SPDT switch EK Board was designed to ease customer evaluation of Peregrine’s PE4259. The RF common port is connected through a 50 Ω transmission line via the top SMA connector, J1. RF1 and RF2 are connected through 50 Ω transmission lines via SMA connectors J2 and J3, respectively. A through 50 Ω transmission is available via SMA connectors J4 and J5. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. The board is constructed of a two metal layer FR4 material with a total thickness of 0.031”. The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 0.0476”, trace gaps of 0.030”, dielectric thickness of 0.028”, metal thickness of 0.0021” and εr of 4.4. J6 and J7 provide a means for controlling DC and digital inputs to the device. J6-1 is connected to the device VDD or CTRL input. J7-1 is connected to the device CTRL input. Figure 9. Evaluation Board Schematic Peregrine Specification 102/0218 ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 8 Document No. 70-0134-02 │ UltraCMOS™ RFIC Solutions PE4259 Product Specification Figure 14. Package Drawing 6-lead SC-70 1.80 2.20 0.65 BSC 0.10 0.30 1.15 1.35 1.80 2.40 0.10 0.40 0.15 0.30 0.80 1.00 0.10 0.18 0.80 1.10 0.00 0.10 Table 7. Ordering Information Order Code Part Marking 4259-01 4259-02 4259-00 4259-51 4259-52 259 259 PE4259-EK 259 259 Description Package Shipping Method PE4259-06SC70-7680A PE4259-06SC70-3000C PE4259-06SC70-EK PE4259G-06SC70-7680A PE4259G-06SC70-3000C 6-lead SC-70 6-lead SC-70 Evaluation Kit Green 6-lead SC-70 Green 6-lead SC-70 7680 units / Canister 3000 units / T&R 1 / Box 7680 units / Canister 3000 units / T&R Document No. 70-0134-02 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 8 PE4259 Product Specification Sales Offices The Americas North Asia Pacific Peregrine Semiconductor Corporation Peregrine Semiconductor K.K. 9450 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Europe Peregrine Semiconductor, Korea Peregrine Semiconductor Europe #B-2402, Kolon Tripolis, #210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-480 S. Korea Tel: +82-31-728-4300 Fax: +82-31-728-4305 Bâtiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 South Asia Pacific Space and Defense Products Peregrine Semiconductor, China Americas: Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 8 The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. Document No. 70-0134-02 │ UltraCMOS™ RFIC Solutions