FAIRCHILD DM74AS244

Revised March 2000
DM74AS240 • DM74AS244
3-STATE Bus Driver/Receiver
General Description
Features
This family of Advance Schottky 3-STATE Bus circuits are
designed to provide either bidirectional or unidirectional
buffer interface in Memory, Microprocessor, and Communication Systems. The output characteristics of the circuits
have low impedance sufficient to drive terminated transmission lines down to 133Ω. The input characteristics of
the circuits likewise have a high impedance so it will not
significantly load the transmission line. The package contains eight 3-STATE buffers organized with four buffers
having a common 3-STATE enable gate. The DM74AS240
and DM74AS244 are eight wide in a 20 pin package, and
may be used as a 4 wide bidirectional or eight wide unidirectional. The buffer selection includes inverting and noninverting, with enable or disable 3-STATE control.
■ Advanced oxide-isolated, ion-implanted Schottky TTL
process
■ Improved switching performance with less power dissipation compared with Schottky counterpart
■ Functional and pin compatible with 74LS and Schottky
counterpart
■ Switching response specified into 500Ω and 50 pF
■ Specified to interface with CMOS at VOH = VCC − 2V
Ordering Code:
Order Number
Package Number
DM74AS240WM
M20B
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74AS240N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM74AS244WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74AS244N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
DM74AS240
DM74AS244
Function Tables
DM74AS240
Inputs
DM74AS244
Output
Inputs
Output
G
A
Y
G
A
L
L
H
L
L
L
L
H
L
L
H
H
H
X
X
Z
L = LOW Logic Level
Z
H
H = HIGH Logic Level
© 2000 Fairchild Semiconductor Corporation
X = Either LOW or HIGH Logic Level
DS006298
Y
Z = High Impedance
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DM74AS240 • DM74AS244 3-STATE Bus Driver/Receiver
October 1986
DM74AS240 • DM74AS244
Absolute Maximum Ratings(Note 1)
Supply Voltage, VCC
7V
Input Voltage
7V
Voltage Applied to Disabled Output
5.5V
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
0°C to +70°C
Operating Free Air Temperature Range
−65°C to +150°C
Storage Temperature Range
Typical θJA
N Package
57.0°C/W
M Package
76.0°C/W
Recommended Operating Conditions
Symbol
Parameter
Min
Nom
Max
Units
4.5
5
5.5
V
VCC
Supply Voltage
VIH
HIGH Level Input Voltage
VIL
LOW Level Input Voltage
0.8
V
IOH
HIGH Level Output Current
−15
mA
IOL
LOW Level Output Current
64
mA
TA
Free Air Operating Temperature
70
°C
2
V
0
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C.
Symbol
Parameter
Conditions
VIK
Input Clamp Voltage
VCC = 4.5V, IIN = −18 mA
VOH
HIGH Level
VCC = 4.5V, IOH = −3 mA
Output Voltage
Min
2.4
VCC = 4.5V, IOH = Max
LOW Level Output Voltage
VCC = 4.5V, IOL = Max
II
Input Current at Max Input Voltage
VCC = 5.5V
IIH
HIGH Level Input Current
IIL
LOW Level Input Current
Max
Units
−1.2
V
3.2
2.4
IOH = −2 mA, VCC = 4.5V to 5.5V
VOL
Typ
V
VCC−2
0.55
V
Others
100
µA
VCC = 5.5V, VIN = 2.7V
Others
20
µA
VCC = 5.5V, VIN = 0.4V
AS240, (G, G),
VIN = 7V
0.35
−500
(Control Inputs),
DM74AS244 (G)
−1000
DM74AS244 (A)
IOZH
HIGH Level 3-STATE Output Current VCC = 5.5V, V= 2.7V
IOZL
LOW Level 3-STATE
IO (Note 2)
Output Drive Current
VCC = 5.5V, VOUT = 2.25V
DM74AS240
VCC = 5.5V
Output Current
ICC
50
DM74AS240,
VCC = 5.5V, V = 0.4V
DM74AS244
Supply Current
ICC
DM74AS244
VCC = 5.5V
Supply Current
−50
−115
2
µA
−50
µA
−150
mA
Outputs HIGH
11
17
Outputs LOW
51
75
3-STATE
24
38
Outputs HIGH
22
34
Outputs LOW
60
90
3-STATE
34
54
Note 2: The output conditions have been chosen to produce a current that closely approximates one half the true short-circuit output current, I OS.
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µA
mA
mA
over recommended operating free air temperature range
Symbol
tPLH
tPHL
Parameter
Conditions
Propagation Delay Time
VCC = 4.5V to 5.5V
LOW-to-HIGH Level Output
R1 = R2 = 500Ω
Propagation Delay Time
CL = 50 pF
HIGH-to-LOW Level Output
From
To
(Input)
(Output)
A
Min
Max
Units
Y
2
6.5
ns
A
Y
2
5.7
ns
tPZL
Output Enable to LOW Level
G
Y
2
9
ns
tPZH
Output Enable to HIGH Level
G
Y
2
6.4
ns
tPLZ
Output Disable from LOW Level
G
Y
2
9.5
ns
tPHZ
Output Disable from HIGH Level
G
Y
2
5
ns
Min
Max
Units
DM74AS244 Switching Characteristics
over recommended operating free air temperature range
Symbol
tPLH
tPHL
Parameter
Conditions
Propagation Delay Time
VCC = 4.5V to 5.5V
LOW-to-HIGH Level Output
R1 = R2 = 500Ω
Propagation Delay Time
CL = 50 pF
HIGH-to-LOW Level Output
From
To
(Input)
(Output)
A
Y
2
6.2
ns
A
Y
2
6.2
ns
tPZL
Output Enable to LOW Level
G
Y
2
7.5
ns
tPZH
Output Enable to HIGH Level
G
Y
2
9
ns
tPLZ
Output Disable from LOW Level
G
Y
2
9
ns
tPHZ
Output Disable from HIGH Level
G
Y
2
6
ns
3
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DM74AS240 • DM74AS244
DM74AS240 Switching Characteristics
DM74AS240 • DM74AS244
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
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4
DM74AS240 • DM74AS244 3-STATE Bus Driver/Receiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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5
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