MOTOROLA PZTA14T1

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by PZTA14T1/D
SEMICONDUCTOR TECHNICAL DATA
Motorola Preferred Device
This NPN small signal darlington transistor is designed for use in switching
applications, such as print hammer, relay, solenoid and lamp drivers. The
device is housed in the SOT-223 package, which is designed for medium power
surface mount applications.
SOT–223 PACKAGE
MEDIUM POWER
NPN SILICON
DARLINGTON
TRANSISTOR
SURFACE MOUNT
• High fT : 125 MHz Minimum
• The SOT-223 Package can be soldered using wave or reflow.
• SOT-223 package ensures level mounting, resulting in improved thermal
conduction, and allows visual inspection of soldered joints. The formed
leads absorb thermal stress during soldering, eliminating the possibility of
damage to the die.
• Available in 12 mm Tape and Reel
Use PZTA14T1 to order the 7 inch/1000 unit reel
Use PZTA14T3 to order the 13 inch/4000 unit reel
• The PNP Complement is PZTA64T1
4
COLLECTOR 2, 4
1
2
BASE
1
3
EMITTER 3
CASE 318E-04, STYLE 1
TO-261AA
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Emitter Voltage
VCES
30
Vdc
Collector-Emitter Voltage
VCEO
30
Vdc
Emitter-Base Voltage
VEBO
10
Vdc
IC
300
mAdc
Collector Current
Total Power Dissipation @ TA = 25°C(1)
Operating and Storage Temperature Range
PD
1.5
Watts
TJ, Tstg
– 65 to 150
°C
RθJA
83.3
°C/W
TL
260
10
°C
Sec
DEVICE MARKING
P1N
THERMAL CHARACTERISTICS
Thermal Resistance
Junction-to-Ambient (surface mounted)
Maximum Temperature for Soldering Purposes
Time in Solder Bath
1. Device mounted on a FR-4 glass epoxy printed circuit board 1.575 in. x 1.575 in. x 0.0625 in.; mounting pad for the collector lead = 0.93 sq. in.
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 1
Small–Signal
Motorola
Motorola, Inc.
1996
Transistors, FETs and Diodes Device Data
1
PZTA14T1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristics
Symbol
Min
Typ
Max
Unit
Collector-Base Breakdown Voltage
(IC = 100 µAdc, IE = 0)
V(BR)CBO
30
—
—
Vdc
Collector-Emitter Breakdown Voltage
(IC = 100 µAdc, IB = 0)
V(BR)CES
30
—
—
Vdc
Emitter-Base Breakdown Voltage
(IE = 10 µAdc, IC = 0)
V(BR)EBO
10
—
—
Vdc
Collector-Base Cutoff Current
(VCB = 30 Vdc, IE = 0)
ICBO
—
—
0.1
µAdc
Emitter-Base Cutoff Current
(VEB = 10 Vdc, IC = 0)
IEBO
—
—
0.1
µAdc
10,000
20,000
—
—
—
—
OFF CHARACTERISTICS
ON CHARACTERISTICS (2)
DC Current Gain
(IC = 10 mAdc, VCE = 5.0 Vdc)
(IC = 100 mAdc, VCE = 5.0 Vdc)
hFE
—
Collector-Emitter Saturation Voltage
(IC = 100 mAdc, IB = 0.1 mAdc)
VCE(sat)
—
—
1.5
Vdc
Base-Emitter On Voltage
(IC = 100 mAdc, VCE = 5.0 Vdc)
VBE(on)
—
—
2.0
Vdc
fT
125
—
—
MHz
DYNAMIC CHARACTERISTICS
Current-Gain — Bandwidth Product
(IC = 10 mAdc, VCE = 5.0 Vdc)
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%.
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PZTA14T1
TYPICAL ELECTRICAL CHARACTERISTICS
hFE, DC CURRENT GAIN
100 k
70 k
50 k
4.0
|h FE|, SMALL-SIGNAL CURRENT GAIN
200 k
TJ = 125°C
25°C
30 k
20 k
10 k
7.0 k
5.0 k
– 55°C
3.0 k
2.0 k
5.0 7.0
10
VCE = 5.0 V
20 30
50 70 100
200
IC, COLLECTOR CURRENT (mA)
300
VCE = 5.0 V
f = 100 MHz
TJ = 25°C
2.0
1.0
0.8
0.6
0.4
0.2
0.5
500
1.0
Figure 1. DC Current Gain
1.6
2.0
0.5
10
20
50
100
IC, COLLECTOR CURRENT (mA)
200
500
Figure 2. High Frequency Current Gain
20
TJ = 25°C
TJ = 25°C
VBE(sat) @ IC/IB = 1000
C, CAPACITANCE (pF)
V, VOLTAGE (VOLTS)
1.4
1.2
VBE(on) @ VCE = 5.0 V
1.0
0.8
10
7.0
Cibo
Cobo
5.0
3.0
VCE(sat) @ IC/IB = 1000
0.6
5.0 7.0
10
20 30
50 70 100
200 300
IC, COLLECTOR CURRENT (mA)
2.0
0.04
500
0.1
2.5
500 mA
2.0
1.5
1.0
0.5
0.1 0.2
0.5 1.0 2.0 5.0 10 20
50 100 200
IB, BASE CURRENT (µA)
RθV, TEMPERATURE COEFFICIENT (mV/°C)
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
TJ = 25°C
250 mA
1.0
2.0
4.0
10
20
40
Figure 4. Capacitance
3.0
10 mA 50 mA
0.4
VR, REVERSE VOLTAGE (VOLTS)
Figure 3. “On” Voltages
IC =
0.2
500 1000
Figure 5. Collector Saturation Region
Motorola Small–Signal Transistors, FETs and Diodes Device Data
–1.0
– 2.0
*APPLIES FOR IC/IB ≤ hFE/3.0
*RθVC for VCE(sat)
25°C to 125°C
– 55°C to 25°C
– 3.0
– 4.0
θVB for VBE
– 5.0
– 6.0
5.0 7.0
25°C to 125°C
– 55°C to 25°C
10
20 30
50 70 100
IC, COLLECTOR CURRENT (mA)
200 300
500
Figure 6. Temperature Coefficients
3
PZTA14T1
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
0.15
3.8
0.079
2.0
0.248
6.3
0.091
2.3
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
inches
0.059
1.5
mm
SOT-223
SOT-223 POWER DISSIPATION
PD =
TJ(max) – TA
RθJA
= 1.5 watts
TA = 25°C
0.8 Watts
1.5 Watts
1.25 Watts*
100
80
0.0
*Mounted on the DPAK footprint
0.2
0.4
0.6
0.8
1.0
A, Area (square inches)
The 83.3°C/W for the SOT-223 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 1.5 watts. There are
other alternatives to achieving higher power dissipation from
the SOT-223 package. One is to increase the area of the
collector pad. By increasing the area of the collector pad, the
power dissipation can be increased. Although the power
dissipation can almost be doubled with this method, area is
4
Board Material = 0.0625″
G-10/FR-4, 2 oz Copper
140
θ
150°C – 25°C
83.3°C/W
160
° 120
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 1.5 watts.
PD =
taken up on the printed circuit board which can defeat the
purpose of using surface mount technology. A graph of RθJA
versus collector pad area is shown in Figure 7.
R JA , Thermal Resistance, Junction
to Ambient ( C/W)
The power dissipation of the SOT-223 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by T J(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA . Using the
values provided on the data sheet for the SOT-223 package,
PD can be calculated as follows:
Figure 7. Thermal Resistance versus Collector
Pad Area for the SOT-223 Package (Typical)
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PZTA14T1
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
or stainless steel with a typical thickness of 0.008 inches.
The stencil opening size for the SOT-223 package should be
the same as the pad size on the printed circuit board, i.e., a
1:1 registration.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and soldering
should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference should be a maximum of 10°C.
• The soldering temperature and time should not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the maximum
temperature gradient should be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied during
cooling
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of control
settings that will give the desired heat pattern. The operator
must set temperatures for several heating zones, and a
figure for belt speed. Taken together, these control settings
make up a heating “profile” for that particular circuit board.
On machines controlled by a computer, the computer
remembers these profiles from one operating session to the
next. Figure 7 shows a typical heating profile for use when
soldering a surface mount device to a printed circuit board.
This profile will vary among soldering systems but it is a good
starting point. Factors that can affect the profile include the
type of soldering system in use, density and types of
components on the board, type of solder used, and the type
of board or substrate material being used. This profile shows
temperature versus time. The line on the graph shows the
STEP 1
PREHEAT
ZONE 1
“RAMP”
200°C
STEP 2
STEP 3
VENT
HEATING
“SOAK” ZONES 2 & 5
“RAMP”
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
150°C
actual temperature that might be experienced on the surface
of a test board at or near a central solder joint. The two
profiles are based on a high density and a low density board.
The Vitronics SMD310 convection/infrared reflow soldering
system was used to generate this profile. The type of solder
used was 62/36/2 Tin Lead Silver with a melting point
between 177 –189°C. When this type of furnace is used for
solder reflow work, the circuit boards and solder joints tend to
heat first. The components on the board are then heated by
conduction. The circuit board, because it has a large surface
area, absorbs the thermal energy more efficiently, then
distributes this energy to the components. Because of this
effect, the main body of a component may be up to 30
degrees cooler than the adjacent solder joints.
STEP 5
STEP 6 STEP 7
STEP 4
HEATING
VENT COOLING
HEATING
ZONES 3 & 6 ZONES 4 & 7
205° TO
“SPIKE”
“SOAK”
219°C
170°C
PEAK AT
SOLDER
160°C
JOINT
150°C
100°C
140°C
100°C
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
50°C
TIME (3 TO 7 MINUTES TOTAL)
TMAX
Figure 8. Typical Solder Heating Profile
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
PZTA14T1
PACKAGE DIMENSIONS
A
F
STYLE 1:
PIN 1.
2.
3.
4.
4
S
B
1
2
3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
BASE
COLLECTOR
EMITTER
COLLECTOR
D
L
G
J
C
0.08 (0003)
M
H
INCHES
DIM MIN
MAX
A
0.249
0.263
B
0.130
0.145
C
0.060
0.068
D
0.024
0.035
F
0.115
0.126
G
0.087
0.094
H 0.0008 0.0040
J
0.009
0.014
K
0.060
0.078
L
0.033
0.041
M
0_
10 _
S
0.264
0.287
MILLIMETERS
MIN
MAX
6.30
6.70
3.30
3.70
1.50
1.75
0.60
0.89
2.90
3.20
2.20
2.40
0.020
0.100
0.24
0.35
1.50
2.00
0.85
1.05
0_
10 _
6.70
7.30
K
CASE 318E–04
ISSUE H
TO-261AA
SOT–223
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
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6
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*PZTA14T1/D*
PZTA14T1/D
Motorola Small–Signal Transistors, FETs and Diodes Device
Data