Compact, 600 mA, 3 MHz, Step-Down DC-to-DC Converter ADP2108 Data Sheet FEATURES GENERAL DESCRIPTION Peak efficiency: 95% 3 MHz fixed frequency operation Typical quiescent current: 18 μA Maximum load current: 600 mA Input voltage: 2.3 V to 5.5 V Uses tiny multilayer inductors and capacitors Current mode architecture for fast load and line transient response 100% duty cycle low dropout mode Internal synchronous rectifier Internal compensation Internal soft start Current overload protection Thermal shutdown protection Shutdown supply current: 0.2 μA Available in 5-ball WLCSP 5-lead TSOT Supported by ADIsimPower™ design tool The ADP2108 is a high efficiency, low quiescent current stepdown dc-to-dc converter manufactured in two different packages. The total solution requires only three tiny external components. It uses a proprietary, high speed current mode, constant frequency PWM control scheme for excellent stability and transient response. To ensure the longest battery life in portable applications, the ADP2108 has a power save mode that reduces the switching frequency under light load conditions. The ADP2108 runs on input voltages of 2.3 V to 5.5 V, which allows for single lithium or lithium polymer cell, multiple alkaline or NiMH cell, PCMCIA, USB, and other standard power sources. The maximum load current of 600 mA is achievable across the input voltage range. The ADP2108 is available in fixed output voltages of 3.3 V, 3.0 V, 2.5 V, 2.3 V, 1.82 V, 1.8 V, 1.5 V, 1.3 V, 1.2 V, 1.1 V, and 1.0 V. All versions include an internal power switch and synchronous rectifier for minimal external part count and high efficiency. The ADP2108 has an internal soft start and is internally compensated. During logic controlled shutdown, the input is disconnected from the output and the ADP2108 draws less than 1 μA from the input source. APPLICATIONS PDAs and palmtop computers Wireless handsets Digital audio, portable media players Digital cameras, GPS navigation units Other key features include undervoltage lockout to prevent deep battery discharge and soft start to prevent input current overshoot at startup. The ADP2108 is available in 5-ball WLCSP and 5-lead TSOT packages. The ADP2109 provides the same features and operations as the ADP2108 and has the additional function of a discharge switch in the WLCSP package. TYPICAL APPLICATIONS CIRCUIT ADP2108 1µH 2.3V TO 5.5V VIN 1.0V TO 3.3V SW 10µF 4.7µF ON EN FB GND 07375-003 OFF Figure 1. Rev. G Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved. ADP2108 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Enable/Shutdown ....................................................................... 11 Applications ....................................................................................... 1 Short-Circuit Protection............................................................ 12 General Description ......................................................................... 1 Undervoltage Lockout ............................................................... 12 Typical Applications Circuit............................................................ 1 Thermal Protection .................................................................... 12 Revision History ............................................................................... 2 Soft Start ...................................................................................... 12 Specifications..................................................................................... 3 Current Limit .............................................................................. 12 Absolute Maximum Ratings ............................................................ 4 100% Duty Operation ................................................................ 12 Thermal Resistance ...................................................................... 4 Applications Information .............................................................. 13 ESD Caution .................................................................................. 4 ADIsimPower Design Tool ....................................................... 13 Pin Configuration and Function Descriptions ............................. 5 External Component Selection ................................................ 13 Typical Performance Characteristics ............................................. 6 Thermal Considerations............................................................ 14 Theory of Operation ...................................................................... 11 PCB Layout Guidelines.............................................................. 14 Control Scheme .......................................................................... 11 Evaluation Board ............................................................................ 15 PWM Mode ................................................................................. 11 Outline Dimensions ....................................................................... 16 Power Save Mode ........................................................................ 11 Ordering Guide .......................................................................... 17 REVISION HISTORY 6/12—Rev. F to Rev. G Change to Features Section ............................................................. 1 Added ADIsimPower Design Tool Section ................................. 13 Updated Outline Dimensions ....................................................... 16 1/12—Rev. E to Rev. F Change to Table 3................................................................................... 4 Changes to Output Capacitor Section ......................................... 13 10/10—Rev. D to Rev. E Changed −40°C to +85°C to −40°C to +125°C Throughout ......... 3 Changes to Ordering Guide .......................................................... 17 1/10—Rev. C to Rev. D Changes to Ordering Guide .......................................................... 17 4/09—Rev. B to Rev. C Changes to General Description Section ...................................... 1 2/09—Rev. A to Rev. B Added 5-Lead TSOT Package ........................................... Universal Changes to Absolute Maximum Ratings Section ......................... 4 Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 17 11/08—Rev. 0 to Rev. A Changes to Figure 4 .......................................................................... 6 Updated Outline Dimensions ....................................................... 16 9/08—Revision 0: Initial Version Rev. G | Page 2 of 20 Data Sheet ADP2108 SPECIFICATIONS VIN = 3.6 V, VOUT = 1.8 V, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted. 1 Table 1. Parameter INPUT CHARACTERISTICS Input Voltage Range Undervoltage Lockout Threshold OUTPUT CHARACTERISTICS Output Voltage Accuracy Test Conditions/Comments Min Typ Max Unit 2.15 5.5 2.3 2.25 V V V +2 +2.5 % % 2.3 VIN rising VIN falling 2.05 PWM mode VIN = 2.3 V to 5.5 V, PWM mode −2 −2.5 POWER SAVE MODE TO PWM CURRENT THRESHOLD 85 mA PWM TO POWER SAVE MODE CURRENT THRESHOLD 80 mA INPUT CURRENT CHARACTERISTICS DC Operating Current Shutdown Current SW CHARACTERISTICS SW On Resistance (WLCSP) SW On Resistance (TSOT) Current Limit ILOAD = 0 mA, device not switching EN = 0 V, TA = TJ = −40°C to +125°C 18 0.2 PFET NFET PFET NFET PFET switch peak current limit 1100 30 1.0 µA µA 320 300 380 260 1300 1500 mΩ mΩ mΩ mΩ mA V V µA ENABLE CHARACTERISTICS EN Input High Threshold EN Input Low Threshold EN Input Leakage Current EN = 0 V, 3.6 V −1 0 0.4 +1 OSCILLATOR FREQUENCY ILOAD = 200 mA 2.5 3.0 3.5 MHz 550 µs 1.2 START-UP TIME THERMAL CHARACTERISTICS Thermal Shutdown Threshold Thermal Shutdown Hysteresis 1 150 20 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). Rev. G | Page 3 of 20 °C °C ADP2108 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2. Parameter VIN, EN FB, SW to GND Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Lead Temperature Range Soldering (10 sec) Vapor Phase (60 sec) Infrared (15 sec) ESD Human Body Model ESD Charged Device Model ESD Machine Model Rating −0.4 V to +6.5 V −1.0 V to (VIN + 0.2 V) −40°C to +125°C −40°C to +125°C −65°C to +150°C −65°C to +150°C 300°C 215°C 220°C ±1500 V ±500 V ±100 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. In applications with moderate power dissipation and low PCB thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. The junction temperature (TJ) of the device is dependent on the ambient temperature (TA), the power dissipation (PD) of the device, and the junction-toambient thermal resistance of the package (θJA). Maximum junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) using the formula TJ = TA + (PD × θJA). THERMAL RESISTANCE θJA is specified for a device mounted on a JEDEC 2S2P PCB. Table 3. Thermal Resistance Package Type 5-Ball WLCSP 5-Lead TSOT ESD CAUTION Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to GND. The ADP2108 can be damaged when the junction temperature limits are exceeded. Monitoring ambient temperature does not guarantee that TJ is within the specified temperature limits. In applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may have to be derated. Rev. G | Page 4 of 20 θJA 105 170 Unit °C/W °C/W Data Sheet ADP2108 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BALL A1 INDICATOR 1 2 VIN GND A SW B EN FB TOP VIEW (BALL SIDE DOWN) Not to Scale 07375-002 C Figure 2. WLCSP Pin Configuration Table 4. WLCSP Pin Function Descriptions Mnemonic VIN A2 B C1 C2 GND SW EN FB Description Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 2.2 μF or greater capacitor as close to the ADP2108 as possible. Ground. Connect all the input and output capacitors to GND. Switch Node Output. SW is the drain of the PFET switch and NFET synchronous rectifier. Enable Input. Drive EN high to turn on the ADP2108. Drive EN low to turn it off and reduce the input current to 0.2 μA. Feedback Input of the Error Amplifier. Connect FB to the output of the switching regulator. VIN 1 GND 2 EN 3 ADP2108 5 SW 4 FB TOP VIEW (Not to Scale) 07375-040 Pin No. A1 Figure 3. TSOT Pin Configuration Table 5. TSOT Pin Function Descriptions Pin No. 1 Mnemonic VIN 2 3 4 5 GND EN FB SW Description Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 2.2 μf or greater capacitor as close to the ADP2108 as possible. Ground. Connect all the input and output capacitors to GND. Enable Input. Drive EN high to turn on the ADP2108. Drive EN low to turn it off and reduce the input current to 0.1 μA. Feedback Input of the Error Amplifier. Connect FB to the output of the switching regulator. Switch Node Output. SW is the drain of the PFET switch and NFET synchronous rectifier. Rev. G | Page 5 of 20 ADP2108 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.6 V, TA = 25°C, VEN = VIN, unless otherwise noted. 1400 24 +85°C 1300 1200 CURRENT LIMIT (mA) QUIESCENT CURRENT (µA) 22 20 +25°C 18 –40°C 16 1100 1000 900 800 14 3.0 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V) 600 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 07375-014 INPUT VOLTAGE (V) Figure 7. PMOS Current Limit vs. Input Voltage 0.15 3400 0.14 3300 0.13 OUTPUT CURRENT (A) 3500 3200 –40°C 3100 3000 +25°C 2900 +85°C 2800 0.12 0.11 0.10 0.09 0.08 PWM TO PSM 0.06 2600 0.05 PSM TO PWM +85°C 2.8 3.3 3.8 4.3 4.8 5.3 INPUT VOLTAGE (V) 0.04 2.5 3.0 3.5 4.0 4.5 5.0 5.5 07375-018 2500 2.3 –40°C 0.07 2700 07375-015 FREQUENCY (kHz) Figure 4. Quiescent Supply Current vs. Input Voltage 5.5 07375-019 12 2.5 07375-017 700 INPUT VOLTAGE (V) Figure 5. Switching Frequency vs. Input Voltage Figure 8. Mode Transition Across Temperature 0.15 1.840 IOUT = 10mA 0.14 1.835 0.13 OUTPUT CURRENT (A) IOUT = 150mA 1.825 1.820 1.815 IOUT = 500mA 1.810 0.12 0.11 0.10 0.09 PSM TO PWM 1.805 0.08 1.800 0.07 1.795 –45 –25 –5 15 35 55 TEMPERATURE (°C) 75 07375-016 OUTPUT VOLTAGE (V) 1.830 Figure 6. Output Voltage vs. Temperature PWM TO PSM 0.06 2.5 3.0 3.5 4.0 4.5 INPUT VOLTAGE (V) Figure 9. Mode Transition Rev. G | Page 6 of 20 5.0 Data Sheet ADP2108 1.825 100 90 80 70 VIN = 2.7V VIN = 3.6V VIN = 4.5V VIN = 5.5V 1.805 EFFICIENCY (%) OUTPUT VOLTAGE (V) 1.815 1.795 60 50 VIN = 2.7V VIN = 3.6V VIN = 4.5V VIN = 5.5V 40 30 1.785 20 0 0.1 0.2 0.3 0.4 0.5 0.6 OUTPUT CURRENT (A) 0 0.001 07375-020 1.775 0.01 0.1 1 OUTPUT CURRENT (A) Figure 10. Load Regulation, VOUT = 1.8 V 07375-023 10 Figure 13. Efficiency, VOUT = 1.8 V 1.025 100 VIN = 2.7V VIN = 3.6V VIN = 4.5V VIN = 5.5V 1.020 90 80 70 EFFICIENCY (%) OUTPUT VOLTAGE (V) 1.015 1.010 1.005 1.000 60 50 40 VIN = 2.7V VIN = 3.6V VIN = 4.5V VIN = 5.5V 30 0.995 20 0.990 0.2 0.3 0.4 0.5 0.6 OUTPUT CURRENT (A) 0 0.001 0.01 0.1 1 07375-024 0.1 07375-021 0 1 07375-025 10 0.985 OUTPUT CURRENT (A) Figure 11. Load Regulation, VOUT = 1.0 V Figure 14. Efficiency, VOUT = 1.0 V 100 3.3775 90 3.3575 3.3175 EFFICIENCY (%) 70 VIN = 3.6V VIN = 4.5V VIN = 5.5V 3.2975 3.2775 VIN = 3.6V VIN = 4.5V VIN = 5.5V 60 50 40 30 3.2575 20 3.2375 10 3.2175 0 0.1 0.2 0.3 0.4 OUTPUT CURRENT (A) 0.5 0.6 07375-022 OUTPUT VOLTAGE (V) 80 3.3375 Figure 12. Load Regulation, VOUT = 3.3 V 0 0.001 0.01 0.1 OUTPUT CURRENT (A) Figure 15. Efficiency, VOUT = 3.3 V Rev. G | Page 7 of 20 ADP2108 Data Sheet VIN VIN 3 3 SW SW 4 4 VOUT 1 VOUT 07375-026 07375-029 1 CH1 50mV CH3 1V M 40µs T 10.80% CH4 2V A CH3 CH1 50mV CH3 1V 3.26V Figure 16. Line Transient, VOUT = 1.8 V, Power Save Mode, 20 mA CH4 2V M 40µs T 10.80% A CH3 4.4V Figure 19. Line Transient, VOUT = 3.3 V, PWM, 200 mA SW VIN 4 SW VOUT 1 3 4 VOUT IOUT 07375-027 07375-030 2 1 CH1 20mV CH3 1V M 40µs T 10.80% CH4 2V A CH3 CH1 50mV 3.26V CH2 200mA Ω CH4 2V M 40µs T 19.80% A CH2 36mA Figure 20. Load Transient, VOUT = 1.8 V, 300 mA to 600 mA Figure 17. Line Transient, VOUT = 1.8 V, PWM, 200 mA VIN 4 SW SW 1 3 VOUT 4 IOUT VOUT 2 CH1 50mV CH3 1V CH4 2V M 40µs T 10.80% A CH3 07375-031 07375-028 1 CH1 50mV 3.26V Figure 18. Line Transient, VOUT = 1.0 V, PWM, 200 mA CH2 250mA CH4 2V M 40µs T 25.4% A CH2 5mA Figure 21. Load Transient, VOUT = 1.8 V, 50 mA to 300 mA Rev. G | Page 8 of 20 Data Sheet ADP2108 SW SW 4 4 VOUT IL 1 2 VOUT IOUT 1 2 CH2 50mA Ω CH4 2V M 40µs T 25.4% A CH2 12mA 07375-035 3 07375-032 CH1 50mV EN CH1 500mV CH2 500mA CH3 5V CH4 5V Figure 22. Load Transient, VOUT = 1.8 V, 5 mA to 50 mA M 40µs T 19.80% A CH3 2.1V Figure 25. Start-Up, VOUT = 1.0 V, 600 mA SW SW 4 4 IL IL 2 2 VOUT EN 3 07375-033 3 CH1 1V CH3 5V CH2 250mA CH4 5V EN 1 M 40µs T 10.80% A CH3 2V 07375-036 VOUT 1 CH2 250mA CH4 5V CH1 2V CH3 5V Figure 23. Start-Up, VOUT = 1.8 V, 400 mA M 40µs T 10.80% A CH3 2V Figure 26. Start-Up, VOUT = 3.3 V, 150 mA SW 4 SW 4 IL 2 IL 2 VOUT 1 EN VOUT 1 CH1 1V CH3 5V CH2 250mA CH4 5V M 40µs T 10.80% A CH3 07375-037 07375-034 3 2V CH1 50mV CH2 500mA CH4 2V M 2µs T 20% A CH4 2.64mA Figure 27. Typical Power Save Mode Waveform, 50 mA Figure 24. Start-Up, VOUT = 1.8 V, 5 mA Rev. G | Page 9 of 20 ADP2108 Data Sheet SW 4 IL 2 VOUT 07375-038 1 CH1 20mV CH2 200mA CH4 2V M 200ns T 20% A CH4 2.64V Figure 28. Typical PWM Waveform, 200 mA Rev. G | Page 10 of 20 Data Sheet ADP2108 THEORY OF OPERATION GM ERROR AMP PWM COMP VIN SOFT START ILIMIT FB PSM COMP PWM/ LOW PSM CONTROL CURRENT SW DRIVER AND ANTISHOOTTHROUGH OSCILLATOR UNDERVOLTAGE LOCKOUT ADP2108 EN 07375-001 GND THERMAL SHUTDOWN Figure 29. Functional Block Diagram The ADP2108 is a step-down dc-to-dc converter that uses a fixed frequency and high speed current mode architecture. The high switching frequency allows for a small step-down, dc-to-dc converter solution. The ADP2108 operates with an input voltage of 2.3 V to 5.5 V and regulates an output voltage down to 1.0 V. CONTROL SCHEME The ADP2108 operates with a fixed frequency, current mode PWM control architecture at medium to high loads for high efficiency, but shifts to a power save mode control scheme at light loads to lower the regulation power losses. When operating in fixed frequency PWM mode, the duty cycle of the integrated switches is adjusted and regulates the output voltage. When operating in power save mode at light loads, the output voltage is controlled in a hysteretic manner, with higher VOUT ripple. During part of this time, the converter is able to stop switching and enters an idle mode, which improves conversion efficiency. PWM MODE In PWM mode, the ADP2108 operates at a fixed frequency of 3 MHz, set by an internal oscillator. At the start of each oscillator cycle, the PFET switch is turned on, sending a positive voltage across the inductor. Current in the inductor increases until the current sense signal crosses the peak inductor current threshold that turns off the PFET switch and turns on the NFET synchronous rectifier. This sends a negative voltage across the inductor, causing the inductor current to decrease. The synchronous rectifier stays on for the rest of the cycle. The ADP2108 regulates the output voltage by adjusting the peak inductor current threshold. POWER SAVE MODE The ADP2108 smoothly transitions to the power save mode of operation when the load current decreases below the power save mode current threshold. When the ADP2108 enters power save mode, an offset is induced in the PWM regulation level, which makes the output voltage rise. When the output voltage reaches a level approximately 1.5% above the PWM regulation level, PWM operation is turned off. At this point, both power switches are off, and the ADP2108 enters an idle mode. COUT discharges until VOUT falls to the PWM regulation voltage, at which point the device drives the inductor to make VOUT rise again to the upper threshold. This process is repeated while the load current is below the power save mode current threshold. Power Save Mode Current Threshold The power save mode current threshold is set to 80 mA. The ADP2108 employs a scheme that enables this current to remain accurately controlled, independent of VIN and VOUT levels. This scheme also ensures that there is very little hysteresis between the power save mode current threshold for entry to and exit from the power save mode. The power save mode current threshold is optimized for excellent efficiency over all load currents. ENABLE/SHUTDOWN The ADP2108 starts operation with soft start when the EN pin is toggled from logic low to logic high. Pulling the EN pin low forces the device into shutdown mode, reducing the shutdown current below 1 μA. Rev. G | Page 11 of 20 ADP2108 Data Sheet SHORT-CIRCUIT PROTECTION The ADP2108 includes frequency foldback to prevent output current runaway on a hard short. When the voltage at the feedback pin falls below half the target output voltage, indicating the possibility of a hard short at the output, the switching frequency is reduced to half the internal oscillator frequency. The reduction in the switching frequency allows more time for the inductor to discharge, preventing a runaway of output current. UNDERVOLTAGE LOCKOUT To protect against battery discharge, undervoltage lockout (UVLO) circuitry is integrated on the ADP2108. If the input voltage drops below the 2.15 V UVLO threshold, the ADP2108 shuts down, and both the power switch and the synchronous rectifier turn off. When the voltage rises above the UVLO threshold, the soft start period is initiated, and the part is enabled. THERMAL PROTECTION In the event that the ADP2108 junction temperature rises above 150°C, the thermal shutdown circuit turns off the converter. Extreme junction temperatures can be the result of high current operation, poor circuit board design, or high ambient temperature. A 20°C hysteresis is included so that when thermal shutdown occurs, the ADP2108 does not return to operation until the on-chip temperature drops below 130°C. When coming out of thermal shutdown, soft start is initiated. SOFT START After the EN pin is driven high, internal circuits start to power up. The time required to settle after the EN pin is driven high is called the power-up time. After the internal circuits are powered up, the soft start ramp is initiated and the output capacitor is charged linearly until the output voltage is in regulation. The time required for the output voltage to ramp is called the soft start time. Start-up time in the ADP2108 is the measure of when the output is in regulation after the EN pin is driven high. Start-up time consists of the power-up time and the soft start time. CURRENT LIMIT The ADP2108 has protection circuitry to limit the amount of positive current flowing through the PFET switch and the synchronous rectifier. The positive current limit on the power switch limits the amount of current that can flow from the input to the output. The negative current limit prevents the inductor current from reversing direction and flowing out of the load. 100% DUTY OPERATION With a drop in VIN or with an increase in ILOAD, the ADP2108 reaches a limit where, even with the PFET switch on 100% of the time, VOUT drops below the desired output voltage. At this limit, the ADP2108 smoothly transitions to a mode where the PFET switch stays on 100% of the time. When the input conditions change again and the required duty cycle falls, the ADP2108 immediately restarts PWM regulation without allowing overshoot on VOUT. The ADP2108 has an internal soft start function that ramps the output voltage in a controlled manner upon startup, thereby limiting the inrush current. This prevents possible input voltage drops when a battery or a high impedance power source is connected to the input of the converter. Rev. G | Page 12 of 20 Data Sheet ADP2108 APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL The ADP2108 is supported by ADIsimPower design tool set. ADIsimPower is a collection of tools that produce complete power designs optimized for a specific design goal. The tools enable the user to generate a full schematic, bill of materials, and calculate performance in minutes. ADIsimPower can optimize designs for cost, area, efficiency, and parts count while taking into consideration the operating conditions and limitations of the IC and all real external components. For more information about ADIsimPower design tools, refer to www.analog.com/ADIsimPower. The tool set is available from this website, and users can also request an unpopulated board through the tool. EXTERNAL COMPONENT SELECTION Trade-offs between performance parameters such as efficiency and transient response can be made by varying the choice of external components in the applications circuit, as shown in Figure 1. Inductor The high switching frequency of the ADP2108 allows for the selection of small chip inductors. For best performance, use inductor values between 0.7 μH and 3 μH. Recommended inductors are shown in Table 6. The peak-to-peak inductor current ripple is calculated using the following equation: I RIPPLE = Vendor Murata Murata Murata Coilcraft Toko TDK Model LQM21PN1R0M LQM31PN1R0M LQM2HPN1R0M LPS3010-102 MDT2520-CN CPL2512T Dimensions 2.0 × 1.25 × 0.5 3.2 × 1.6 × 0.85 2.5 × 2.0 × 1.1 3.0 × 3.0 × 0.9 2.5 × 2.0 × 1.2 2.5 × 1.5 × 1.2 ISAT (mA) 800 1200 1500 1700 1800 1500 DCR (mΩ) 190 120 90 85 100 100 Output Capacitor Higher output capacitor values reduce the output voltage ripple and improve load transient response. When choosing this value, it is also important to account for the loss of capacitance due to output voltage dc bias. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. Capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. X5R or X7R dielectrics with a voltage rating of 6.3 V or 10 V are recommended for best performance. Y5V and Z5U dielectrics are not recommended for use with any dc-to-dc converter because of their poor temperature and dc bias characteristics. The worst-case capacitance accounting for capacitor variation over temperature, component tolerance, and voltage is calculated using the following equation: CEFF = COUT × (1 − TEMPCO) × (1 − TOL) VOUT × (VIN − VOUT ) VIN × f SW × L where: CEFF is the effective capacitance at the operating voltage. TEMPCO is the worst-case capacitor temperature coefficient. TOL is the worst-case component tolerance. where: fSW is the switching frequency. L is the inductor value. The minimum dc current rating of the inductor must be greater than the inductor peak current. The inductor peak current is calculated using the following equation: I PEAK = I LOAD( MAX ) + Table 6. Suggested 1.0 μH Inductors I RIPPLE 2 In this example, the worst-case temperature coefficient (TEMPCO) over −40°C to +125°C is assumed to be 15% for an X5R dielectric. The tolerance of the capacitor (TOL) is assumed to be 10%, and COUT is 9.2 μF at 1.8 V, as shown in Figure 30. Substituting these values in the equation yields Inductor conduction losses are caused by the flow of current through the inductor, which has an associated internal DCR. Larger sized inductors have smaller DCR, which may decrease inductor conduction losses. Inductor core losses are related to the magnetic permeability of the core material. Because the ADP2108 is a high switching frequency dc-to-dc converter, shielded ferrite core material is recommended for its low core losses and low EMI. CEFF = 9.2 μF × (1 − 0.15) × (1 − 0.1) = 7.0 μF To guarantee the performance of the ADP2108, it is imperative that the effects of dc bias, temperature, and tolerances on the behavior of the capacitors be evaluated for each application. Rev. G | Page 13 of 20 ADP2108 Data Sheet THERMAL CONSIDERATIONS 12 Because of the high efficiency of the ADP2108, only a small amount of power is dissipated inside the ADP2108 package, which reduces thermal constraints. CAPACITANCE (µF) 10 8 However, in applications with maximum loads at high ambient temperature, low supply voltage, and high duty cycle, the heat dissipated in the package is great enough that it may cause the junction temperature of the die to exceed the maximum junction temperature of 125°C. If the junction temperature exceeds 150°C, the converter goes into thermal shutdown. It recovers when the junction temperature falls below 130°C. 6 4 0 0 1 2 3 4 5 DC BIAS VOLTAGE (V) 6 07375-007 2 Figure 30. Typical Capacitor Performance The peak-to-peak output voltage ripple for the selected output capacitor and inductor values is calculated using the following equation: VRIPPLE VIN I RIPPLE = ≈ 8 × f SW × COUT (2π × f SW )2 × L × COUT Capacitors with lower equivalent series resistance (ESR) are preferred to guarantee low output voltage ripple, as shown in the following equation: ESRCOUT ≤ VRIPPLE I RIPPLE The effective capacitance needed for stability, which includes temperature and dc bias effects, is 7 µF. Table 7. Suggested 10 μF Capacitors Vendor Murata Taiyo Yuden TDK Type X5R X5R X5R Model GRM188R60J106 JMK107BJ106 C1608JB0J106K Case Size 0603 0603 0603 Voltage Rating (V) 6.3 6.3 6.3 Input Capacitor Higher value input capacitors help to reduce the input voltage ripple and improve transient response. Maximum input capacitor current is calculated using the following equation: I CIN ≥ I LOAD( MAX ) VOUT (VIN − VOUT ) VIN Table 8. Suggested 4.7 μF Capacitors Type X5R X5R X5R Model GRM188R60J475 JMK107BJ475 C1608X5R0J475 TJ = TA + TR where: TJ is the junction temperature. TA is the ambient temperature. TR is the rise in temperature of the package due to power dissipation. The rise in temperature of the package is directly proportional to the power dissipation in the package. The proportionality constant for this relationship is the thermal resistance from the junction of the die to the ambient temperature, as shown in the following equation: TR = θJA × PD where: TR is the rise in temperature of the package. θJA is the thermal resistance from the junction of the die to the ambient temperature of the package. PD is the power dissipation in the package. PCB LAYOUT GUIDELINES Poor layout can affect ADP2108 performance, causing electromagnetic interference (EMI) and electromagnetic compatibility (EMC) problems, ground bounce, and voltage losses. Poor layout can also affect regulation and stability. A good layout is implemented using the following rules: • To minimize supply noise, place the input capacitor as close to the VIN pin of the ADP2108 as possible. As with the output capacitor, a low ESR capacitor is recommended. The list of recommended capacitors is shown in Table 8. Vendor Murata Taiyo Yuden TDK The junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package due to power dissipation, as shown in the following equation: Case Size 0603 0603 0603 Voltage Rating (V) 6.3 6.3 6.3 • • • Rev. G | Page 14 of 20 Place the inductor, input capacitor, and output capacitor close to the IC using short tracks. These components carry high switching frequencies, and large tracks act as antennas. Route the output voltage path away from the inductor and SW node to minimize noise and magnetic interference. Maximize the size of ground metal on the component side to help with thermal dissipation. Use a ground plane with several vias connecting to the component side ground to further reduce noise interference on sensitive circuit nodes. Data Sheet ADP2108 EVALUATION BOARD VIN TB2 EN VIN A1 CIN 4.7µF EN A2 C1 TB5 VIN SW B 1 L1 1µH 2 GND EN FB C2 U1 GND IN VOUT TB3 VOUT COUT 10µF TB4 GND OUT 07375-004 ADP2108 TB1 07375-005 07375-041 Figure 31. Evaluation Board Schematic Figure 34. Recommended TSOT Top Layer 07375-042 07375-006 Figure 32. Recommended WLCSP Top Layer Figure 35. Recommended TSOT Bottom Layer Figure 33. Recommended WLCSP Bottom Layer Rev. G | Page 15 of 20 ADP2108 Data Sheet OUTLINE DIMENSIONS 1.060 1.020 0.980 2 1 A BALL A1 IDENTIFIER 1.490 1.450 1.410 0.866 REF C 0.50 BSC TOP VIEW (BALL SIDE DOWN) 0.657 0.602 0.546 B 0.50 BSC BOTTOM VIEW 0.355 0.330 0.304 SIDE VIEW (BALL SIDE UP) COPLANARITY 0.04 0.330 0.310 0.290 0.280 0.250 0.220 06-11-2012-B SEATING PLANE Figure 36. 5-Ball Wafer Level Chip Scale Package [WLCSP] (CB-5-3) Dimensions shown in millimeters 2.90 BSC 5 4 2.80 BSC 1.60 BSC 1 2 3 0.95 BSC 1.90 BSC *1.00 MAX 0.10 MAX 0.50 0.30 0.20 0.08 SEATING PLANE 8° 4° 0° 0.60 0.45 0.30 *COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS. Figure 37. 5-Lead Thin Small Outline Transistor Package [TSOT] (UJ-5) Dimensions shown in millimeters Rev. G | Page 16 of 20 100708-A *0.90 MAX 0.70 MIN Data Sheet ADP2108 ORDERING GUIDE Model 1 ADP2108ACBZ-1.0-R7 ADP2108ACBZ-1.1-R7 ADP2108ACBZ-1.2-R7 ADP2108ACBZ-1.3-R7 ADP2108ACBZ-1.5-R7 ADP2108ACBZ-1.8-R7 ADP2108ACBZ-1.82-R7 ADP2108ACBZ-2.3-R7 ADP2108ACBZ-2.5-R7 ADP2108ACBZ-3.0-R7 ADP2108ACBZ-3.3-R7 ADP2108AUJZ-1.0-R7 ADP2108AUJZ-1.1-R7 ADP2108AUJZ-1.2-R7 ADP2108AUJZ-1.3-R7 ADP2108AUJZ-1.5-R7 ADP2108AUJZ-1.8-R7 ADP2108AUJZ-1.82-R7 ADP2108AUJZ-2.3-R7 ADP2108AUJZ-2.5-R7 ADP2108AUJZ-3.0-R7 ADP2108AUJZ-3.3-R7 ADP2108-1.0-EVALZ ADP2108-1.1-EVALZ ADP2108-1.2-EVALZ ADP2108-1.3-EVALZ ADP2108-1.5-EVALZ ADP2108-1.8-EVALZ ADP2108-1.82-EVALZ ADP2108-2.3-EVALZ ADP2108-2.5-EVALZ ADP2108-3.0-EVALZ ADP2108-3.3-EVALZ ADP2108UJZ-REDYKIT 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Output Voltage (V) 1.0 1.1 1.2 1.3 1.5 1.8 1.82 2.3 2.5 3.0 3.3 1.0 1.1 1.2 1.3 1.5 1.8 1.82 2.3 2.5 3.0 3.3 1.0 1.1 1.2 1.3 1.5 1.8 1.82 2.3 2.5 3.0 3.3 Package Description 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Lead Small Outline Package [TSOT] 5-Lead Small Outline Package [TSOT] 5-Lead Small Outline Package [TSOT] 5-Lead Small Outline Package [TSOT] 5-Lead Small Outline Package [TSOT] 5-Lead Small Outline Package [TSOT] 5-Lead Small Outline Package [TSOT] 5-Lead Small Outline Package [TSOT] 5-Lead Small Outline Package [TSOT] 5-Lead Small Outline Package [TSOT] 5-Lead Small Outline Package [TSOT] Evaluation Board for 1.0 V [WLCSP] Evaluation Board for 1.1 V [WLCSP] Evaluation Board for 1.2 V [WLCSP] Evaluation Board for 1.3 V [WLCSP] Evaluation Board for 1.5 V [WLCSP] Evaluation Board for 1.8 V [WLCSP] Evaluation Board for 1.82 V [WLCSP] Evaluation Board for 2.3 V [WLCSP] Evaluation Board for 2.5 V [WLCSP] Evaluation Board for 3.0 V [WLCSP] Evaluation Board for 3.3 V [WLCSP] Evaluation Board for Fixed Output Voltage, 1.2 V and 3.3 V [TSOT] Z = RoHS Compliant Part. Rev. G | Page 17 of 20 Package Option CB-5-3 CB-5-3 CB-5-3 CB-5-3 CB-5-3 CB-5-3 CB-5-3 CB-5-3 CB-5-3 CB-5-3 CB-5-3 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 Branding LA6 LA7 LA8 LA9 LAA LAD LAE LAF LAG LD9 LAH LA6 LA7 LA8 LA9 LAA LAD LAE LAF LAG LD9 LAH ADP2108 Data Sheet NOTES Rev. G | Page 18 of 20 Data Sheet ADP2108 NOTES Rev. G | Page 19 of 20 ADP2108 Data Sheet NOTES ©2008–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07375-0-6/12(G) Rev. G | Page 20 of 20