LC2MOS 5 Ω RON SPST Switches ADG451/ADG452/ADG453 Low on resistance (4 Ω) On resistance flatness (0.2 Ω) 44 V supply maximum ratings ±15 V analog signal range Fully specified at ±5 V, 12 V, ±15 V Ultralow power dissipation (18 μW) ESD 2 kV Continuous current (100 mA) Fast switching times tON 70 ns tOFF 60 ns TTL-/CMOS-compatible Pin-compatible upgrade for ADG411/ADG412/ADG413 and ADG431/ADG432/ADG433 FUNCTIONAL BLOCK DIAGRAMS S1 IN1 D1 S2 IN2 ADG451 D2 S3 IN3 D3 S4 IN4 D4 SWITCHES SHOWN FOR A LOGIC 1 INPUT. 05239-001 FEATURES Figure 1. ADG451 S1 IN1 D1 S2 IN2 APPLICATIONS D2 S3 D3 S4 IN4 D4 SWITCHES SHOWN FOR A LOGIC 1 INPUT. 05239-101 Relay replacement Audio and video switching Automatic test equipment Precision data acquisition Battery-powered systems Sample-and-hold systems Communication systems PBX, PABX systems Avionics ADG452 IN3 Figure 2. ADG452 S1 IN1 D1 S2 IN2 GENERAL DESCRIPTION The on resistance profile is very flat over the full analog input range, ensuring excellent linearity and low distortion when switching audio signals. Fast switching speed, coupled with high signal bandwidth, makes the parts suitable for video signal switching. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and batterypowered instruments. The ADG451/ADG452/ADG453 contain four independent, single-pole/single-throw (SPST) switches. The ADG451 and ADG452 differ only in that the digital control logic is inverted. The ADG451 switches are turned on with a logic low on the appropriate control input, while a logic high is required for the ADG452. D2 S3 D3 S4 IN4 D4 SWITCHES SHOWN FOR A LOGIC 1 INPUT. 05239-102 The ADG451/ADG452/ADG453 are monolithic CMOS devices comprising four independently selectable switches. They are designed on an enhanced LC2MOS process that provides low power dissipation yet gives high switching speed and low on resistance. ADG453 IN3 Figure 3. ADG453 The ADG453 has two switches with digital control logic similar to that of the ADG451, while the logic is inverted on the other two switches. Each switch conducts equally well in both directions when on, and each has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. The ADG453 exhibits break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. ADG451/ADG452/ADG453 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................7 Applications....................................................................................... 1 ESD Caution...................................................................................7 General Description ......................................................................... 1 Pin Configuration and Function Descriptions..............................8 Functional Block Diagrams............................................................. 1 Typical Performance Characteristics ..............................................9 Revision History ............................................................................... 2 Terminology .................................................................................... 11 Product Highlights ........................................................................... 3 Applications..................................................................................... 12 Specifications..................................................................................... 4 Test Circuits..................................................................................... 13 15 V Dual Supply.......................................................................... 4 Outline Dimensions ....................................................................... 15 12 V Single Supply........................................................................ 5 Ordering Guide .......................................................................... 16 5 V Dual Supply............................................................................ 6 REVISION HISTORY 10/06—Rev. B to Rev. C Changes to Table 4............................................................................ 9 Changes to Ordering Guide .......................................................... 18 2/98—Rev. 0 to Rev. A 10/97—Revision 0: Initial Version 12/04—Rev. A to Rev. B Updated Format..................................................................Universal Changes to Specifications Section.................................................. 3 Changes to Absolute Maximum Ratings Section......................... 8 Changes to Pin Configuration and Function Descriptions Section ........................................................................ 9 Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 17 Rev. C | Page 2 of 16 ADG451/ADG452/ADG453 PRODUCT HIGHLIGHTS 1. Low RON (5 Ω maximum). 2. Ultralow Power Dissipation. 3. Extended Signal Range. The ADG451/ADG452/ADG453 are fabricated on an enhanced LC2MOS process, giving an increased signal range that fully extends to the supply rails. 4. Break-Before-Make Switching. This prevents channel shorting when the switches are configured as a multiplexer (ADG453 only.) 5. Single-Supply Operation. For applications in which the analog signal is unipolar, the ADG451/ADG452/ADG453 can be operated from a single rail power supply. The parts are fully specified with a single 12 V power supply and remain functional with single supplies as low as 5.0 V. 6. Dual-Supply Operation. For applications where the analog signal is bipolar, the ADG451/ADG452/ADG453 can be operated from a dual power supply ranging from ±4.5 V to ±20 V. Rev. C | Page 3 of 16 ADG451/ADG452/ADG453 SPECIFICATIONS 15 V DUAL SUPPLY VDD = 15 V, VSS = −15 V, VL = 5 V, GND = 0 V. All specifications TMIN to TMAX, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (ΔRON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS 2 Source Off Leakage, IS (OFF) Drain Off Leakage, ID (OFF) Channel On Leakage, ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH B Version 1 25°C TMIN to TMAX VSS to VDD 4 5 0.1 0.5 0.2 0.5 ±0.02 ±0.5 ±0.02 ±0.5 ±0.04 ±1 7 0.5 0.5 ±2.5 ±2.5 ±5 2.4 0.8 0.005 ±0.5 DYNAMIC CHARACTERISTICS 3 tON tOFF Break-Before-Make Time Delay, tD (ADG453 Only) Charge Injection Off Isolation Channel-to-Channel Crosstalk CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD ISS IL IGND3 1 2 3 70 180 60 140 15 5 20 30 65 −90 37 37 140 0.0001 0.5 0.0001 0.5 0.0001 0.5 0.0001 0.5 220 180 5 5 5 5 5 Unit V Ω typ Ω max Ω typ Ω max Ω typ Ω max nA typ nA max nA typ nA max nA typ nA max V min V max μA typ μA max ns typ ns max ns typ ns max ns typ ns min pC typ pC max dB typ dB typ pF typ pF typ pF typ μA typ μA max μA typ μA max μA typ μA max μA typ μA max Temperature range for B version is −40°C to +85°C. TMAX = 70°C. Guaranteed by design, not subject to production test. Rev. C | Page 4 of 16 Test Conditions/Comments VD = −10 V to +10 V, IS = −10 mA VD = ±10 V, IS = −10 mA VD = −5 V, 0 V, +5 V, IS = −10 mA VD = ±10 V, VS = ±10 V; see Figure 17 VD = ±10 V, VS = ±10 V; see Figure 17 VD = VS = ±10 V; see Figure 18 VIN = VINL or VINH; all others = 2.4 V or 0.8 V, respectively RL = 300 Ω, CL = 35 pF, VS = ±10 V; see Figure 19 RL = 300 Ω, CL = 35 pF, VS = ±10 V; see Figure 19 RL = 300 Ω, CL = 35 pF, VS1 = VS2 = +10 V; see Figure 20 VS = 0 V, RS = 0 Ω, CL = 1.0 nF; see Figure 21 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 22 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23 f = 1 MHz f = 1 MHz f = 1 MHz VDD = 16.5 V, VSS = −16.5 V; digital inputs = 0 V or 5 V ADG451/ADG452/ADG453 12 V SINGLE SUPPLY VDD = 12 V, VSS = 0 V, VL = 5 V, GND = 0 V. All specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (ΔRON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS 2, 3 Source Off Leakage, IS (OFF) Drain Off Leakage, ID (OFF) Channel On Leakage, ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH B Version 1 25°C TMIN to TMAX 0 V to VDD 6 8 0.1 0.5 1.0 10 0.5 1.0 ±0.02 ±0.5 ±0.02 ±0.5 ±0.04 ±1 ±2.5 ±2.5 ±5 2.4 0.8 0.005 ±0.5 DYNAMIC CHARACTERISTICS 4 tON tOFF Break-Before-Make Time Delay, tD (ADG453 Only) Charge Injection Channel-to-Channel Crosstalk CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD IL IGND4 100 220 80 160 15 260 200 10 10 −90 60 60 100 10 0.0001 0.5 0.0001 0.5 0.0001 0.5 5 5 5 1 Temperature range for B version is −40°C to +85°C. TMAX = 70°C. Tested with dual supplies. 4 Guaranteed by design, not subject to production test. 2 3 Rev. C | Page 5 of 16 Unit V Ω typ Ω max Ω typ Ω max Ω typ nA typ nA max nA typ nA max nA typ nA max V min V max μA typ μA max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ pF typ pF typ pF typ μA typ μA max μA typ μA max μA typ μA max Test Conditions/Comments VD = 0 V to +10 V, IS = −10 mA VD = 10 V, IS = −10 mA VD = 0 V, 5 V, IS = −10 mA VD = 0 V, 10 V, VS = 0 V, 10 V; see Figure 17 VD = 0 V, 10 V, VS = 0 V, 10 V; see Figure 17 VD = VS = 0 V, 10 V; see Figure 18 VIN = VINL or VINH RL = 300 Ω, CL = 35 pF, VS = 8 V; see Figure 19 RL = 300 Ω, CL = 35 pF, VS = 8 V; see Figure 19 RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 8 V; see Figure 20 VS = 6 V, RS = 0 Ω, CL = 1.0 nF; see Figure 21 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23 f = 1 MHz f = 1 MHz f = 1 MHz VDD = 13.2 V; digital inputs = 0 V or 5 V VL = 5.5 V VL = 5.5 V ADG451/ADG452/ADG453 5 V DUAL SUPPLY VDD = +5 V, VSS = −5 V, VL = +5 V, GND = 0 V. All specifications TMIN to TMAX, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (ΔRON) LEAKAGE CURRENTS 2, 3 Source Off Leakage, IS (OFF) Drain Off Leakage, ID (OFF) Channel On Leakage, ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH B Version 1 25°C TMIN to TMAX VSS to VDD 7 12 0.3 0.5 ±0.02 ±0.5 ±0.02 ±0.5 ±0.04 ±1 15 0.5 ±2.5 ±2.5 ±5 2.4 0.8 0.005 ±0.5 DYNAMIC CHARACTERISTICS 4 tON tOFF Break-Before-Make Time Delay, tD (ADG453 Only) Charge Injection Off Isolation Channel-to-Channel Crosstalk CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD ISS IL IGND4 160 220 60 140 50 5 10 65 −76 48 48 148 0.0001 0.5 0.0001 0.5 0.0001 0.5 0.0001 0.5 300 180 5 5 5 5 5 1 Temperature range for B version is −40°C to +85°C. TMAX = 70°C. 3 Tested with dual supplies. 4 Guaranteed by design, not subject to production test. 2 Rev. C | Page 6 of 16 Unit V Ω typ Ω max Ω typ Ω max nA typ nA max nA typ nA max nA typ nA max V min V max μA typ μA max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ pF typ pF typ pF typ μA typ μA max μA typ μA max μA typ μA max μA typ μA max Test Conditions/Comments VD = −3.5 V to +3.5 V, IS = −10 mA VD = 3.5 V, IS = −10 mA VD = ±4.5, VS = ±4.5; see Figure 17 VD = 0 V, 5 V, VS = 0 V, 5 V; see Figure 17 VD = VS = 0 V, 5 V; see Figure 18 VIN = VINL or VINH RL = 300 Ω, CL = 35 pF, VS = 3 V; see Figure 19 RL = 300 Ω, CL = 35 pF, VS = 3 V; see Figure 19 RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3 V; see Figure 20 VS = 0 V, RS = 0 Ω, CL = 1.0 nF; see Figure 21 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 22 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23 f = 1 MHz f = 1 MHz f = 1 MHz VDD = 5.5 V; digital inputs = 0 V or 5 V VL = 5.5 V VL = 5.5 V ADG451/ADG452/ADG453 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4. Parameters VDD to VSS VDD to GND VSS to GND VL to GND Analog, Digital Inputs 1 Continuous Current, S or D Peak Current, S or D (pulsed at 1 ms, 10% duty cycle maximum) Operating Temperature Range Industrial (B Version) Storage Temperature Range Junction Temperature Plastic DIP Package, Power Dissipation θJA Thermal Impedance Lead Temperature, Soldering (10 sec) SOIC Package, Power Dissipation θJA Thermal Impedance TSSOP Package, Power Dissipation θJA Thermal Impedance θJC Thermal Impedance Lead Temperature, Soldering Vapor Phase (60 sec) Infrared (15 sec) ESD 1 Ratings 44 V −0.3 V to +32 V +0.3 V to −32 V −0.3 V to VDD + 0.3 V VSS − 2 V to VDD + 2 V or 30 mA, whichever occurs first 100 mA 300 mA −40°C to +85°C −65°C to +150°C 150°C 470 mW Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. ESD CAUTION 117°C/W 260°C 600 mW 77°C/W 450 mW 115°C/W 35°C/W 215°C 220°C 2 kV Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. Rev. C | Page 7 of 16 ADG451/ADG452/ADG453 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS IN1 1 16 IN2 D1 2 15 D2 14 S2 13 VDD VSS 4 GND 5 ADG451/ ADG452/ ADG453 VL TOP VIEW S4 6 (Not to Scale) 11 S3 D4 7 10 D3 IN4 8 12 9 IN3 05239-002 S1 3 Figure 4. Pin Configuration Table 5. Pin Function Descriptions Pin No. 1 2 3 4 Mnemonic IN1 D1 S1 VSS 5 6 7 8 9 10 11 12 13 14 15 16 GND S4 D4 IN4 IN3 D3 S3 VL VDD S2 D2 IN2 Description Logic Control Input. Drain Terminal. Can be an input or an output. Source Terminal. Can be an input or an output. Most Negative Power Supply Potential in Dual Supplies. In single-supply applications, it can be connected to GND. Ground (0 V) Reference. Source Terminal. Can be an input or an output. Drain Terminal. Can be an input or an output. Logic Control Input. Logic Control Input. Drain Terminal. Can be an input or an output. Source Terminal. Can be an input or an output. Logic Power Supply (5 V). Most Positive Power Supply Potential. Source Terminal. Can be an input or an output. Drain Terminal. Can be an input or an output. Logic Control Input. Table 6. Truth Table (ADG451/ADG452) Table 7. Truth Table (ADG453) ADG451 In 0 1 Logic 0 1 ADG452 In 1 0 Switch Condition On Off Rev. C | Page 8 of 16 Switch 1, Switch 4 Off On Switch 2, Switch 3 On Off ADG451/ADG452/ADG453 TYPICAL PERFORMANCE CHARACTERISTICS 9 10 TA = 25°C VL = 5V 8 LEAKAGE CURRENT (nA) VDD = +5V VSS = –5V 7 VDD = +13.5V VSS = –13.5V 5 4 3 VDD = +15V VSS = –15V 2 1 ID (ON) 0.1 Figure 5. On Resistance as a Function of VD (VS) for Various Dual Supplies 75 85 100k 5 VDD = +15V VSS = –15V 10k VL = +5V VDD = +15V VSS = –15V VL = +5V +85°C 6 ISUPPLY (µA) 4 4SW 1k +25°C –40°C 3 100 I+, I+ 10 IL 2 1 1 0.1 0 –15 –10 –5 0 5 10 VD OR VS DRAIN OR SOURCE VOLTAGE (V) 15 0.01 10 Figure 6. On Resistance as a Function of VD (VS) for Different Temperatures with Dual Supplies 16 1k 10k 100k FREQUENCY (Hz) 1M 12 VDD = 15V 11 VSS = 0V VL = 5V 10 12 9 +85°C 8 VDD = 13.5V VSS = 0V 8 VDD = 15V VSS = 0V VDD = 16.5V VSS = 0V 7 RON (Ω) 10 10M Figure 9. Supply Current vs. Input Switching Frequency TA = 25°C VL = 5V 14 VDD = 5V VSS = 0V 100 05239-007 1SW 05239-004 RON (Ω) 45 55 65 TEMPERATURE (°C) Figure 8. Leakage Currents as a Function of Temperature 7 6 +25°C 6 5 –40°C 4 4 3 2 2 1 0 3 6 9 12 15 VD OR VS DRAIN OR SOURCE VOLTAGE (V) 18 05239-005 RON (Ω) 35 05239-006 16.5 VD OR VS DRAIN OR SOURCE VOLTAGE (V) IS (OFF) 0.01 25 05239-003 13.5 7.5 4.5 1.5 –1.5 –4.5 –7.5 –10.5 –13.5 –16.5 0 10.5 VDD = +16.5V VSS = –16.5V 1 0 ID (OFF) Figure 7. On Resistance as a Function of VD (VS) for Various Single Supplies 0 0 2 4 6 8 10 12 14 VD OR VS DRAIN OR SOURCE VOLTAGE (V) 16 Figure 10. On Resistance as a Function of VD (VS) for Different Temperatures with Single Supplies Rev. C | Page 9 of 16 05239-008 RON (Ω) 6 VDD = +15V VSS = –15V VL = +5V VD = +15V VS = –15V ADG451/ADG452/ADG453 0.5 120 VDD = +15V VSS = –15V VL = +5V RLOAD = 50Ω 100 0.2 ID (ON) 0.1 CROSSTALK (dB) LEAKAGE CURRENT (nA) VDD = +15V 0.4 VSS = –15V TA = +25°C 0.3 VL = +5V IS (OFF) 0 ID (OFF) –0.1 –0.2 80 60 40 –0.3 20 –9 –6 –3 0 3 6 9 12 VD OR VS DRAIN OR SOURCE VOLTAGE (V) 15 0 100 Figure 11. Leakage Currents as a Function of VD (VS) 70 40 –1.5 LOSS (dB) –1.0 30 –2.5 10 –3.0 10 FREQUENCY (MHz) 100M –2.0 20 1 10M VDD = +15V VSS = –15V VL = +5V –0.5 100 05239-010 OFF ISOLATION (dB) 0 50 0 10k 100k 1M FREQUENCY (Hz) Figure 13. Crosstalk vs. Frequency VDD = +15V VSS = –15V VL = +5V 60 1k 05239-011 –12 Figure 12. Off Isolation vs. Frequency –3.5 1 10 FREQUENCY (MHz) 100 Figure 14. Frequency Response with Switch On Rev. C | Page 10 of 16 200 05239-012 –0.5 –15 05239-009 –0.4 ADG451/ADG452/ADG453 TERMINOLOGY RON Ohmic resistance between D and S. CD (ON), CS (ON) On switch capacitance. ΔRON On resistance match between any two channels, that is, RON maximum minus RON minimum. tON Delay between applying the digital control input and the output switching on. See Figure 19. RFLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance, as measured over the specified analog signal range. tOFF Delay between applying the digital control input and the output switching off. IS (OFF) Source leakage current with the switch off. ID (OFF) Drain leakage current with the switch off. ID, IS (ON) Channel leakage current with the switch on. VD (VS) Analog voltage on Terminal D and Terminal S. CS (OFF) Off switch source capacitance. tD Off time or on time measured between the 90% points of both switches, when switching from one address state to another. See Figure 20. Crosstalk A measure of unwanted signal coupled through from one channel to another as a result of parasitic capacitance. Off Isolation A measure of unwanted signal coupling through an off switch. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. CD (OFF) Off switch drain capacitance. Rev. C | Page 11 of 16 ADG451/ADG452/ADG453 APPLICATIONS Figure 15 illustrates a precise, fast, sample-and-hold circuit. An AD845 is used as the input buffer, and the output operational amplifier is an AD711. During track mode, SW1 is closed, and the output, VOUT, follows the input signal, VIN. In hold mode, SW1 is opened, and the signal is held by the hold capacitor, CH. +15V +5V 13 12 +15V +15V AD845 S D S D RC 75Ω CC 1000pF AD711 CH 2200pF SW1 –15V VOUT –15V ADG451/ ADG452/ ADG453 5 4 –15V 05239-013 VIN A second switch, SW2, which operates in parallel with SW1, is included in this circuit to reduce pedestal error. Because both switches are at the same potential, they have a differential effect on the op amp, AD711, which minimizes charge injection effects. Pedestal error is also reduced by the compensation network, RC and CC. This compensation network reduces the hold time glitch while optimizing the acquisition time. Using the illustrated op amps and component values, the pedestal error has a maximum value of 5 mV over the ±10 V input range. Both the acquisition and settling times are 850 ns. 2200pF SW2 Due to switch and capacitor leakage, the voltage on the hold capacitor decreases with time. The ADG451/ADG452/ADG453 minimize this droop due to their low leakage specifications. The droop rate is further minimized by the use of a polystyrene hold capacitor. The droop rate for the circuit shown is typically 30 μV/μs. Figure 15. Fast, Accurate Sample-and-Hold Circuit Rev. C | Page 12 of 16 ADG451/ADG452/ADG453 TEST CIRCUITS IDS V1 ID (OFF) S A 05239-014 VS RON = V1/IDS ID (ON) S A VS VD Figure 16. On Resistance 0.1µF D +5V VD VIN VDD Figure 18. On Leakage 3V 0.1µF ADG451 50% 50% 50% 50% VL S D VOUT CL 35pF RL 300Ω VS 3V VIN ADG452 IN 90% 90% VSS VOUT tON 0.1µF tOFF 05239-017 GND VIN –15V Figure 19. Switching Times 0.1µF +15V +5V VDD VL 0.1µF 3V ADG453 VS1 S1 D1 VS2 S2 D2 VIN RL2 300Ω VOUT2 RL1 300Ω 50% CL1 35pF CL2 35pF 50% 0V VOUT1 90% VOUT1 90% 0V IN1, IN2 GND VIN VSS 90% 90% 0V tD –15V tD 05239-018 VOUT2 0.1µF Figure 20. Break-Before-Make Time Delay +5V V VL S D VS IN 3V VOUT CL 10nF VIN VOUT GND VDD ΔVOUT VIN = CL × ΔVOUT 05239-019 RS +15V –15V Figure 21. Charge Injection Rev. C | Page 13 of 16 A VS Figure 17. Off Leakage +15V D 05239-016 IS (OFF) D 05239-015 S ADG451/ADG452/ADG453 0.1µF +5V VDD VL S VL S D VOUT VS VS VOUT IN GND VDD 0.1µF 0.1µF RL 50Ω VIN1 VIN2 S RL 50Ω 50Ω D D GND NC VSS VSS 0.1µF 0.1µF –15V –15V 05239-020 VIN +5V CHANNEL-TO-CHANNEL CROSSTALK = 20 × log |VS/VOUT| Figure 22. Off Isolation Figure 23. Channel-to-Channel Crosstalk Rev. C | Page 14 of 16 05239-021 0.1µF +15V +15V ADG451/ADG452/ADG453 OUTLINE DIMENSIONS 5.10 5.00 4.90 10.00 (0.3937) 9.80 (0.3858) 16 4.00 (0.1575) 3.80 (0.1496) 16 9 1 8 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 6.20 (0.2441) 5.80 (0.2283) 9 4.50 4.40 4.30 1.75 (0.0689) 1.35 (0.0531) 6.40 BSC 1 0.50 (0.0197) × 45° 0.25 (0.0098) 8 PIN 1 8° 0.51 (0.0201) SEATING 0.25 (0.0098) 0° 1.27 (0.0500) 0.31 (0.0122) PLANE 0.40 (0.0157) 0.17 (0.0067) 1.20 MAX 0.15 0.05 0.30 0.19 0.65 BSC COMPLIANT TO JEDEC STANDARDS MS-012-AC COPLANARITY 0.10 CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. SEATING PLANE Figure 25. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters 0.800 (20.32) 0.790 (20.07) 0.780 (19.81) 9 1 8 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) PIN 1 0.100 (2.54) BSC 0.210 (5.33) MAX 0.060 (1.52) MAX 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) MIN 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) GAUGE PLANE SEATING PLANE 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 8° 0° COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 24. 16-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-16) Dimensions shown in millimeters and (inches) 16 0.20 0.09 0.005 (0.13) MIN 0.430 (10.92) MAX 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) COMPLIANT TO JEDEC STANDARDS MS-001-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 26. 16-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-16) Dimensions shown in inches and (millimeters) Rev. C | Page 15 of 16 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.75 0.60 0.45 ADG451/ADG452/ADG453 ORDERING GUIDE Model ADG451BN ADG451BNZ 1 ADG451BR ADG451BR-REEL ADG451BR-REEL7 ADG451BRZ1 ADG451BRZ-REEL1 ADG451BRZ-REEL71 ADG451BRUZ1 ADG451BRUZ- REEL1 ADG451BRUZ- REEL71 ADG451BCHIPS ADG452BN ADG452BNZ1 ADG452BR ADG452BR-REEL ADG452BR-REEL7 ADG452BRZ1 ADG452BRZ-REEL1 ADG452BRZ-REEL71 ADG452BRUZ1 ADG452BRUZ-REEL1 ADG452BRUZ-REEL71 ADG453BN ADG453BNZ1 ADG453BR ADG453BR-REEL ADG453BR-REEL7 ADG453BRZ1 ADG453BRZ-REEL1 ADG453BRZ-REEL71 ADG453BRUZ1 ADG453BRUZ-REEL1 ADG453BRUZ-REEL71 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] DIE 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] Z = Pb-free part. ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C05239-0-10/06(C) Rev. C | Page 16 of 16 Package Option N-16 N-16 R-16 R-16 R-16 R-16 R-16 R-16 RU-16 RU-16 RU-16 N-16 N-16 R-16 R-16 R-16 R-16 R-16 R-16 RU-16 RU-16 RU-16 N-16 N-16 R-16 R-16 R-16 R-16 R-16 R-16 RU-16 RU-16 RU-16