INTEGRATED CIRCUITS DATA SHEET 74ALVCH162601 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state Product specification File under Integrated Circuits, IC24 1999 Oct 14 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 FEATURES DESCRIPTION • Complies with JEDEC standard no. 8-1A The 74ALVCH162601 is an 18-bit universal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CPAB is held at a HIGH or LOW logic level. If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CPAB. When OEAB is LOW, the outputs are active. When OEAB is HIGH, the outputs are in the high-impedance state. The clocks can be controlled with the clock-enable inputs (CEBA/CEAB). • CMOS low power consumption • Direct interface with TTL levels • MULTIBYTE flow-through standard pin-out architecture • Low inductance multiple VCC and ground pins for minimum noise and ground bounce • All data inputs have bus hold circuitry Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. To ensure the high-impedance state during power-down, OEBA and OEAB should be tied to VCC through a pull-up resistor, the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. • Integrated 30 Ω termination resistors. The 74ALVCH162601 is designed with 30 Ω series resistors in both HIGH or LOW output stage. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level. QUICK REFERENCE DATA Ground = 0; Tamb = 25 °C; tr = tf = 2.5 ns. SYMBOL tPHL/tPLH PARAMETER propagation delay An, Bn to Bn, An CONDITIONS TYPICAL UNIT CL = 30 pF; VCC = 2.5 V 4.0 ns CL = 50 pF; VCC = 3.3 V 3.1 ns CI/O input/output capacitance 8.0 pF CI input capacitance 4.0 pF CPD power dissipation capacitance per latch outputs enabled 21 pF outputs disabled 3 pF notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; ∑ (CL × VCC2 × fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC. 1999 Oct 14 2 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 FUNCTION TABLE See note 1. INPUTS OUTPUTS STATUS CEXX OEXX LEXX CPXX An, Bn X H X X X Z disabled X X L L H H X X H L H L transparent H L L X X NC L L L L L L ↑ ↑ h l H L L L L L L L L H X X NC hold clock and display hold Note 1. XX = AB for A-to-B direction, BA for B-to-A direction; H = HIGH voltage level; L = LOW voltage level; h = HIGH state must be present one set-up time before the LOW-to-HIGH transition of CPXX; l = LOW state must be present one set-up time before the LOW-to-HIGH transition of CPXX; X = don’t care; ↑ = LOW-to-HIGH level transition; NC = no change; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGE TYPE NUMBER 74ALVCH162601DGG 1999 Oct 14 TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE −40 to +85 °C 56 TSSOP plastic SOT364-1 3 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 PINNING PIN SYMBOL DESCRIPTION 1 OEAB output enable A-to-B 2 LEAB latch enable A-to-B 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, A0 to A17 16, 17, 19, 20, 21, 23, 24, 26 data inputs/outputs 4, 11, 18, 25, 32, 39, 46, 53 GND ground (0 V) 7, 22, 35, 50 VCC DC supply voltage 27 OEBA output enable B-to-A 28 LEBA latch enable B-to-A 29 CEBA clock enable B-to-A 30 CPBA clock input B-to-A 31, 33, 34, 36, 37, 38, 40, 41, 42, 43, 44, 45, 47, 48, 49, 51, 52, 54 B17 to B0 data inputs/outputs 55 CPAB clock input A-to-B 56 CEAB clock enable A-to-B 1999 Oct 14 4 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 handbook, halfpage OEAB 1 56 CEAB LEAB 2 55 CPAB A0 3 54 B0 GND 4 53 GND A1 5 52 B1 A2 6 51 B2 VCC 7 50 VCC A3 8 49 B3 A4 9 48 B4 A5 10 47 B5 handbook, halfpage data input to internal circuit MNA291 46 GND GND 11 A6 12 45 B6 A7 13 44 B7 Fig.2 Bus hold circuit. 43 B8 A8 14 162601 A9 15 42 B9 A10 16 41 B10 A11 17 40 B11 GND 18 39 GND A12 19 38 B12 A13 20 37 B13 A14 21 36 B14 VCC 22 35 VCC A15 23 34 B15 A16 24 33 B16 GND 25 32 GND A17 26 31 B17 OEBA 27 30 CPBA LEBA 28 29 CEBA MNA287 Fig.1 Pin configuration. 1999 Oct 14 VCC 5 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state handbook, full pagewidth 74ALVCH162601 OEAB CEAB LEAB CPAB CPBA LEBA CEBA OEBA CE C1 Bn CP 1D An CE C1 CP 1D 18 IDENTICAL CHANNELS MNA289 Fig.3 Logic diagram (one section). 1999 Oct 14 6 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state handbook, halfpage OEAB CEAB CPAB LEAB 1 EN1 56 G2 55 2 2C3 handbook, halfpage C3 CEBA CPBA LEBA 27 29 28 6 EN4 8 G5 30 3 5 G2 OEBA 74ALVCH162601 9 5C6 C6 10 G5 12 13 A0 3 3D 4 A1 A2 1 54 6D 5 52 6 51 A3 8 9 A4 10 A5 12 A6 13 A7 14 A8 15 A9 16 A10 17 A11 19 A12 20 A13 21 A14 23 A15 24 A16 26 A17 14 B0 49 48 47 45 44 43 42 15 B1 16 B2 17 B3 19 B4 20 B5 21 B6 23 B7 24 B8 26 B9 41 B10 40 B11 38 B12 37 B13 36 B14 34 B15 33 B16 31 B17 1 2 55 56 A0 B0 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 A11 B11 A12 B12 A13 B13 A14 B14 A15 B15 A16 B16 A17 B17 OEAB OEBA LEAB LEBA CPAB CPBA CEAB CEBA MNA288 MNA290 Fig.4 IEC logic symbol. 1999 Oct 14 Fig.5 Logic symbol. 7 54 52 51 49 48 47 45 44 43 42 41 40 38 37 36 34 33 31 27 28 30 29 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER CONDITIONS MIN. TYP. MAX. UNIT DC supply voltage for max. speed performance CL = 30 pF 2.3 2.5 2.7 V for max. speed performance CL = 50 pF 3.0 3.3 3.6 V 1.2 2.4 3.6 V VI DC input voltage for low-voltage applications 0 − VCC V VO DC output voltage 0 − VCC V Tamb operating ambient temperature in free air −40 − +85 °C tr, tf input rise and fall times VCC = 2.3 to 3.0 V 0 − 20 ns/V VCC = 3.0 to 3.6 V 0 − 10 ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC DC supply voltage −0.5 +4.6 V IIK DC input diode current VI < 0 − −50 mA VI DC input voltage note 1 −0.5 +4.6 V mA IOK DC output diode current VO > VCC or VO < 0 − ±50 VO DC output voltage note 1 −0.5 VCC + 0.5 V IO DC output source or sink current VO = 0 to VCC − ±50 mA ICC, IGND DC VCC or GND current − ±100 mA Tstg storage temperature −65 +150 °C Ptot power dissipation − 600 mW for temperature range: −40 to +125 °C; note 2 Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 55 °C the value of Ptot derates linearly with 8 mW/K. 1999 Oct 14 8 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 DC CHARACTERISTICS Over recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb = −40 TO +85 °C TEST CONDITIONS SYMBOL PARAMETER VI (V) VIH VIL VOH VOL OTHER HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VIH or VIL VIH or VIL VCC (V) TYP.(1) MIN. UNIT MAX. 2.3 to 2.7 1.7 1.2 − 2.7 to 3.6 2.0 1.5 − 2.3 to 2.7 − 1.2 0.7 2.7 to 3.6 − 1.5 0.8 IO = −100 µA 2.3 to 3.6 VCC − 0.2 VCC − IO = −4 mA 2.3 VCC − 0.4 VCC − 0.11 − IO = −6 mA 2.3 VCC − 0.6 VCC − 0.17 − IO = −4 mA 2.7 VCC − 0.5 VCC − 0.09 − IO = −8 mA 2.7 VCC − 0.7 VCC − 0.19 − IO = −6 mA 3.0 VCC − 0.6 VCC − 0.13 − IO = −12 mA 3.0 VCC − 1.0 VCC − 0.27 − V V V IO = 100 µA 2.3 to 3.6 − GND 0.20 IO = 4 mA 2.3 − 0.07 0.40 IO = 6 mA 2.3 − 0.11 0.55 IO = 4 mA 2.7 − 0.06 0.40 IO = 8 mA 2.7 − 0.13 0.60 IO = 6 mA 3.0 − 0.09 0.55 IO = 12 mA 3.0 − 0.19 0.80 2.3 to 3.6 − 0.1 5 µA V Il input leakage current VCC or GND IOZ 3-state output OFF-state current VIH or VIL VO = VCC or GND 2.3 to 3.6 − 0.1 10 µA ICC quiescent supply voltage VCC or GND IO = 0 2.3 to 3.6 − 0.2 40 µA ∆ICC additional quiescent supply VCC − 0.6 current given per data I/O pin with bus hold IO = 0 2.3 to 3.6 − 150 750 µA IBHL bus hold LOW sustaining current 0.7(2) 2.3(2) 45 − − µA 0.8(2) 3.0(2) 75 150 − bus hold HIGH sustaining current 1.7(2) 2.3(2) −45 2.0(2) 3.0(2) −75 −175 − 500 − − µA −500 − − µA IBHH IBHLO bus hold LOW overdrive current 3.6(2) IBHHO bus hold LOW overdrive current 3.6(2) Notes 1. All typical values are measured at Tamb = 25 °C. 2. Valid for data inputs of bus hold parts. 1999 Oct 14 9 − µA Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 AC CHARACTERISTICS FOR VCC = 2.3 TO 2.7 V Ground = 0 V; tr = tf ≤ 2.0 ns; CL = 30 pF. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS tPHL/tPLH VCC (V) Tamb = −40 TO +85 °C MIN. TYP.(1) UNIT MAX. propagation delay An, Bn to Bn, An see Figs 6 and 10 2.3 to 2.7 1.3 4.0 5.3 ns propagation delay LEAB, LEBA to Bn, An see Figs 7 and 10 2.3 to 2.7 1.0 4.5 6.0 ns propagation delay CPAB, CPBA to Bn, An see Figs 7 and 10 2.3 to 2.7 1.5 4.7 6.4 ns tPZH/tPZL 3-state output enable time OEAB, OEBA to Bn, An see Figs 8 and 10 2.3 to 2.7 1.6 3.9 6.1 ns tPHZ/tPLZ 3-state output disable time OEAB, OEBA to Bn, An see Figs 8 and 10 2.3 to 2.7 1.8 2.6 5.7 ns tW clock pulse width HIGH LEAB see Figs 7 and 10 or LEBA 2.3 to 2.7 3.3 1.6 − ns clock pulse width HIGH or LOW CPAB or CPBA see Figs 7 and 10 2.3 to 2.7 3.3 2.0 − ns set-up time An, Bn to CPAB, CPBA see Figs 9 and 10 2.3 to 2.7 +2.3 −0.2 − ns set-up time An, Bn to LEAB, LEBA see Figs 9 and 10 2.3 to 2.7 1.3 0.1 − ns 2.3 to 2.7 +2.0 −0.4 − ns tsu set-up time CEAB, CEBA to CPAB, CPBA th hold time An, Bn to CPAB, CPBA see Figs 9 and 10 2.3 to 2.7 1.2 0.3 − ns hold time An, Bn to LEAB, LEBA see Figs 9 and 10 2.3 to 2.7 1.3 0.2 − ns 2.3 to 2.7 1.1 0.4 − ns 2.3 to 2.7 150 190 − MHz hold time CEAB, CEBA to CPAB, CPBA fmax maximum clock pulse frequency see Figs 7 and 10 Note 1. All typical values are measured at Tamb = 25 °C and VCC = 2.5 V. 1999 Oct 14 10 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 AC CHARACTERISTICS FOR VCC = 2.7 V AND VCC = 3.0 TO 3.6 V Ground = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF. Tamb = −40 TO +85 °C TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tW tsu propagation delay An, Bn to Bn, An see Figs 6 and 10 propagation delay LEAB, LEBA to Bn, An see Figs 7 and 10 propagation delay CPAB, CPBA to Bn, An see Figs 7 and 10 3-state output enable time OEAB, OEBA to Bn, An see Figs 8 and 10 3-state output disable time OEAB, OEBA to Bn, An see Figs 8 and 10 clock pulse width LEAB, LEBA to CPAB, CPBA see Figs 7 and 10 clock pulse width HIGH or LOW CPAB, CPBA see Figs 7 and 10 set-up time An, Bn to CPAB, CPBA see Figs 9 and 10 set-up time An, Bn to LEAB, LEBA see Figs 9 and 10 hold time An, Bn to CPAB, CPBA see Figs 9 and 10 hold time An, Bn to LEAB, LEBA see Figs 9 and 10 hold time CEAB, CEBA to CPAB, CPBA fmax maximum clock pulse frequency see Figs 7 and 10 1. All typical values are measured at Tamb = 25 °C. 2. Typical values at VCC = 3.3 V. 1999 Oct 14 11 TYP.(1) UNIT MAX. 3.9 5.2 3.0 to 3.6 1.6 3.1(2) 4.5 2.7 − 4.3 5.9 3.0 to 3.6 1.5 3.5(2) 5.1 2.7 − 4.5 6.3 3.0 to 3.6 1.6 3.7(2) 5.5 2.7 − 3.9 6.7 3.0 to 3.6 1.6 3.1(2) 5.7 2.7 − 3.2 5.3 3.0 to 3.6 1.8 2.9(2) 4.8 2.7 3.3 0.7 − 3.3 0.9(2) − 2.7 3.3 1.2 − 3.0 to 3.6 3.3 0.9(2) − 2.7 2.4 0.0 − 3.0 to 3.6 +2.1 −0.2(2) − 2.7 +1.2 −0.2 − 3.0 to 3.6 1.1 0.3(2) − 2.7 +2.0 −0.7 − 3.0 to 3.6 +1.7 −0.2(2) − 2.7 1.1 0.3 − 3.0 to 3.6 +1.0 −0.1(2) − 2.7 1.6 0.1 − 3.0 to 3.6 1.4 0.1(2) − 2.7 1.2 0.6 − 3.0 to 3.6 1.1 0.4(2) − 2.7 150 190 − 150 240(2) − 3.0 to 3.6 Notes MIN. − 2.7 3.0 to 3.6 set-up time CEAB, CEBA to CPAB, CPBA th VCC (V) ns ns ns ns ns ns ns ns ns ns ns ns ns MHz Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 AC WAVEFORMS handbook, halfpage VI An, Bn VM input GND tPHL tPLH VOH Bn, An VM output VOL MNA292 Fig.6 The input An, Bn to output Bn, An propagation delay times. Notes: VCC = 2.3 to 2.7 V VM = 0.5VCC; VX = VOL + 150 mV; VY = VOH − 150 mV; VI = VCC; VOL and VOH are typical output voltage drop that occur with the output load. Notes: VCC = 3.0 to 3.6 V and VCC = 2.7 V VM = 1.5 V; VX = VOL + 300 mV; VY = VOH − 300 mV; VI = 2.7 V; VOL and VOH are typical output voltage drop that occur with the output load. 1999 Oct 14 12 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 1/fmax handbook, full pagewidth VI LEXX, CPXX input VM VM GND tW tPHL tPLH VOH VM Bn, An output VOL Fig.7 MNA293 Latch enable input LEAB, LEBA and clock input CPAB, CPBA to output Bn, An propagation delay times; pulse width and fmax of CPAB, CPBA. VI handbook, full pagewidth OEXX input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ tPZH VOH VY output HIGH-to-OFF OFF-to-HIGH GND VM outputs enabled outputs disabled outputs enabled MNA294 Fig.8 3-state enable and disable times. 1999 Oct 14 13 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 VI handbook, full pagewidth VM An, Bn input GND th th tsu tsu VI VM CPXX, LEXX input MNA295 GND The shaded areas indicate when the input is permitted to change for predictable output performance. Fig.9 Data set-up and hold times for An and Bn inputs to LEAB, LEBA, CPAB or CPBA inputs. S1 handbook, full pagewidth VCC PULSE GENERATOR VI RL 500 Ω VO 2 × VCC open GND D.U.T. CL 50 pF RT RL 500 Ω MNA296 TEST S1 VCC Definitions for test circuit. CL = load capacitance including jig and probe capacitance (See Chapter “AC characteristics”). RL = load resistance. RT = termination resistance should be equal to the output impedance Zo of the pulse generator. VI tPLH/tPHL open tPLZ/tPZL 2 × VCC <2.7 V VCC tPHZ/tPZH GND 2.7 to 3.6 V 2.7 V Fig.10 Load circuitry for switching times. 1999 Oct 14 14 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 PACKAGE OUTLINE TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm SOT364-1 E D A X c HE y v M A Z 56 29 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 detail X 28 w M bp e 2.5 0 5 mm scale DIMENSIONS (mm are the original dimensions). UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z θ mm 1.2 0.15 0.05 1.05 0.85 0.25 0.28 0.17 0.2 0.1 14.1 13.9 6.2 6.0 0.5 8.3 7.9 1.0 0.8 0.4 0.50 0.35 0.25 0.08 0.1 0.5 0.1 8 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT364-1 1999 Oct 14 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 93-02-03 95-02-10 MO-153EE 15 o Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state SOLDERING 74ALVCH162601 If wave soldering is used the following conditions must be observed for optimal results: Introduction to soldering surface mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. Reflow soldering The footprint must incorporate solder thieves at the downstream end. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Wave soldering Manual soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. To overcome these problems the double-wave soldering method was specifically developed. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 1999 Oct 14 16 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state 74ALVCH162601 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable suitable(2) suitable suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1999 Oct 14 17 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state NOTES 1999 Oct 14 18 74ALVCH162601 Philips Semiconductors Product specification 18-bit universal bus transceiver with 30 Ω termination resistor; 3-state NOTES 1999 Oct 14 19 74ALVCH162601 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstraße 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SÃO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777 For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com SCA 68 © Philips Electronics N.V. 1999 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 245004/01/pp20 Date of release: 1999 Oct 14 Document order number: 9397 750 05257