LINER LTC2904IDDB

LTC2904/LTC2905
Precision Dual Supply Monitors
with Pin-Selectable Thresholds
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FEATURES
DESCRIPTIO
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The LTC®2904/LTC2905 are dual supply monitors intended for systems with two supply voltages. The dual
supply monitors have a common reset output with delay
(200ms for the LTC2904 and adjustable using an external
capacitor for the LTC2905). This product provides a
precise, space-conscious and micropower solution for
supply monitoring.
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Monitors Two Inputs Simultaneously
Nine Threshold Combinations
Three Supply Tolerances (5%, 7.5%, 10%)
Guaranteed Threshold Accuracy: ±1.5% of
Monitored Voltage Over Temperature
Internal VCC Auto Select
Power Supply Glitch Immunity
200ms Reset Time Delay (LTC2904 Only)
Adjustable Reset Time Delay (LTC2905 Only)
Open Drain RST Output
Guaranteed RST for V1 ≥ 1V or V2 ≥ 1V
Low Profile (1mm) SOT-23 (ThinSOTTM) and Plastic
(3mm x 2mm) DFN Packages
The LTC2904/LTC2905 feature a tight 1.5% threshold
accuracy over the whole operating temperature range,
and glitch immunity to ensure reliable reset operation
without false triggering. The open drain RST output is
guaranteed to be in the correct state for inputs down to 1V.
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APPLICATIO S
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The LTC2904/LTC2905 also feature three programming
input pins, which program the threshold and tolerance
level without requiring any external components. These
three programming pins provide a total of 27 different
voltage level and tolerance combinations, eliminating
the need to have different parts for development and
implementation of different systems with different voltage
levels requiring monitoring function.
Desktop and Notebook Computers
Handheld Devices
Network Servers
Core, I/O Monitor
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
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TYPICAL APPLICATIO
Table 1. Voltage Threshold Programming
5V, 3.3V Dual Supply Monitor with 5% Tolerance
5V
DC/DC
CONVERTER
SYSTEM
LOGIC
3.3V
V1
V2
LTC2905
0.1µF
S1
0.1µF
TMR
22nF
S2
TOL
GND
RST
29045 TA01
V1
V2
S1
S2
5.0
3.3
V1
V1
3.3
2.5
Open
GND
3.3
1.8
V1
Open
3.3
1.5
Open
V1
3.3
1.2
Open
Open
2.5
1.8
GND
GND
2.5
1.5
GND
Open
2.5
1.2
GND
V1
2.5
1.0
V1
GND
sn29045 29045fs
1
LTC2904/LTC2905
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ABSOLUTE
AXI U RATI GS
(Note 1, 2)
Terminal Voltages
V1, V2 ..................................................... –0.3V to 7V
S1, S2, TOL .............................. –0.3V to (VCC +0.3V)
RST ......................................................... –0.3V to 7V
RST (LTC2904) ....................................... –0.3V to 7V
TMR (LTC2905) ...................................... –0.3V to 7V
Operating Temperature Range
LTC2904C/LTC2905C ................................ 0°C to 70°C
LTC2904I/LTC2905I ..............................–40°C to 85°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
GND 1
8
TOL
RST 2
7
S1
RST/TMR* 3
6
S2
V2 4
5
V1
9
DDB8 PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN
EXPOSED PAD IS GND (PIN 9),
MUST BE SOLDERED TO PCB
* RST FOR LTC2904
TMR FOR LTC2905
TJMAX = 125°C, θJA = 250°C/W
LTC2904CDDB
LTC2904IDDB
LTC2905CDDB
LTC2905IDDB
ORDER PART
NUMBER
LTC2904CTS8
LTC2904ITS8
LTC2905CTS8
LTC2905ITS8
TOP VIEW
V2 1
RST/TMR* 2
RST 3
GND 4
DDB8 PART MARKING
LBCZ
LBDB
LTAJF
LBCY
8 V1
7 S2
6 S1
5 TOL
TS8 PART MARKING
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
* RST FOR LTC2904
TMR FOR LTC2905
TJMAX = 125°C, θJA = 250°C/W
LTBCJ
LTBCK
LTAJD
LTAJE
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V1 = 2.5V, V2 = 1V, S1 = TOL = V1, S2 = 0V, unless otherwise noted.
(Notes 2, 3, 4)
SYMBOL
VRT50
VRT33
VRT25
VRT18
VRT15
VRT12
VRT10
PARAMETER
5V, 5% Reset Threshold
5V, 7.5% Reset Threshold
5V, 10% Reset Threshold
3.3V, 5% Reset Threshold
3.3V, 7.5% Reset Threshold
3.3V, 10% Reset Threshold
2.5V, 5% Reset Threshold
2.5V, 7.5% Reset Threshold
2.5V, 10% Reset Threshold
1.8V, 5% Reset Threshold
1.8V, 7.5% Reset Threshold
1.8V, 10% Reset Threshold
1.5V, 5% Reset Threshold
1.5V, 7.5% Reset Threshold
1.5V, 10% Reset Threshold
1.2V, 5% Reset Threshold
1.2V, 7.5% Reset Threshold
1.2V, 10% Reset Threshold
1V, 5% Reset Threshold
1V, 7.5% Reset Threshold
1V, 10% Reset Threshold
CONDITIONS
V1 Input Threshold
●
●
●
V1, V2 Input Threshold
●
●
●
V1, V2 Input Threshold
●
●
●
V2 Input Threshold
●
●
●
V2 Input Threshold
●
●
●
V2 Input Threshold
●
●
●
V2 Input Threshold
●
●
●
MIN
4.600
4.475
4.350
3.036
2.954
2.871
2.300
2.238
2.175
1.656
1.611
1.566
1.380
1.343
1.305
1.104
1.074
1.044
0.920
0.895
0.870
TYP
4.675
4.550
4.425
3.086
3.003
2.921
2.338
2.275
2.213
1.683
1.638
1.593
1.403
1.365
1.328
1.122
1.092
1.062
0.935
0.910
0.885
MAX
4.750
4.625
4.500
3.135
3.053
2.970
2.375
2.313
2.250
1.710
1.665
1.620
1.425
1.388
1.350
1.140
1.110
1.080
0.950
0.925
0.900
UNITS
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
sn29045 29045fs
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LTC2904/LTC2905
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V1 = 2.5V, V2 = 1V, S1 = TOL = V1, S2 = 0V, unless otherwise noted.
(Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
VCCMIN
Minimum Internal Operating Voltage (Note 2) RST in Correct Logic State
●
IV1
V1 Input Current
IV2
V2 Input Current
ITMR(UP)
TMR Pull-Up Current
(LTC2905)
VTMR = 0V
●
ITMR(DOWN)
TMR Pull-Down Current
(LTC2905)
VTMR = 1.4V
●
tRST
Reset Time-Out Period
(LTC2904)
tRST
Reset Time-Out Period
(LTC2905)
tUV
Vx Undervoltage Detect to
RST or RST
Vx Less than Reset Threshold VRTX
by More than 1%
VOL
Output Voltage Low RST, RST
I = 2.5mA
I = 100µA; V1 = 1V (RST Only)
●
●
VOH
Output Voltage High RST, RST
(Notes 2, 5)
I = –1µA
●
Includes Input Current to Three-State Pins
CTMR = 22nF
TYP
MAX
1
V
●
65
130
µA
●
0.4
1.0
µA
–1.5
–2.1
–2.7
µA
1.5
2.1
2.7
µA
●
140
200
260
ms
●
140
200
260
ms
150
0.15
0.05
UNITS
µs
0.4
0.3
VCC –1
V
V
V
Three-State Inputs S1, S2, TOL
VIL
Low Level Input Voltage
VIH
High Level Input Voltage
VZ
Pin Voltage when Left in Open State
IVPG
●
I = –10µA
I = 0µA
I = 10µA
Programming Input Current (Note 6)
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The greater of V1, V2 is the internal supply voltage (VCC).
Note 3: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
Note 4: For reset thresholds test conditions refer to the voltage threshold
programming table in the Applications Information section.
0.4
●
1.4
●
0.7
V
V
●
1.1
V
V
V
●
±25
µA
0.9
Note 5: The output pins RST and RST have an internal pull-up to VCC of
typically –6µA. However, an external pull-up resistor may be used when
faster rise time is required or for VOH voltages greater than VCC.
Note 6: The input current to the three-state input pins are the pull-up and
the pull-down current when the pins are either set to V1 or GND
respectively. In the open state, the maximum leakage current to V1 or GND
permissible is 10µA.
sn29045 29045fs
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LTC2904/LTC2905
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TYPICAL PERFOR A CE CHARACTERISTICS
Specifications are at TA = 25°C unless otherwise noted.
5V Threshold Voltage vs
Temperature
2.5V Threshold Voltage vs
Temperature
3.3V Threshold Voltage vs
Temperature
4.75
3.120
2.375
5%
4.65
4.60
7.5%
4.55
4.50
4.45
10%
4.40
4.35
–50
–25
25
50
0
TEMPERATURE (°C)
75
3.070
7.5%
3.020
2.970
10%
2.920
2.870
–50
100
THRESHOLD VOLTAGE, VRT25 (V)
4.70
THRESHOLD VOLTAGE, VRT33 (V)
THRESHOLD VOLTAGE, VRT50 (V)
5%
–25
25
50
0
TEMPERATURE (°C)
75
29045 G01
7.5%
2.275
2.175
–50
7.5%
1.645
1.625
1.605
10%
1.585
1.565
–50
–25
25
50
0
TEMPERATURE (°C)
75
100
75
1.125
5%
1.405
1.385
7.5%
1.365
1.345
10%
1.325
5%
1.115
1.105
7.5%
1.095
1.085
1.075
1.065
10%
1.055
1.305
–50
–25
25
50
0
TEMPERATURE (°C)
75
100
1.045
–50
–25
25
50
0
TEMPERATURE (°C)
29045 G05
1V Threshold Voltage vs
Temperature
21.0
100
IV2 vs Temperature
IV1 vs Temperature
5%
75
29045 G06
21.5
0.950
100
1.135
29045 G04
0.940
25
50
0
TEMPERATURE (°C)
1.2V Threshold Voltage vs
Temperature
THRESHOLD VOLTAGE, VRT12 (V)
THRESHOLD VOLTAGE, VRT15 (V)
1.665
–25
29045 G03
1.425
5%
1.685
10%
2.225
1.5V Threshold Voltage vs
Temperature
1.705
THRESHOLD VOLTAGE, VRT18 (V)
2.325
29045 G02
1.8V Threshold Voltage vs
Temperature
1.8
V1 = 5V
V2 = 3.3V
S1 = S2 = TOL = 1.4V
1.7
V1 = 5V
V2 = 3.3V
S1 = S2 = TOL = 1.4V
0.930
1.6
7.5%
0.910
0.900
20.5
IV2 (µA)
0.920
IV1 (µA)
THRESHOLD VOLTAGE, VRT10 (V)
100
5%
20.0
1.5
1.4
0.890
10%
19.5
1.3
0.880
0.870
–50
–25
25
50
0
TEMPERATURE (°C)
75
100
29045 G07
19.0
–50
–25
25
50
0
TEMPERATURE (°C)
75
100
29045 G08
1.2
–50
–25
25
50
0
TEMPERATURE (°C)
75
100
29045 G09
sn29045 29045fs
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LTC2904/LTC2905
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TYPICAL PERFOR A CE CHARACTERISTICS
Specifications are at TA = 25°C unless otherwise noted.
700
19.5
TYPICAL TRANSIENT DURATION (µs)
V1 = 2.5V
V2 = 3.3V
S1 = S2 = TOL = 1.4V
18.5
18.0
17.5
17.0
–50
600
500
400
RESET OCCURS
ABOVE CURVE
300
200
100
0
–25
25
50
0
TEMPERATURE (°C)
75
100
210
205
3
2
1
25
50
75
–1
100
0
1
2
3
RST PULL-DOWN CURRENT, IRST (mA)
V2 = S1 = S2 = TOL = V1
10pF CAPACITOR AT RST
4
RST OUTPUT VOLTAGE (V)
1
2
3
2
1
0
V2 = S1 = S2 = TOL = V1
NO PULL-UP R
5
4
RST AT 150mV
3
2
1
5
V1 (V)
29045 G16
5
4
29045 G15
RST Pull-Down Current (IRST)
vs Supply Voltage (VCC)
RST AT 50mV
0
4
3
V1 (V)
RST Pull-Down Current (IRST)
vs Supply Voltage (VCC)
5
3
0
29045 G14
RST Output Voltage vs V1
2
1
–1
5
4
29045 G13
1
2
V1 (V)
TEMPERATURE (°C)
0
3
0
0
200
1µ
4
RST OUTPUT VOLTAGE (V)
RST OUTPUT VOLTAGE (V)
RESET TIME-OUT PERIOD, tRST (ms)
215
100n
V2 = S1 = S2 = TOL = V1
10k PULL-UP RESISTOR
4
220
1n
10n
CTMR (FARAD)
5
V2 = S1 = S2 = TOL = V1
10k PULL-UP RESISTOR
225
100p
RST Output Voltage vs V1
RST Output Voltage vs V1
CRT = 22nF
230 (FILM)
0
1
29045 G12
5
235
–25
10
29045 G11
Reset Time-Out Period (tRST)
vs Temperature
195
–50
100
0.1
10p
1
10
100
0.1
COMPARATOR OVERDRIVE VOLTAGE (% OF VRTX)
29045 G10
–1
1000
RST PULL-DOWN CURRENT, IRST (mA)
IV2 (µA)
19.0
10000
RESET TIME OUT PERIOD, tRST (ms)
20.0
Reset Time Out Period (tRST)
vs Capacitance (CTMR)
Typical Transient Duration vs
Comparator Overdrive (V1, V2)
IV2 vs Temperature
S1 = V2 = V1
TOL = S2 = GND
NO PULL-UP R
5
4
RST AT 150mV
3
2
1
RST AT 50mV
0
0
1
2
3
4
SUPPLY VOLTAGE, VCC (V)
5
29045 G17
0
1
2
3
4
SUPPLY VOLTAGE, VCC (V)
5
29045 G18
sn29045 29045fs
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LTC2904/LTC2905
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TYPICAL PERFOR A CE CHARACTERISTICS
Specifications are at TA = 25°C unless otherwise noted.
RST Output Voltage Low (VOL) vs
RST Pull-Down Current (IRST)
1.6
1.4
1.8
25°C
85°C
–40°C
1.2
1.0
0.8
0.6
0.4
0.2
V1 = 5V
V2 = 3.3V
S1 = S2 = TOL = V1
NO PULL-UP R
1.6
1.4
RST Pull-Up Current (IRST) vs
Supply Voltage (VCC)
–18
TOL = GND
25°C
85°C
RST PULL-UP CURRENT, IRST (µA)
V1 = 5V
V2 = 3V
S1 = S2 = TOL = V1
NO PULL-UP R
RST OUTPUT VOLTAGE LOW, VOL (V)
RST OUTPUT VOLTAGE LOW, VOL (V)
1.8
RST Output Voltage Low (VOL) vs
RST Pull-Down Current (IRST)
–40°C
1.2
1.0
0.8
0.6
0.4
0.2
–16
–14
–12
–10
–8
–6
–4
–2
VRT25
0
10
30
40
50
60
20
RST PULL-DOWN CURRENT, IRST (mA)
0
–10
–8
–6
–4
–2
0
2.0
2.5
VRT33
VRT50
3.5
3.0
4.5
4.0
SUPPLY VOLTAGE, VCC (V)
5.0
3.5
V1 = 3.3V
V2 = 1.8V
S1 = TOL =V1
S2 = OPEN
NO PULL-UP R
2.5
2.0
1.5
85°C
–40°C
1.0
25°C
0.5
–12
IS1, IS2, ITOL vs Temperature
2.5
2.0
–40°C
1.5
85°C
1.0
25°C
0
–8
–7 –6 –5 –4 –3 –2
–1
OUTPUT SOURCE CURRENT, IRST (µA)
0
29045 G24
–20
S1 = S2 = TOL = 3.3V
S1 = S2 = TOL = GND
–19
18
–18
17
–17
IS1, IS2, ITOL (µA)
IS1, IS2, ITOL (µA)
3.0
IS1, IS2, ITOL vs Temperature
19
16
15
14
13
–16
–15
–14
–13
12
–12
11
–11
25
50
0
TEMPERATURE (°C)
V1 = 3.3V
V2 = 1.5V
S1 = TOL = V1
S2 = OPEN
NO PULL-UP R
29045 G23
20
–25
5.0
0.5
–8
–6
–4
–2
–10
OUTPUT SOURCE CURRENT, IRST (µA)
29045 G22
10
–50
3.0
3.5
4.0
4.5
SUPPLY VOLTAGE, VCC (V)
RST Output Voltage High (VOH) vs
RST Output Source Current (IRST)
RST OUTPUT VOLTAGE HIGH, VOH (V)
RST OUTPUT VOLTAGE HIGH, VOH (V)
RST PULL-UP CURRENT, IRST (µA)
3.0
TOL = V1
–12
2.5
29045 G21
RST Output Voltage High (VOH) vs
RST Output Source Current (IRST)
–14
VRT50
29045 G20
RST Pull-Up Current (IRST) vs
Supply Voltage (VCC)
VRT25
2.0
10
30
40
50
60
20
RST PULL-DOWN CURRENT, IRST (mA)
0
29045 G19
–16
VRT33
0
0
75
100
29045 G25
–10
–50
–25
25
50
0
TEMPERATURE (°C)
75
100
29045 G26
sn29045 29045fs
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LTC2904/LTC2905
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PI FU CTIO S
(TS8 Package/DDB8 Package)
V2 (Pin 1/Pin 4): Voltage Input 2. Input for V2 monitor.
Select from 3.3V, 2.5V, 1.8V, 1.5V, 1.2V or 1.0V. Refer to
Table 1 for details. The greater of V1, V2 is also the internal
supply voltage, VCC. Bypass this pin to ground with a 0.1µF
(or greater) capacitor.
RST (Pin 2/Pin 3): (LTC2904 Only) Reset Logic Output.
When all voltage inputs are above the reset threshold for
at least the programmed delay time, this pin pulls low. This
pin has a weak pull-up to VCC and may be pulled above VCC
using an external pull-up.
TMR (Pin 2/Pin 3): (LTC2905 Only) Reset Delay Time
Programming Pin. Attach an external capacitor (CTMR) to
GND to set a reset delay time of 9ms/nF. Leaving the pin
open generates a minimum delay of approximately 200µs.
A 22nF capacitor will generate a 200ms reset delay time.
RST (Pin 3/Pin 2): Inverted Reset Logic Output. Pulls low
when any voltage input is below the reset threshold and is
held low for programmed delay time after all voltage
inputs are above threshold. This pin has a weak pull-up
to VCC and may be pulled above VCC using an external
pull-up.
GND (Pin 4/Pin 1, Pin 9): Ground.
TOL (Pin 5/Pin 8): Three-state Input for Supply Tolerance
Selection (5%, 7.5% or 10%). See the Applications Information section for tolerance selection chart (Table 2).
S1 (Pin 6/Pin 7): Voltage Threshold Select Three-State
Input. Connect to V1, GND or leave unconnected in open
state (See Table 1).
S2 (Pin 7/Pin 6): The Second Voltage Threshold Select
Three-State Input. Connect to V1, GND or leave unconnected in open state (See Table 1).
V1 (Pin 8/Pin 5): Voltage Input 1. Input for V1 monitor.
Select from 5V, 3.3V, or 2.5V. See Table 1 for details. The
greater of V1, V2 is also the internal supply voltage, VCC.
Bypass this pin to ground with a 0.1µF (or greater)
capacitor.
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BLOCK DIAGRA
VCC
LTC2904
6µA
–
RST
V1
+
VCC
POWER
DETECT
200ms
RESET PULSE
GENERATOR
RESISTOR
NETWORK
–
VCC
6µA
V2
+
RST
BAND GAP
REFERENCE
THREE-STATE DECODER
GND
2904 BD
S1
S2
TOL
sn29045 29045fs
7
LTC2904/LTC2905
W
BLOCK DIAGRA
LTC2905
–
TMR
VCC
V1
+
VCC
POWER
DETECT
6µA
RESISTOR
NETWORK
RESET PULSE
GENERATOR
–
RST
V2
+
BAND GAP
REFERENCE
THREE-STATE DECODER
GND
2905 BD
S1
S2
TOL
WU
W
TI I G DIAGRA
VX Monitor Timing
VRTX
VX
tUV
tRST
RST
1V
RST
1V
29045 TD
sn29045 29045fs
8
LTC2904/LTC2905
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APPLICATIO S I FOR ATIO
Supply Monitoring
The LTC2904/LTC2905 are low power, high accuracy dual
supply monitors with a common reset output and selectable thresholds. Reset delay is set to a nominal of 200ms
for the LTC2904 and is adjustable using an external
capacitor for the LTC2905.
The two three-state input pins (S1 and S2) select one of
nine possible threshold voltage combinations. Another
three-state input pin sets the supply tolerance (5%, 7.5%
or 10%). Both input voltages (V1 and V2) must be above
predetermined thresholds for the reset not to be invoked.
The LTC2904/LTC2905 assert the reset outputs during
power-up, power-down and brownout conditions on
either of the voltage inputs.
Power-Up
The greater of V1, V2 is the internal supply voltage (VCC).
VCC powers the drive circuits for the RST pin. Therefore as
soon as V1 or V2 reaches 1V during power-up, the RST
output asserts low.
VCC also powers the drive circuits for the RST pin in the
LTC2904. Therefore, RST weakly pulls high when V1 or V2
reaches at least 1V.
Threshold programming is complete when V1 reaches at
least 2.17V. After programming, if either V1 or V2 falls
below its programmed threshold, RST asserts low (RST
weakly pulls high) as long as VCC is at least 1V.
Once V1 and V2 rise above their thresholds, an internal
timer is started. After the programmed delay time, RST
weakly pulls high (RST asserts low).
Power-Down
On power-down, once either V1 or V2 inputs drops below
its threshold, RST asserts logic low and RST weakly pulls
high. VCC of at least 1V guarantees a logic low of 0.4V at
RST.
Programming Pins
The three 3-state input pins: S1, S2 and TOL should be
connected to GND, V1 or left unconnected during normal
operation. Note that when left unconnected, the maximum
leakage current allowable from the pin to either GND or V1
is 10µA.
In margining applications, all the 3-state input pins can be
driven using a tri-state buffer. Note however the low and
high output of the tri-state buffer has to satisfy the VIL and
VIH of the 3-state pin listed in the Electrical Characteristics
Table. Moreover, when the tri-state buffer is in the high
impedance state, the maximum leakage current allowed
from the pin to either GND or V1 is 10µA.
Monitor Programming
Connecting S1 and S2 to GND, V1 or leaving them open
selects the LTC2904/LTC2905 input voltage combinations. Table 1 shows the nine possible combinations of
nominal input voltages and their corresponding S1, S2
connections.
Table 1. Voltage Threshold Programming
V1
V2
S1
S2
5.0
3.3
V1
V1
3.3
2.5
Open
GND
3.3
1.8
V1
Open
3.3
1.5
Open
V1
3.3
1.2
Open
Open
2.5
1.8
GND
GND
2.5
1.5
GND
Open
2.5
1.2
GND
V1
2.5
1.0
V1
GND
Note: Open = open circuit or driven by a three state buffer in high
impedance state with leakage current less than 10µA.
Tolerance Programming
The three-state input pin, TOL programs the common
supply tolerance for both V1 and V2 input voltages (5%,
7.5% or 10%). The larger the tolerance the lower the trip
threshold. Table 2 shows the tolerances selection corresponding to a particular connection at the TOL pin.
Table 2. Tolerance Programming
Tolerance
TOL
5%
V1
7.5%
Open
10%
GND
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9
LTC2904/LTC2905
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APPLICATIO S I FOR ATIO
Threshold Accuracy
Reset threshold accuracy is of the utmost importance in a
supply sensitive system. Ideally such a system should not
reset while supply voltages are within a specified margin
below the rated nominal level. Both of the LTC2904/
LTC2905 inputs have the same relative threshold accuracy. The specification for LTC2904/LTC2905 is ±1.5% of
the programmed nominal input voltage (over the full
operating temperature range).
For example, when the LTC2904/LTC2905 are programmed
to handle a 5V input with 10% tolerance (S1 = S2 = V1 and
TOL = GND, refer to Table 1 and Table 2), it does not issue
a reset command when V1 is above 4.5V. The typical 10%
trip threshold is at 11.5% below the nominal input voltage
level. Therefore, the typical trip threshold for the 5V input
is 4.425V. With ±1.5% accuracy, the trip threshold range
is 4.425V ±75mV over temperature (i.e. 10% to 13%
below 5V). This implies that the monitored system must
operate reliably down to 4.35V over temperature.
The same system using a supervisor with only ±2.5%
accuracy needs to work reliably down to 4.25V (4.375V
±125mV) or 15% below 5V, requiring the monitored
system to work over a much wider operating voltage
range.
In any supervisory application, supply noise riding on the
monitored DC voltage can cause spurious resets, particularly when the monitored voltage is near the reset threshold. A less desirable but common solution to this problem
is to introduce hysteresis around the nominal threshold.
Notice however, this hysteresis introduces an error term
in the threshold accuracy. Therefore, a ±2.5% accurate
monitor with ±1.0% hysteresis is equivalent to a ±3.5%
monitor with no hysteresis.
The LTC2904/LTC2905 takes a different approach to solve
this problem of supply noise causing spurious reset. The
first line of defense against this spurious reset is a first
order low pass filter at the output of the comparator. Thus,
the comparator output goes through a form of integration
before triggering the output logic. Therefore, any kind of
transient at the input of the comparator needs to be of
sufficient magnitude and duration before it can trigger a
change in the output logic.
The second line of defense is the programmed delay time
tRST (200ms for LTC2904 and using an external capacitor
for LTC2905). This delay will eliminate the effect of any
supply noise whose frequency is above 1/tRST on the RST
and RST output.
When either V1 or V2 drops below its programmed
threshold, the RST pin asserts low (RST weakly pulls
high). Then when the supply recovers above the programmed threshold, the reset-pulse-generator timer starts
counting.
If the supply remains above the programmed threshold
when the timer finishes counting, the RST pin weakly pulls
high (RST asserts low). However, if the supply falls below
the programmed threshold any time during the period
when the timer is still counting, the timer resets and it
starts fresh when the supply next rises above the programmed threshold.
Note that this second line of defense is only effective for a
rising supply and does not affect the sensitivity of the
system to a falling supply. Therefore, the first line of
defense that works for both cases of rising and falling is
necessary. These two approaches prevent spurious reset
caused by supply noise without sacrificing the threshold
accuracy.
Selecting the Reset Timing Capacitor
The reset time-out period for LTC2905 is adjustable in
order to accommodate a variety of microprocessor applications. Connecting a capacitor, CTMR, between the TMR
pin and ground sets the reset time-out period, tRST. The
following formula determines the value of capacitor needed
for a particular reset time-out period:
CTMR = tRST • 110 • 10–9 [F/s]
For example, using a standard capacitor value of 22nF
would give a 22000/110 = 200ms delay.
sn29045 29045fs
10
LTC2904/LTC2905
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APPLICATIO S I FOR ATIO
Figure 1 shows the desired delay time as a function of the
value of the timer capacitor that should be used:
RESET TIME OUT PERIOD, tRST (ms)
10000
1000
100
Note however, by adding an external pull-up resistor, the
pull-up strength on the RST pin is increased. Therefore, if
it is connected in a wired-OR connection, the pull-down
strength of any single device needs to accommodate this
additional pull-up strength.
10
1
0.1
10p
As noted in the Power-Up and Power-Down sections the
circuits that drive RST and RST are powered by VCC.
During fault condition, VCC of at least 1V guarantees a
maximum VOL = 0.4V at RST. However, at VCC = 1V the
weak pull-up current on RST is barely turned on. Therefore, an external pull-up resistor of no more than 100k is
recommended on the RST pin if the state and pull-up
strength of the RST pin is crucial at very low VCC.
100p
1n
10n
CTMR (FARAD)
100n
1µ
29045 F01
Figure 1. Reset Time-Out Period vs Capacitance
Leaving the TMR pin open with no external capacitor
generates a reset time-out of approximately 200µs. For
long reset time-out, the only limitation is the availability of
large value capacitor with low leakage. The TMR capacitor
will never charge if the leakage current exceeds the minimum TMR charging current of 2.1µA (typical).
RST and RST Output Characteristics
The DC characteristics of the RST and RST pull-up and
pull-down strength are shown in the Typical Performance
Characteristics section. Both RST and RST have a weak
internal pull-up to VCC = Max (V1, V2) and a strong pulldown to ground.
The weak pull-up and strong pull-down arrangement allow
these two pins to have open-drain behavior while possessing several other beneficial characteristics.
The weak pull-ups eliminate the need for external pull-up
resistors when the rise time on these pins is not critical. On
the other hand, the open-drain RST configuration allows
for wired-OR connections and can be useful when more
than one signal needs to pull down on the RST line.
Output Rise and Fall Time Estimation
The RST and RST outputs have strong pull-down capability. The following formula estimates the output fall time
(90% to 10%) for a particular external load capacitance
(CLOAD):
tFALL ≈ 2.2 • RPD • CLOAD
where RPD is the on-resistance of the internal pull-down
transistor estimated to be typically 40Ω at room temperature (25°C) and CLOAD is the external load capacitance on
the pin. Assuming a 150pF load capacitance, the fall time
is about 13ns.
The rise time, on the RST and RST pins is limited by weak
internal pull-up current sources to VCC. The following
formula estimates the output rise time (10% to 90%) at the
RST and RST pins:
tRISE ≈ 2.2 RPU • CLOAD
where RPU is the on-resistance of the pull-up transistor.
Notice that this pull-up transistor is modeled as a 6µA
current source in the Block Diagram as a typical representation.
The on-resistance as a function of the VCC = Max (V1, V2)
voltage (for VCC > 1V) at room temperature is estimated as
sn29045 29045fs
11
LTC2904/LTC2905
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APPLICATIO S I FOR ATIO
capacitance, the rise time is 86µs. An external pull-up
resistor may be used if the output needs to pull up faster
and/or to a higher voltage, for example: the rise time
reduces to 3.3µs for a 150pF load capacitance, when using
a 10k pull-up resistor.
follow:
R PU =
6 • 105
Ω
MAX(V1, V2) – 1V
At VCC = 3.3V, RPU is about 260k. Using 150pF for load
U
TYPICAL APPLICATIO S
2.5V, 1.2V Supply Monitor, 10% Tolerance
V2
1.2V
V1
2.5V
LTC2904
RST
S2
RST
S1
GND
TOL
0.1µF
0.1µF
SYSTEM
RESET
2904 TA02
3.3V, 1.2V Dual Supply Monitor with LED Power Good Indicator,
7.5% Tolerance and Adjustable Timer
3.3V
510Ω
1.2V
V2
V1
LTC2904
LED
S2
RST
S1
RST
GND
TOL
0.1µF
0.1µF
SYSTEM
RESET
2905 TA03
sn29045 29045fs
12
LTC2904/LTC2905
U
TYPICAL APPLICATIO S
5V, 3.3V Dual Supply Monitor with Voltage
Margining for Automated On-Board Testing
5V
DC/DC
CONVERTER
SYSTEM
LOGIC
3.3V
V1
V2
LTC2905
VIN
SUPPLY
CONTROLLER
S1
0.1µF
0.1µF
TMR
22nF
THREE-STATE
S2
GND
TOL
RST
29045 TA06
3.3V, 1.2V Dual Supply Monitor with Asymmetric Hysteresis, 5%
Tolerance (Supplies Rising), 10% Tolerance (After RST Goes Low)
1.2V
V2
V1
LTC2904
3.3V
10k
S2
RST
S1
TOL
GND
RST
0.1µF
0.1µF
SYSTEM
RESET
2904 TA04
sn29045 29045fs
13
LTC2904/LTC2905
U
PACKAGE DESCRIPTIO
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702)
0.61 ±0.05
(2 SIDES)
R = 0.115
TYP
5
0.56 ± 0.05
(2 SIDES)
3.00 ±0.10
(2 SIDES)
0.675 ±0.05
2.50 ±0.05
1.15 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
2.20 ±0.05
(2 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.38 ± 0.10
8
2.00 ±0.10
(2 SIDES)
0.75 ±0.05
0 – 0.05
4
0.25 ± 0.05
1
PIN 1
CHAMFER OF
EXPOSED PAD
(DDB8) DFN 1103
0.50 BSC
2.15 ±0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
sn29045 29045fs
14
LTC2904/LTC2905
U
PACKAGE DESCRIPTIO
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637)
0.52
MAX
2.90 BSC
(NOTE 4)
0.65
REF
1.22 REF
1.4 MIN
3.85 MAX 2.62 REF
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.22 – 0.36
8 PLCS (NOTE 3)
0.65 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
0.09 – 0.20
(NOTE 3)
1.95 BSC
TS8 TSOT-23 0802
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
sn29045 29045fs
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC2904/LTC2905
U
TYPICAL APPLICATIO
Quad Supply Monitor with LED Undervoltage Indicator,
5% Tolerance, 3.3V, 2.5V, 1.8V, 1.2V
3.3V 1.8V
V1
V2
1.2V
V2
LTC2905
TMR
0.1µF
TOL
S2
22nF
TOL
22nF
0.1µF
GND
S1
GND
TMR
0.1µF
510Ω
2.5V
V1
LTC2905
0.1µF
S2
LED
RST
RST
S1
2905 TA05
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sn29045 29045fs
16
Linear Technology Corporation
LT/TP 01/04 1K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
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