RMPA2453 2.4–2.5 GHz InGaP HBT Linear Power Amplifier General Description Features The RMPA2453 power amplifier is designed for high performance WLAN applications in the 2.4–2.5 GHz frequency band. The low profile 16 pin 3 x 3 x 0.9 mm package with internal matching on both input and output to 50Ω minimizes next level PCB space and allows for simplified integration. The on-chip detector provides power sensing capability while the logic control provides power saving shutdown options. The PA’s low power consumption and excellent linearity are achieved using our InGaP Heterojunction Bipolar Transistor (HBT) technology. • • • • • • • • • • 26dB small signal gain 26.5dBm output power @ 1dB compression 2.5% EVM at 18dBm modulated output power 3.5% EVM at 19dBm modulated output power 3.3V single positive supply operation Two power saving shutdown options (bias and logic control) Integrated power detector with 20dB dynamic range Low profile 16 pin 3 x 3 x 0.9 mm leadless package Internally matched to 50Ω and DC blocked RF input/ output Optimized for use in 802.11b/g applications Device VL VM12 VDET REF VDET VC2 Functional Block Diagram 16 15 14 13 VOLTAGE DETECTOR 1 12 N/C 11 RF OUT BIAS RF IN 2 INPUT MATCH INT STG MATCH OUTPUT MATCH N/C 4 9 N/C ©2004 Fairchild Semiconductor Corporation 5 6 7 8 N/C RF OUT N/C 10 N/C 3 VC1 RF IN Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description VL (logic) RF IN RF IN N/C VC1 N/C N/C N/C N/C RF OUT RF OUT N/C VC2 VDET VDET REF VM12 Backside Ground RMPA2453 Rev. D RMPA2453 July 2004 Symbol VC1, VC2 IC1, IC2 VM12 VL PIN TCASE TSTG Parameter Positive Supply Voltage Supply Current IC1 IC2 Positive Bias Voltage Logic Voltage RF Input Power Case Operating Temperature Storage Temperature Ratings 5 Units V 120 700 4.0 5 10 -40 to +85 -55 to +150 mA mA V V dBm °C °C Notes: 1: No permanent damage with only one parameter set at extreme limit. Other parameters set to typical values Electrical Characteristics1, 3 802.11g OFDM Modulation (RF framed with 176ms burst time 100ms idle time) 54Mbps Data Rate 16.7MHz Bandwidth Parameter Frequency Supply Voltage Gain Total Current @ 18dBm POUT Total Current @ 19dBm POUT EVM @ 18dBm POUT2 EVM @ 19dBm POUT2 Detector Output @ 19dBm POUT Detector Threshold4 POUT Spectral Mask Compliance5 Min 2.4 3.0 24.5 Typ 3.3 26 133 145 2.5 3.5 515 5.0 21.0 Max 2.5 3.6 29 160 165 3.53 4.53 600 7.0 Units GHz V dB mA mA % % mV dBm dBm Electrical Characteristics3, 6 802.11b CCK Modulation (RF not framed) 11Mbps Data Rate 22.0MHz Bandwidth Parameter Frequency Supply Voltage Gain Total Current First Sidelobe Power Second Sidelobe Power Max POUT Spectral Mask Compliance7 Min 2.4 3.0 24.5 Typ 3.3 26 250 -35 -55 24.0 Max 2.5 3.6 29 Units GHz V dB mA dBc dBc dBm Notes: 1: VC1,VC2, VM12 = 3.3V, TC = 25°C, PA is constantly biased, 50Ω system. 2: Percentage includes system noise floor of EVM = 0.8%. 3: EVM not measured 100% in production. 4: POUT measured at PIN corresponding to power detection threshold. 5: Measured at PIN at which Spectral Mask Compliance is satisfied. Two-sample windowing length applied. 6: VC1,VC2, VM12 = 3.3V, TC = 25°C, POUT = +23dBm, 50Ω system. Satisfies spectral mask. 7: PIN is adjusted to point where spectral performance reaches maximum limit. ©2004 Fairchild Semiconductor Corporation RMPA2453 Rev. D RMPA2453 Absolute Ratings1 Parameter Frequency Supply Voltage Gain Total Quiescent Current Bias Current at pin VM122 P1dB Compression Standby Current3 Shutdown Current (VM12 = 0V) Input Return Loss Output Return Loss Detector Output at P1dB Comp Detector POUT Threshold 2nd Harmonic Output at P1dB 3rd Harmonic Output at P1dB Logic Shutdown Control (VL): Device Off, Logic High Input Device On, Logic Low Input Logic Current Turn-on Time4 Turn-off Time Spurious (Stability)5 Min 2.4 3.0 24.5 10.0 25 2.0 Typ 3.3 26 105 12.5 26.5 0.7 <1.0 19 22 2.0 7.0 -45 -42 2.4 0.0 150 <1 <1 -65 Max 2.5 3.6 29 135 15.0 9.0 0.8 Units GHz V dB mA mA dBm mA µA dB dB V dBm dBc dBc V V µA µS µS dBc Notes: 1: VC1,VC2, VM12 = 3.3V, TC = 25°C, 50Ω system. 2: Bias current is included in the Total Quiescent Current. 3: VL is set to Input Logic Level High for PA Off operation. 4: Measured from Device On signal turn on (Logic Low) to the point where RF POUT stabilizes to 0.5dB. 5: Load VSWR is set to 8:1 and the angle is varied 360 degrees. POUT = -30dBm to P1dB. ©2004 Fairchild Semiconductor Corporation RMPA2453 Rev. D RMPA2453 Electrical Characteristics1 Single Tone RMPA2453 Typical Characteristics 802.11g Temperature dependency Left column VM12 = 3.3V Right column VM12 = 3.0V Typical EVM(1) versus Total Integrated Output Channel Power Typical EVM 54Mbps Data Rate OFDM 16.7MHz BW Frequency = 2.45GHz, Vm12=3.3V, Vc1=3.3V, Vc2=3.3V +25C -40C +85C 9 8 9 -40C +85C 7 Total EVM (%) Total EVM (%) +25C 8 7 6 5 4 6 5 4 3 3 2 2 1 1 0 0 0 2 4 6 8 10 12 14 16 18 Total Integrated Output Power (dBm) 20 22 24 0 26 Typical Total Current vs. Total Integrated Output Channel Power 2 4 6 8 10 12 14 16 18 Total Integrated Output Power (dBm) 20 22 24 26 Typical Total Current vs. Total Integrated Output Channel Power 54Mbps Data Rate OFDM 16.7MHz BW Frequency = 2.45GHz, Vm12=3.3V, Vc1=3.3V, Vc2=3.3V 54Mbps Data Rate OFDM 16.7MHz BW Frequency = 2.45GHz, Vm12=3.0V, Vc1=3.3V, Vc2=3.3V 240 240 220 +25C -40C +85C 200 220 +25C 200 -40C +85C 180 Total Current (mA) 180 Total Current (mA) versus Total Integrated Output Channel Power 10 10 160 140 120 100 160 140 120 100 80 80 60 60 40 40 20 20 0 2 4 6 8 10 12 14 16 18 Total Integrated Output Power (dBm) 20 22 24 26 0 2 4 54Mbps Data Rate OFDM 16.7MHz BW Frequency = 2.45GHz, Vm12=3.3V, Vc1=3.3V, Vc2=3.3V 27 27 26 26 25 25 Gain (dB) 28 24 23 +25C -40C +85C 21 8 10 12 14 16 18 Total Integrated Output Power (dBm) 20 22 24 26 54Mbps Data Rate OFDM 16.7MHz BW Frequency = 2.45GHz, Vm12=3.0V, Vc1=3.3V, Vc2=3.3V 28 22 6 Typical Gain versus Total Integrated Output Channel Power Typical Gain versus Total Integrated Output Channel Power Gain (dB) (1) 54Mbps Data Rate OFDM 16.7MHz BW Frequency = 2.45GHz, Vm12=3.0V, Vc1=3.3V, Vc2=3.3V +25C -40C +85C 24 23 22 21 20 20 0 2 4 6 8 10 12 14 16 18 Total Integrated Output Power (dBm) 20 22 24 26 0 2 4 6 8 10 12 14 16 18 20 Total Integrated Output Power (dBm) 22 24 26 Note: 1: Uncorrected EVM. Source EVM is approximately 0.8%. ©2004 Fairchild Semiconductor Corporation RMPA2453 Rev. D RMPA2453 Typical Characteristics 802.11g (Continued) Temperature Dependency Left column VM12 = 3.3V Right column VM12 = 3.0V Typical VDET versus Total Integrated Output Channel Power Typical VDET versus Total Integrated Output Channel Power 54Mbps Data Rate OFDM 16.7MHz BW Frequency = 2.45GHz, Vm12=3.3V, Vc1=3.3V, Vc2=3.3V 54Mbps Data Rate OFDM 16.7MHz BW Frequency = 2.45GHz, Vm12=3.0V, Vc1=3.3V, Vc2=3.3V 1500 +25C -40C +85C 1200 Detector Output VDET (mV) Detector Output VDET (mV) 1500 900 600 300 +25C -40C +85C 1200 900 600 300 0 0 0 2 4 6 8 10 12 14 16 18 Total Integrated Output Power (dBm) 20 22 24 26 0 2 4 6 8 10 12 14 16 18 20 Total Integrated Output Power (dBm) 22 24 26 Frequency Dependency VM12 = 3.3V Typical EVM (1) Typical Gain versus Total Integrated Output Channel Power versus Total Integrated Output Channel Power 54Mbps Data Rate OFDM 16.7MHz BW T A = 25oC, Vm12=3.3V, Vc1=3.3V, Vc2=3.3V 54Mbps Data Rate OFDM 16.7MHz BW TA = 25o C, Vm12=3.3V, Vc1=3.3V, Vc2=3.3V 10 28 2.40GHz 2.45GHz 2.50GHz 9 8 27 26 6 Gain (dB) Total EVM (%) 7 5 4 25 24 23 2.40GHz 2.45GHz 2.50GHz 3 22 2 21 1 0 20 0 2 4 6 8 10 12 14 16 18 Total Integrated Output Power (dBm) 20 22 24 26 0 2 Typical Total Current vs. Total Integrated Output Channel Power 4 6 20 22 24 26 Typical VDET versus Total Integrated Output Channel Power 54Mbps Data Rate OFDM 16.7MHz BW TA = 25oC, Vm12=3.3V, Vc1=3.3V, Vc2=3.3V 54Mbps Data Rate OFDM 16.7MHz BW TA = 25o C, Vm12=3.3V, Vc1=3.3V, Vc2=3.3V 240 1500 200 Detector Output VDET (mV) 2.40GHz 2.45GHz 2.50GHz 220 180 Total Current (mA) 8 10 12 14 16 18 Total Integrated Output Power (dBm) 160 140 120 100 80 60 2.40GHz 2.45GHz 2.50GHz 1200 900 600 300 40 20 0 0 2 4 6 8 10 12 14 16 18 Total Integrated Output Power (dBm) 20 22 24 26 0 2 4 6 8 10 12 14 16 18 Total Integrated Output Power (dBm) 20 22 24 26 Note: 1: Uncorrected EVM. Source EVM is approximately 0.8%. ©2004 Fairchild Semiconductor Corporation RMPA2453 Rev. D Spec ANA Pout = 23 dBm Pin adjusted to the point where the part just begins to approach the 802.11b spectral mask requirements. RMPA2453 Spectral Plot Showing Compliance to 802.11b Spectral Mask Requirements @ 23 dBm Modulated Output Power 11 Mbps CCK Data 22 MHz BW VC1, VC2 = 3.3V VM12 = 3.3V T=25°C Single Tone Typical Single Tone Gain versus Single Tone Output Power Typical Small Signal S-parameters versus Frequency Vm12=3.3V, Vc1=3.3V, Vc2=3.3V, T A = 25oC o Vm12=3.3V, Vc1=3.3V, Vc2=3.3V, TA = 25 C 35 28 30 27 20 Mag(S11) 15 Mag(S21) 10 Mag(S22) 26 Total EVM (%) S-parameters (dB) 25 5 0 -5 -10 25 24 23 2.40GHz -15 22 -20 2.45GHz 2.50GHz -25 21 -30 -35 20 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 2 4 6 Frequency (GHz) 8 10 12 14 16 18 20 22 24 26 28 Total Output Power (dBm) Application Information Precautions to Avoid Permanent Device Damage: Static Sensitivity: Follow ESD precautions to protect against ESD damage. • A properly grounded static-dissipative surface on which to place devices. • Static-dissipative floor or mat. • A properly grounded conductive wrist strap for each person to wear while handling devices. ©2004 Fairchild Semiconductor Corporation RMPA2453 Rev. D RMPA2453 Typical Characteristics 802.11b RMPA2453 Package Outline Dimensions in inches [mm] 2453 WWWY Front Side View See Detail A Detail A Bottom View as Viewed from Bottom Note: Dimensions do not include protrusions or mold flash. These are not to exceed 0.006" (.155mm) on any side. Evaluation Board Schematic 2453 WWWY Backside Ground ©2004 Fairchild Semiconductor Corporation RMPA2453 Rev. D RMPA2453 Evaluation Board of Materials Evaluation Board Layout C8 C4 R2 C3 C5 R1 L1 C6 C2 L2 C1 C7 C9 Actual Board Size = 2.0" X 1.5" ©2004 Fairchild Semiconductor Corporation RMPA2453 Rev. D Recommended turn-on sequence: 1) Connect common ground terminal to the Ground (GND) pin on the board. 2) Apply low voltage 0.0 to +1.0 V to pin V L. 3) Apply positive supply voltage VC1 (= 3.3V) to pin VC1 (first stage collector). 4) Apply positive supply voltage VC2 (= 3.3V) to pin VC2 (second stage collector). 5) Apply positive bias voltage VM12 (= 3.3V) to pin VM12 (bias networks). 6) At this point, you should expect to observe the following positive currents flowing into the pins: Pin VM12 VC1 VC2 VL Current 10.0 – 15.0 mA 35.0 – 55.0 mA 40.0 – 60.0 mA <1 nA ©2004 Fairchild Semiconductor Corporation 7) Apply input RF power to SMA connector pin RFIN. Currents in pins VC1 and VC2 will vary depending on the input drive level. 8) Vary positive voltage VL on pin VREG from +0.5V to +2.4V to shut down the amplifier or alter the power level. Shut down current flow into the pins: Pin VM12 VC1 VC2 VL Current <0.7 mA <1 nA <1 nA <0.25 mA Recommended turn-off sequence: Use reverse order described in the turn-on sequence above. Note: 1: Turn on sequence is not critical and it is not necessary to sequence power supplies in actual system level design. RMPA2453 Rev. D RMPA2453 Evaluation Board Turn-On Sequence1 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST ActiveArray™ FASTr™ Bottomless™ FPS™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOS™ I2C™ EnSigna™ i-Lo™ FACT™ ImpliedDisconnect™ FACT Quiet Series™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC Across the board. Around the world.™ OPTOPLANAR™ PACMAN™ The Power Franchise POP™ Programmable Active Droop™ Power247™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I11