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PD - 9.1222
IRFI1310G
HEXFET® Power MOSFET
Advanced Process Technology
Ultra Low On-Resistance
Isolated Package
High Voltage Isolation = 2.5KVRMS
Sink to Lead Creepage Dist. = 4.8mm
Repetitive Avalanche Rated
175°C Operating Temperature
VDSS = 100V
RDS(on) = 0.04Ω
ID = 22A
Description
Fourth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve the lowest possible on-resistance per silicon
area. This benefit, combined with the fast switching speed and ruggedized device
design that HEXFET Power MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional insulating hardware in
commercial-industrial applications. The moulding compound used provides a high
isolation capability and a low thermal resistance between the tab and external
heatsink. This isolation is equivalent to using a 100 micron mica barrier with
standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip
or by a single screw fixing.
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Max.
Continuous Drain Current, VGS @ 10V
Continuous Collector Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
Units
22
15
88
48
0.32
±20
120
22
4.8
5.5
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
To Order
Min.
Typ.
Max.
Units
––––
––––
––––
3.1
––––
°C/W
65
Revision 0
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IRFI1310G
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(ON)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
∆V(BR)DSS/∆TJ
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
IGSS
Min.
100
–––
–––
2.0
12
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.10
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
13
77
82
64
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.04
Ω
VGS = 10V, ID = 13A
4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 50V, ID = 25A
25
VDS = 100V, VGS = 0V
µA
250
VDS = 80V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
110
ID = 25A
18
nC VDS = 80V
42
VGS = 10V, See Fig. 6 and 13
–––
VDD = 50V
–––
ID = 25A
ns
–––
RG = 9.1Ω
–––
RD = 2.0Ω, See Fig. 10
Between lead,
––– 4.5 –––
6mm (0.25in.)
nH
from package
––– 7.5 –––
and center of die contact
––– 2500 –––
VGS = 0V
––– 630 –––
pF
VDS = 25V
––– 130 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
22
–––
–––
88
–––
–––
–––
–––
140
0.79
2.5
210
1.2
A
V
ns
µC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 13A, VGS = 0V
TJ = 25°C, IF = 25A
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ 25A, di/dt ≤ 170A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
VDD = 25V, starting TJ = 25°C, L = 1.0mH
RG = 25Ω, IAS = 13A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
To Order
t=60s, ƒ=60Hz
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IRFI1310G
1000
100 0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
TOP
100
10
4.5V
20µs PULSE WIDTH
TC = 25°C
1
0.1
1
10
4.5V
10
20µs PULSE WIDTH
TC = 175°C
1
0.1
100
1
10
100
, Drain-to-Source Voltage (V)
DS
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics,
TC = 25oC
Fig 2. Typical Output Characteristics,
TC = 175oC
V
R DS(on) , Drain-to-Source On Resistance
(Normalized)
1000
I D , D ra in-to-So urce Current (A )
10 0
T J = 2 5°C
100
TJ = 1 7 5°C
10
V DS = 50V
2 0µ s P U L S E W ID TH
1
4
5
6
7
8
9
3.0
ID = 25A
2.5
2.0
1.5
1.0
0.5
VGS = 10V
0.0
10
-6 0 -4 0 -20
0
20
40
60
80 100 120 140 160 180
TJ , Junction Temperature (°C)
V G S , G a te-to-S o urce V olta ge (V )
Fig 3. Typical Transfer Characteristics
To Order
Fig 4. Normalized On-Resistance
Vs. Temperature
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IRFI1310G
4 00 0
, Gate-to-Source Voltage (V)
3 00 0
C, Capacitance (pF)
20
V GS = 0V,
f = 1MHz
C iss = C gs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
Ciss
2 00 0
Coss
V DS = 80V
V DS = 50V
V DS = 20V
16
12
8
4
V
GS
1 00 0
I D = 25A
Crss
0
FOR TEST CIRCUIT
SEE FIGURE 13
0
1
10
10 0
0
V DS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
60
90
120
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
30
QG , Total Gate Charge (nC)
100
TJ = 175°C
TJ = 25°C
10
100
100µs
1ms
10
10ms
VGS = 0V
1
0
0.5
1
1.5
2
2.5
T C = 25°C
T J = 175°C
Single Pulse
1
1
100ms
10
100
1000
VDS , Drain-to-Source Voltage (V)
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
To Order
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IRFI1310G
RD
VDS
VGS
25
D.U.T.
RG
VDD
ID, Drain Current (Amps)
20
10 V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
15
Fig 10a. Switching Time Test Circuit
10
5
0
25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
T herm al R es pons e (Z th JC )
10
D = 0 .5 0
1
0.20
0.10
0.05
0.1
0.02
0.01
PDM
t
0.01
S IN G LE P U LS E
(TH E RM A L R E S PO N S E)
t2
N ote s:
1. D u ty fa ct or D = t
0.001
0.00001
1
1
/t
2
2. P e ak T J = P D M x Z thJ C + T C
0.0001
0.001
0.01
0.1
1
t 1 , R e c ta n g u la r P u ls e D u ra tio n (s e c )
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
To Order
10
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IRFI1310G
10 V
Fig 12a. Unclamped Inductive Test Circuit
EAS , Single Pulse Avalanche Energy (mJ)
300
ID
5.3A
9.2A
BOTTOM 13A
TOP
250
200
150
100
50
VDD = 25V
0
25
50
75
100
125
150
175
Starting TJ , Juntion Temperature (°C)
Fig 12b. Unclamped Inductive Waveforms
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
10 V
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit
Appendix B: Package Outline Mechanical Drawing
Appendix C: Part Marking Information
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IRFI1310G
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
*
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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IRFI1310G
Package Outline
TO-220 Full-Pak
Part Marking Information
TO-220 Full-Pak
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: (44) 0883 713215
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 IR GERMANY:
Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: (39) 1145
10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641 IR
SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tel: 65 221 8371
Data and specifications subject to change without notice.
To Order