LTC1428-50 Micropower 8-Bit Current Sink Output D/A Converter U DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LTC ®1428-50 is a micropower 8-bit current sink output D/A converter (DAC) with an output range of 0µA to 50µA. In 3.3V or 5V systems, the DAC IOUT pin can be biased from 2V to 10V. Supply current is only 130µA. Shutdown mode drops the supply current to 0.2µA. Precision Full-Scale DAC Output Current at 25°C: 50µA ±3% Wide Output Voltage DC Compliance: 2V to 10V Wide Supply Range: 3V ≤ VCC ≤ 6.5V Supply Current in Shutdown: 0.2µA Low Supply Current: 130µA Available in 8-Pin SO Triple ModeTM Interface 1. Standard 3-Wire Mode 2. 1-Wire Pulse Mode Interface: Increment-Only 3. 2-Wire Pulse Mode Interface: Increment/Decrement DAC Value Read Back Capability in 3-Wire Mode DAC Powers Up at Midrange DAC Contents Are Retained in Shutdown The LTC1428-50 communicates with external circuitry by using one of three interface modes: standard 3-wire serial mode or one of two pulse modes. Upon power-up, the internal counter resets to 10000000B, the DAC output assumes midrange and the chip configures to 3-wire or pulse mode depending on the CS signal level. In 3-wire mode, the system MPU can serially transfer 8-bit data to and from the LTC1428-50. In pulse mode, the upper six bits of the DAC output program for incrementonly (1-wire interface) or increment/decrement (2-wire interface) operation depending on the D IN signal level. In increment-only mode, the counter rolls over and sets the DAC to zero if the counter increases beyond full scale. In increment/decrement mode, the counter stops incrementing at full scale, stops decrementing at zero scale and does not roll over. U APPLICATIONS ■ ■ ■ ■ ■ LCD Contrast Control Backlight Brightness Control Power Supply Voltage Adjustment Battery Charger Voltage/Current Adjustment GaAs FET Bias Adjustment Trimmer Pot Elimination LTC1428-50 is available in an 8-pin SO package. , LTC and LT are registered trademarks of Linear Technology Corporation. Triple Mode is a trademark of Linear Technology Corporation. U ■ TYPICAL APPLICATION Digitally Controlled LCD Bias Generator (Standard 3-Wire Mode) L1 D1 R1 240k 2 CELLS 1µF 5V 1 VIN SHDN C1 0.1µF VOUT 15.75V TO 27.75V IN STEPS OF 47mV 15mA FROM 2 CELLS SHDN SW LT ®1307 FB GND VC 4700pF R2 22k 2 IOUT DOUT VCC DIN 8 7 LTC1428-50 3 R3 22k 4 SHDN CLK GND CS VCC 6 MPU (e.g., 8051) 5 100k P1.3 P1.2 P1.1 P1.0 L1: 4.7µH MURATA-ERIE LQH3C D1: MBR0530 OR 1N4148 1428-50 TA01 1 LTC1428-50 W U U U W W W ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION (Note 1) Supply Voltage (VCC) ................................................ 7V Input Voltage (All Inputs)............ – 0.3V to (VCC + 0.3V) Output Voltage IOUT ...................................................... – 0.3V to 10V DOUT ....................................... – 0.3V to (VCC + 0.3V) Short-Circuit Duration (All Outputs) ............... Indefinite Operating Temperature Range .................... 0°C to 70°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER TOP VIEW IOUT 1 8 DOUT VCC 2 7 DIN (UP/DN) SHDN 3 LTC1428CS8-50 6 GND CLK 4 5 CS S8 PART MARKING S8 PACKAGE 8-LEAD PLASTIC SO 14285 TJMAX = 125°C, θJA = 130°C/ W Consult factory for Industrial and Military grade parts. ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VCC = 3.3V, TA = 25°C, unless otherwise specified. CONDITIONS VCC ICC MIN ● Supply Current VSHDN = VDIN = VCS = VCC, VCLK = 0V, DOUT = NC, IOUT = NC Shutdown 130 0.2 ● ● DAC Resolution DAC Full-Scale Current TYP 3.0 MAX V 225 10 µA µA 8 IOUT Bias Voltage = 2.5V ● 48.5 47.5 50 50 UNITS 6.5 Bits 51.5 52.5 µA µA DAC Zero-Scale Current IOUT Bias Voltage = 2.5V ● 200 nA DAC Differential Nonlinearity Monotonicity Guaranteed, No Missing Codes ● ±0.9 LSB Supply Voltage Rejection VCC = 3V to 6.5V, Full Scale Current, IOUT Bias Voltage = 2.5V ● Output Voltage Rejection VCC = 5V, Full Scale Current, 2V ≤ V(IOUT) ≤ 3V ● VCC = 5V, Full Scale Current, 3V ≤ V(IOUT) ≤ 10V ● Logic Input Current 0V ≤ VIN ≤ VCC ● VIH High Level Input Voltage VCC = 5V VCC = 3.3V ● ● VIL Low Level Input Voltage VCC = 5V VCC = 3.3V ● ● VOH High Level Output Voltage VCC = 5V, IO = 400µA VCC = 3.3V, IO = 400µA ● ● VOL Low Level Output Voltage VCC = 5V, IO = 2mA VCC = 3.3V, IO = 1mA ● ● 0.4 0.4 V V IOZ Three-State Output Leakage VCS = VCC ● ±5 µA 2 ±1 ±1 ±4 LSB ±1 LSB ±4 LSB ±1 µA 2.0 1.9 V V 0.80 0.45 2.4 2.1 V V V V LTC1428-50 U U U U WW RECO E DED OPERATI G CO DITIO S SYMBOL PARAMETER VCC = 5V, unless otherwise specified. (Notes 2, 3) CONDITIONS MIN TYP MAX UNITS Serial Interface fCLK Clock Frequency ● tCKS Setup Time, CLK↓ Before CS↓ ● 150 ns tCSS Setup Time, CS↓ Before CLK↑ ● 400 ns tDV CS↓ to DOUT Valid ● 150 ns tDS DIN Setup Time Before CLK↑ ● 150 ns tDH DIN Hold Time After CLK↑ ● 150 ns tDO CLK↓ to DOUT Valid ● 150 ns tCKHI CLK High Time ● 200 ns tCKLO CLK Low Time ● 250 ns tCSH CLK↓ Before CS↑ ● 150 tDZ CS↑ to DOUT in Hi-Z tCKH CS↑ Before CLK↑ tCSLO CS Low Time tCSHI CS High Time See Test Circuits See Test Circuits See Test Circuits fCLK = 2MHz (Note 4) VCLK = 0V The ● denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. 2 MHz ns ● 400 ns ● 400 ns ● 4550 400 ns ns ● 400 ns Note 2: Timing for all input signals is measured at 0.8V for a High-to-Low transition and at 2V for a Low-to-High transition. Note 3: Timing specifications are guaranteed by design but not tested. Note 4: This is the minimum time required for valid data transfer. U W TYPICAL PERFORMANCE CHARACTERISTICS DNL vs Code 0.6 0.6 0.4 0.2 0.2 INL (LSB) 0.4 0 – 0.2 0 –0.2 – 0.4 –0.4 – 0.6 –0.6 – 0.8 –0.8 – 1.0 2.0 VCC = 3.3V V(IOUT) = 2.5V TA = 25°C 0.8 ∆FULL-SCALE OUTPUT CURRENT (LSB) VCC = 3.3V V(IOUT) = 2.5V TA = 25°C 0.8 DNL (LSB) Supply Voltage Rejection INL vs Code 1.0 1.0 –1.0 0 32 64 96 128 160 192 224 256 CODE 1428-50 G01 0 32 64 96 128 160 192 224 256 CODE 1428-50 G02 V(IOUT) = 2.5V TA = 25°C 1.5 1.0 0.5 0 – 0.5 – 1.0 – 1.5 – 2.0 1 2 3 5 4 SUPPLY VOLTAGE (V) 6 7 1428-50 G03 3 LTC1428-50 U W TYPICAL PERFORMANCE CHARACTERISTICS ∆FULL-SCALE OUTPUT CURRENT (LSB) VCC = 3.3V V(IOUT) = 2.5V 51.5 50.5 49.5 48.5 47.5 – 55 Zero-Scale IOUT vs Temperature 0 0.05 –2 0.04 –4 0.03 –6 0.02 –8 –10 0.01 VCC = 3.3V TA = 25°C –12 – 25 35 65 95 5 TEMPERATURE (°C) 125 155 20 0.06 0 0 2 4 6 8 10 12 IOUT BIAS VOLTAGE (V) 1428-50 G04 14 16 1428-50 G05 ZERO-SCALE OUTPUT CURRENT (LSB) FULL-SCALE OUTPUT CURRENT (µA) Bias Voltage Rejection 2 VCC = 3.3V 18 ZERO-SCALE CURRENT (nA) Temperature Variation 52.5 16 14 12 V(IOUT) = 10V 10 8 6 V(IOUT) = 5V 4 2 V(IOUT) = 2.5V 0 0 10 40 30 20 50 TEMPERATURE (°C) 60 70 1428-50 G06 U U U PIN FUNCTIONS IOUT (Pin 1): DAC Current Sink Output. In 3.3V or 5V systems, the DAC IOUT pin can be biased from 2V to 10V. puts the chip into pulse mode. If CS ever goes low, the chip is configured into 3-wire mode until VCC is reset. VCC (Pin 2): Voltage Supply (3V ≤ VCC ≤ 6.5V). This supply must be kept free from noise and ripple by bypassing directly to a ground plane. GND (Pin 6): Ground. Ground should be tied directly to a ground plane. SHDN (Pin 3): Shutdown. A logic low puts the chip into shutdown mode. The digital setting for the DAC is retained. CLK (Pin 4): Shift Clock. This clock synchronizes the serial data and has a Schmitt trigger input. CS (Pin 5): Chip Select Input. In 3-wire mode, a logic low enables the LTC1428-50. Upon power-up, a logic high 4 DIN (UP/DN)(Pin 7): Data Input. In 3-wire mode, the DAC data is shifted into DIN. In pulse mode, upon power-up a logic high puts the counter into increment-only mode. If DIN ever goes low, the counter is configured in increment/ decrement mode until VCC is reset. DOUT (Pin 8): Data Output. In 3-wire mode, on every conversion DOUT serially outputs the previous 8-bit DAC data. In pulse mode, DOUT is three-stated. LTC1428-50 W BLOCK DIAGRA LATCH AND LOGIC POWER-ON RESET VOLTAGE REFERENCE SHDN UP ONLY/ UP/DN LATCH AND LOGIC SHDN 8-BIT CURRENT DAC MODE SELECT 0 = PULSE 1 = SPI IOUT 8 CLK CLK 8-BIT REGISTER/COUNTER UP/DN DIN CONTROL LOGIC CS 8 SHDN 8 CLK 9-BIT SHIFT REGISTER DOUT Q9 DOUT (LSB) 1428-50 BD TEST CIRCUITS Load Circuit for t DO Load Circuit for tDZ, t DV 1.4V 5V t DZ WAVEFORM 2, t DV 3k 3k DOUT DOUT t DZ WAVEFORM 1 100pF 100pF 1428-50 TC02 1428-50 TC01 Voltage Waveforms for t DZ, tDV Voltage Waveforms for t DO CLK CS 0.8V 2.0V 0.8V t DO DOUT 2.4V 0.4V 1428-50 TC03 DOUT WAVEFORM 1 (SEE NOTE 1) DOUT WAVEFORM 2 (SEE NOTE 2) 90% 2.4V t DZ t DV 0.4V 10% 1428-50 TC04 NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT THE OUTPUT IS HIGH UNLESS DISABLED BY CS NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT THE OUTPUT IS LOW UNLESS DISABLED BY CS 5 LTC1428-50 U U SERIAL I/O OPERATI G SEQUE CE tCSLO tCSHI CS tCKS tCKHI tCSH CLK tCSS DIN tDS D6 D7 D5 D4 D3 D2 DOUT D1 D0 tDO tDV Hi-Z tCKH tCKLO tDH D7′ D6′ D5′ D4′ D3′ tDZ D2′ D1′ D0′ D7 Hi-Z 1428-50 F01 Figure 1. 3-Wire Interface Timing Specification U U W U APPLICATIONS INFORMATION 8-BIT CURRENT OUTPUT DAC The LTC1428-50 is an 8-bit, current sink output digital-toanalog (DAC) converter. The LTC1428-50 is guaranteed monotonic and is digitally adjustable in 256 equal steps. Upon power up, the counter resets to 1000000B and the DAC output assumes midrange. The IOUT pin can be biased from 2V to 10V. The LTC1428-50 features a full-scale output current of 50µA ±3% at room temperature (±5% over temperature). This device also includes a flexible serial digital interface that allows easy interconnection to a variety of digital systems. DIGITAL INTERFACE Automatic Mode Selection The LTC1428-50 includes a serial interface capable of communicating with the host system using one of three protocols; standard 3-wire mode, a 2-wire up/down pulse mode and a 1-wire increment-only pulse mode. The LTC1428-50 is designed to autoconfigure itself depending on the method POWER-UP CS GOES LOW CS STAYS HIGH 3-WIRE MODE PULSE MODE DIN (UP/DN) GOES LOW DIN STAYS HIGH INCREMENT/ DECREMENT INCREMENTONLY Figure 2. LTC1428-50 Operating Modes 6 1428-50 F02 of data presentation. A diagram illustrating this autodetection behavior is shown in Figure 2. At power-up, the interface is set to 1-wire pulse mode. If the CS line ever goes low (as it will at the beginning of a valid 3-wire serial transfer) the chip immediately reconfigures itself into 3-wire mode and remains in this mode until power is cycled. If CS stays high, the device stays in pulse mode and monitors the UP/DN pin to determine whether to switch to 2-wire mode. If UP/DN ever goes low (as it will the first time a “down” command is given) the chip switches into 2-wire pulse mode and remains in this mode until power is cycled. In a properly configured 1-wire system, CS and UP/DN will always remain high. 2-wire pulse mode systems must provide a single logic low pulse before the first data pulses are sent to prevent the LTC1428-50 from remaining in 1-wire mode if the first several pulses are logic high. Standard 3-Wire Mode (Figure 3) Refer to the Serial Interface Operating Sequence in Figure 1. When operating in 3-wire mode, the LTC1428-50 will interface directly with most standard 3- or 4-wire serial interface systems. The clock (CLK) input synchronizes the data transfer with each input bit captured at the rising edge of CLK and each output data bit shifted through DOUT at the falling edge. Data is shifted into and out of the LTC142850 starting with the MSB bit. A falling edge at CS initiates the data transfer and brings the DOUT pin out of three-state. The serial 8-bit data representing the new DAC setting is shifted into the DIN pin. Simultaneously, the previous DAC setting is shifted out of the DOUT pin. After the new data is LTC1428-50 U U W U APPLICATIONS INFORMATION DAC output by one step. The last two LSBs are always zero in pulse mode. shifted in, a rising edge at CS transfers the data from the input shift register into the DAC register. The DAC output assumes the new value and the DOUT pin returns to a highimpedance state. IOUT = (B7 B6 B5 B4 B3 B2 0 0)IFULLSCALE/255 To configure the LTC1428-50 in 1-wire pulse mode, tie both the CS and DIN pins to VCC. IOUT = (B7 B6 B5 B4 B3 B2 B1 B0)IFULLSCALE/255 1 IOUT 2 VCC IOUT DOUT VCC DIN 8 2-Wire Interface (Pulse Mode, Figure 5) 7 In 2-wire pulse mode, a logic high at UP/DN programs the DAC register to increment and each rising edge at CLK increments the upper six bits of the register by one count. Similarly, a logic low at UP/DN programs the DAC register to decrement and a rising edge at CLK decrements the upper six bits of the register by one count. Each count in 2-wire mode changes the DAC output by a single 4LSB step. The DAC register stops incrementing at 11111100B and stops decrementing at 00000000B and will not roll over in 2-wire pulse mode. The last two LSBs are always zero in pulse mode. LTC1428-50 0.1µF 3 SHDN 4 CLK SHDN GND CLK CS 6 5 CS DIN DOUT 1428-50 F03 DIN AND DOUT CAN BE TIED TOGETHER FOR HALF-DUPLEX DATA TRANSFER Figure 3. 3-Wire Mode; Serial Interface (3-Wire Control by CS, CLK and DIN) 1-Wire Interface (Pulse Mode, Figure 4) In 1-wire pulse mode, each rising edge at CLK increments the upper six bits of the DAC register by one count. When incremented beyond 11111100B, the counter rolls over and sets the DAC to the minimum value (00000000B). In this way, a single pulse applied to CLK increases the DAC output by a single 4LSB step and 63 pulses decrease the IOUT 1 2 VCC IOUT DOUT VCC DIN IOUT = (B7 B6 B5 B4 B3 B2 0 0)IFULLSCALE/255 To configure the LTC1428-50 in 2-wire pulse mode, tie CS to VCC and bring the UP/DN pin low at least once during power-up. IOUT 8 DOUT 2 VCC 7 SHDN CLK 3 4 SHDN CLK GND CS IOUT DOUT VCC DIN SHDN 6 CLK 5 3 4 SHDN CLK UP/DN 1428-50 F04 Figure 4. Pulse Mode: Increment Only (1-Wire Control by CLK) 8 DOUT 7 LTC1428-50 0.1µF LTC1428-50 0.1µF 1 GND CS 6 5 1428-50 F05 Figure 5. Pulse Mode; Increment/Decrement (2-Wire Control by CLK and UP/DN) U TYPICAL APPLICATION Pulse Mode: Increment-Only (1-Wire Control by CLK) with Voltage Output VOUT 6 VDD 7 VCC – RFB 100k LT1006 + 4 VEE VOUT = (IOUT)(RFB) + VBIAS VDD ≥ VOUT + 1V, 2V ≤ VBIAS ≤ 10V 1 2 2 VBIAS IOUT DOUT VCC DIN 8 DOUT 7 LTC1428-50 3 SHDN CLK 3 4 SHDN CLK GND CS 6 5 1428-50 TA02 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7 LTC1428-50 U TYPICAL APPLICATION Digitally Adjustable 3A Lithium-Ion Battery Charger R7 500Ω D1 MBR340 GND CLP SW CLN VCC 0.47µF BOOST LT1511 COMP1 L1** 10µH D2 1N4148 200pF DIN RS4† ADAPTER CURRENT SENSE C1 1µF + + CIN* 10µF 10µF UV SPIN RS3 200Ω 1% RPROG 4.93k 1% 300Ω VC BAT CPROG 1µF 1k 0.33µF RS2 200Ω 1% RS1 0.033Ω BATTERY CURRENT SENSE R3 332k 1% BATTERY VOLTAGE SENSE + VBAT 7.5V ≤ VBAT ≤ 24V IN STEPS OF 65mV + + COUT 22µF TANT 1 R4 162k 1% 50pF 3.3V 2 IOUT DOUT VCC DIN 8 7 LTC1428-50 3 NOTE: COMPLETE LITHIUM-ION CHARGER, NO TERMINATION REQUIRED. RS4, R7 AND C1 ARE OPTIONAL FOR IIN LIMITING *TOKIN 25V CERAMIC SURFACE MOUNT **10µH COILTRONICS CTX10-4 † CONSULT LT1511 DATA SHEET FOR R5 VALUE U PACKAGE DESCRIPTIO TO MAIN SYSTEM POWER R5† UNDERVOLTAGE LOCKOUT R6 5k PROG OVP SENSE VIN (ADAPTER INPUT) 11V TO 25V 4 SHDN CLK MPU (e.g., 8051) 6 GND 5 CS P1.2 P1.1 P1.0 1428-50 TA03 Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 8 7 6 5 0°– 8° TYP 0.016 – 0.050 0.406 – 1.270 0.014 – 0.019 (0.355 – 0.483) 0.050 (1.270) TYP 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE SO8 0996 1 2 3 4 RELATED PARTS PART NUMBER DESCRIPTION LTC1329 8-Bit Current Output D/A Converter Current Source Output, Full-Scale Current 10µA or 50µA LTC1451 12-Bit Micropower Serial Input VOUT DAC Higher Resolution, 8-Pin SO LTC1452 12-Bit Multiplying Serial Input VOUT DAC Higher Resolution, 8-Pin SO LTC8043 12-Bit Multiplying Serial Input IOUT DAC Higher Resolution, 8-Pin SO 8 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 ● (408) 432-1900 FAX: (408) 434-0507● TELEX: 499-3977 ● www.linear-tech.com COMMENTS 1428f LT/TP 0198 4K • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 1998