December 1996 NDH8502P Dual P-Channel Enhancement Mode Field Effect Transistor General Description Features SuperSOTTM-8 P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package. -2.2 A, -30 V. RDS(ON) = 0.11 Ω @ VGS = -10 V RDS(ON) = 0.18 Ω @ VGS = -4.5 V. Proprietary SuperSOTTM-8 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. ___________________________________________________________________________________________ 5 4 6 3 7 2 8 1 Absolute Maximum Ratings T A = 25°C unless otherwise noted Symbol Parameter NDH8502P Units VDSS Drain-Source Voltage -30 V VGSS Gate-Source Voltage ±20 V ID Drain Current - Continuous -2.2 A (Note 1) - Pulsed PD Maximum Power Dissipation TJ,TSTG Operating and Storage Temperature Range -10 (Note 1) 0.8 W -55 to 150 °C THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1) 156 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W © 1997 Fairchild Semiconductor Corporation NDH8502P Rev.C ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min -30 Typ Max Units -1 µA OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA IDSS Zero Gate Voltage Drain Current VDS = -24 V, VGS = 0 V V -10 µA IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V -100 nA V TJ= 55°C ON CHARACTERISTICS (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = - 250 µA TJ= 125°C RDS(ON) Static Drain-Source On-Resistance -1 -1.5 -3 -0.8 -1.2 -2.2 VGS = -10 V, ID = -2.2 A TJ= 125°C VGS = -4.5 V, ID = -1.7 A ID(on) On-State Drain Current gFS Forward Transconductance VGS = -10 V, VDS = -5 V -10 VGS = -4.5 V, VDS = -5 V -4 0.1 0.11 0.14 0.2 0.17 0.18 Ω A VDS = -10 V, ID = -2.2 A 3.8 S VDS = -15 V, VGS = 0 V, f = 1.0 MHz 340 pF 218 pF 100 pF DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time tr Turn - On Rise Time 8 15 ns 18 35 ns tD(off) tf Turn - Off Delay Time 28 50 ns Turn - Off Fall Time 20 35 ns Qg Total Gate Charge Qgs Gate-Source Charge 10.9 14.5 nC Qgd Gate-Drain Charge VDD = -10 V, ID = -1 A, VGS = -10 V, RGEN = 6 Ω VDS = -15 V, ID = -2.2 A, VGS = -10 V 1.4 nC 3.6 nC NDH8502P Rev.C ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units -0.67 A -1.2 V DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.67 A (Note 2) -0.76 Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. PD( t) = T J−TA R θJA(t ) = T J−TA R θJC+RθCA( t ) = I 2D (t ) × RDS(ON ) TJ Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: 156oC/W when mounted on a 0.0025 in2 pad of 2oz copper. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. NDH8502P Rev.C Typical Electrical Characteristics 3 -10 -6.0 -5.0 R DS(on), NORMALIZED -4.5 -8 -4.0 -6 -3.5 -4 -3.0 I D -2 DRAIN-SOURCE ON-RESISTANCE , DRAIN-SOURCE CURRENT (A) VGS = -10V 0 -1 -2 V DS -3 -4 -5.0 -5.5 -6.0 -10 1 0 I -4 -6 , DRAIN CURRENT (A) -8 -10 RDS(on) , NORMALIZED V GS = -10V 1 0.8 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 DRAIN-SOURCE ON-RESISTANCE 1.8 1.2 0.6 -50 D Figure 2. On-Resistance Variation with Gate Voltage and Drain Current. I D = -2.2A 1.4 -2 , DRAIN-SOURCE VOLTAGE (V) 1.6 R DS(ON), NORMALIZED -4.5 1.5 -5 Figure 1. On-Region Characteristics. DRAIN-SOURCE ON-RESISTANCE -4.0 2 0.5 0 V GS = -10V TJ = 125°C 1.5 1.2 25°C 0.9 -55°C 0.6 0.3 150 0 -2 -4 -6 -8 -10 I D , DRAIN CURRENT (A) Figure 4. On-Resistance Variation with Drain Current and Temperature. Figure 3. On-Resistance Variation with Temperature. -10 1.2 T J = -55°C V GS(th), NORMALIZED -8 25°C 125°C -6 -4 -2 GATE-SOURCE THRESHOLD VOLTAGE V DS = -10V I D , DRAIN CURRENT (A) VGS = -3.5V 2.5 V DS = V 1 0.9 0.8 0.7 -50 0 -1 -2 V GS -3 -4 -5 , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. -6 GS I D = -250µA 1.1 -25 0 25 50 75 100 T , JUNCTION TEMPERATURE (°C) 125 150 J Figure 6. Gate Threshold Variation with Temperature. NDH8502P Rev.C Typical Electrical Characteristics 10 5 I D = -250µA 1.06 -I , REVERSE DRAIN CURRENT (A) 1.04 1.02 1 0.98 0.96 0.94 -50 1 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 0 .0 0 0 1 0 0 .2 -V SD 0 .4 0.6 0 .8 1 , BODY DIODE FORWARD VOLTAGE (V) 1 .2 Figure 8. Body Diode Forward Voltage Variation with Current and Temperature. 10 V I D = -2.2A 400 -V GS, GATE-SOURCE VOLTAGE (V) 600 CAPACITANCE (pF) -55°C 0 .0 0 1 800 Ciss Coss 200 Crss f = 1 MHz V GS = 0 V 0 .2 -V 0 .5 1 2 5 10 , DRAIN TO SOURCE VOLTAGE (V) DS 20 -20V 6 4 2 0 2 4 Q 6 g 8 10 12 , GATE CHARGE (nC) Figure 10. Gate Charge Characteristics. ton t d(on) RL t off tr t d(off) tf 90% 90% V OUT D R GEN -10V -15V 8 -VDD V IN D S= 0 30 Figure 9. Capacitance Characteristics. VGS 25°C 0 .0 1 1000 50 0 .1 T J = 125°C 0 .1 Figure 7. Breakdown Voltage Variation with Temperature. 100 VGS = 0V S BV DSS , NORMALIZED DRAIN-SOURCE BREAKDOWN VOLTAGE 1.08 VOUT 10% DUT G 10% 90% S V IN 50% 50% 10% PULSE WIDTH Figure 11. Switching Test Circuit. INVERTED Figure 12. Switching Waveforms. NDH8502P Rev.C 20 12 V DS = - 5V 10 25°C 8 125°C 6 4 5 2 -5 -10 -15 -20 (O N) LIM IT 1 0.1 0.05 0.01 0.1 0 S RD 0.5 2 0 100 us 1m s 10m s 10 0m s 1s 10s DC 10 TJ = -55°C -I D , DRAIN CURRENT (A) g FS, TRANSCONDUCTANCE (SIEMENS) Typical Electrical and Thermal Characteristics VGS = -4.5V SINGLE PULSE RθJA = See Note 1c A T = 25°C A 0.2 0.5 1 2 5 10 20 30 50 - VDS , DRAIN-SOURCE VOLTAGE (V) I D , DRAIN CURRENT (A) Figure 13. Transconductance Variation with Drain Current and Temperature. Figure 14. Maximum Safe Operating Area. TRANSIENT THERMAL RESISTANCE r(t), NORMALIZED EFFECTIVE 1 D = 0.5 R 0.2 0.1 0.1 0.05 (t) = r(t) * R JA θJA θ R JA = See Notes 1 θ P(pk) 0.02 0.01 t1 0.01 TJ - T = P * R JA (t) θ Duty Cycle, D = t1 / t2 Single Pulse 0.001 0.0001 t2 0.001 0.01 0.1 1 A 10 100 300 1 t , TIME (sec) Figure 15. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1. Transient thermal response will change depending on the circuit board design. NDH8502P Rev.C NDH8502P Rev.C