SDFS011A − MARCH 1987 − REVISED OCTOBER 1993 SN54F573 . . . J PACKAGE SN74F573 . . . DW OR N PACKAGE (TOP VIEW) Eight Latches in a Single Package 3-State Bus-Driving True Outputs Full Parallel Access for Loading Buffered Control Inputs Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs OE 1D 2D 3D 4D 5D 6D 7D 8D GND description These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q LE 2D 1D OE VCC SN54F573 . . . FK PACKAGE (TOP VIEW) The eight latches of the ′F573 are transparent D-type latches. While the latch enable (LE) input is high, the Q outputs follow the data (D) inputs. When the latch enable is taken low, the Q outputs are latched at the logic levels set up at the D inputs. 3D 4D 5D 6D 7D 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2Q 3Q 4Q 5Q 6Q 8D GND LE 8Q 7Q A buffered output enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a highimpedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. 1Q • • • • • The output enable (OE) input does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54F573 is characterized for operation over the full military temperature range of −55°C to 125°C. The SN74F573 is characterized for operation from 0°C to 70°C. FUNCTION TABLE (each latch) INPUTS OE LE D OUTPUT Q L H H H L H L L L L X Q0 H X X Z Copyright 1993, Texas Instruments Incorporated ! " #$%! " &$'(#! )!%* )$#!" # ! "&%##!" &% !+% !%" %," "!$%!" "!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)% !%"!/ (( &%!%"* • DALLAS, TEXAS 75265 • HOUSTON, TEXAS 77251−1443 POST OFFICE BOX 655303 POST OFFICE BOX 1443 2−1 SDFS011A − MARCH 1987 − REVISED OCTOBER 1993 logic symbol† OE LE 1D 2D 3D 4D 5D 6D 7D 8D 1 11 2 logic diagram (positive logic) EN OE C1 19 1D 3 18 4 17 5 16 6 15 7 14 8 13 9 12 LE 1 11 1Q C1 2Q 1D 3Q 2 19 1Q 1D 4Q 5Q 6Q 7Q To Seven Other Channels 8Q † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1.2 V to 7 V Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 mA to 5 mA Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC Current into any output in the low state: SN54F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA SN74F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA Operating free-air temperature range: SN54F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C SN74F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed. recommended operating conditions SN54F573 SN74F573 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IIK Low-level input voltage 0.8 0.8 V Input clamp current −18 −18 mA IOH IOL High-level output current −3 −3 mA Low-level output current 20 24 mA TA Operating free-air temperature 70 °C 2−2 High-level input voltage 2 −55 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 2 125 0 V V SDFS011A − MARCH 1987 − REVISED OCTOBER 1993 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH SN54F573 TYP† MAX TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V VCC = 4.75 V, MIN II = − 18 mA IOH = − 1 mA −1.2 IOH = − 3 mA IOH = − 1 mA to − 3 mA VOL VCC = 4.5 V IOL = 20 mA IOL = 24 mA IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.5 V II IIH VCC = 5.5 V, VCC = 5.5 V, IIL IOS‡ VCC = 5.5 V, VCC = 5.5 V, SN74F573 TYP† MAX MIN −1.2 2.5 3.4 2.5 3.4 2.4 3.3 2.4 3.3 UNIT V V 2.7 0.3 0.5 0.35 0.5 V 50 50 µA −50 −50 µA VI = 7 V VI = 2.7 V 0.1 0.1 mA 20 20 µA VI = 0.5 V VO = 0 − 0.6 − 0.6 mA −150 mA 55 mA −60 −150 −60 ICCZ VCC = 5.5 V, See Note 2 38 55 38 † All typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. NOTE 2: ICCZ is measured with OE at 4.5 V and all other inputs grounded. timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) VCC = 5 V, TA = 25°C SN54F573 SN74F573 MIN MIN UNIT ′F573 MIN MAX MAX MAX tw Pulse duration, LE high 6 6 6 ns tsu Setup time, data before LE↓ 2 2 2 ns th Hold time, data after LE↓ 3 3 3 ns switching characteristics (see Note 3) PARAMETER FROM (INPUT) VCC = 5 V, CL = 50 pF, RL = 500 Ω, TA = 25°C TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX§ ′F573 tPLH tPHL D Q tPLH tPHL LE Q tPZH tPZL OE Q tPHZ tPLZ OE Q SN54F573 UNIT SN74F573 MIN TYP MAX MIN MAX MIN MAX 2 4.9 7 1.5 9 2.2 8 1.2 3.3 5 1 8 1.2 6 4.2 8.6 11.5 3.7 13.5 4.2 13 2.2 4.8 7 1.5 9 2.2 8 1.2 4.6 11 1 13 1.2 12 1.2 5.2 7.5 1 10 1.2 8.5 1.2 4.1 6.5 1 8.5 1.2 7.5 1.2 3.4 6 1 7 1.2 6 ns ns ns ns § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 3: Load circuits and waveforms are shown in Section 1. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 2−3 SDFS011A − MARCH 1987 − REVISED OCTOBER 1993 2−4 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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