19-1573; Rev 0; 10/99 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller Features ♦ +3.0V to +3.6V Single-Supply Operation ♦ Provides 5.0V Regulated Output at 11mA in 3V Systems ♦ 6-Bit DAC with Up/Down Interface for LCD Contrast Adjustment ♦ Selectable Positive or Negative LCD Bias ♦ Meets EIA-232E Specifications at 250kbps— Guaranteed ♦ 1µA Shutdown Mode ♦ Uses Small 0.22µF Capacitors—No Inductors Required ♦ Temperature Sensor for LCD Contrast Compensation ♦ Simple, Flexible Design Procedure for a Broad Range of LCD Displays Ordering Information PART MAX3325CAI TEMP. RANGE 28 SSOP MAX3325CNI 0°C to +70°C 28 Narrow Plastic DIP MAX3325EAI -40°C to +85°C 28 SSOP MAX3325ENI -40°C to +85°C 28 Narrow Plastic DIP Pin Configuration Applications PDAs and Palmtop Computers PIN-PACKAGE 0°C to +70°C TOP VIEW Handy Terminals GPS Receivers Hand-Held Medical Equipment Industrial Test Equipment C2+ 1 28 C1+ C2- 2 27 V+ V- 3 26 VDD R2IN 4 25 GND R1IN 5 R1OUT 6 24 C1- MAX3325 23 REG R2OUT 7 22 T1OUT VL 8 21 T2OUT LCD 9 20 T1IN TEMP 10 19 T2IN REF- 11 18 SD232 FB 12 17 SDLCD REF+ 13 16 DOWN DAC 14 15 UP Typical Operating Circuit appears at end of data sheet. SSOP/DIP ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. MAX3325 General Description The MAX3325 integrates a two-transmitter, two-receiver RS-232 transceiver with an LCD supply plus temperature-compensated contrast control. It is intended for small 3V instruments requiring a 5V supply for either logic or an LCD display, an adjustable bias signal for contrast, LCD temperature compensation, and an RS-232 interface for serial communications. The 5V supply is a regulated charge pump followed by a low-dropout (LDO) linear regulator capable of supplying 11mA for the 5V LCD power. The MAX3325 has an internal 6-bit digital-to-analog converter (DAC) providing 64 contrast levels, plus an internal temperature sensor that compensates the LCD’s contrast for changes in ambient temperature. The LCD contrast can be designed for any voltage range from -5V to +2V. The MAX3325’s 250kbps RS-232 transceiver meets all EIA-232E specifications with input voltages from +3.0V to +3.6V. Both the RS-232 section and the LCD supply circuitry can be independently placed in shutdown, tailoring power consumption for battery-powered equipment. The MAX3325 is available in 28-pin SSOP and narrow DIP packages. MAX3325 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller ABSOLUTE MAXIMUM RATINGS VDD, VL to GND ........................................................-0.3V to +6V LCD, REF-, TEMP to GND .............................-6V to (VDD + 0.3V) V+ to GND (Note 1) ..................................................-0.3V to +7V V- to GND (Note 1) ...................................................+0.3V to -7V V+ to |V-| (Note 1) ................................................................+13V REF+, FB, R_OUT to GND ............................-0.3V to (VL + 0.3V) Input Voltages T_OUT, SDLCD, SD232, UP, DOWN to GND.......-0.3V to +6V R_IN to GND ....................................................................±25V Output Voltages T_OUT to GND.................................................................±13V R_OUT to GND..........................................-0.3V to (VL + 0.3V) REG to GND .........................................................-0.3V to +6V Short-Circuit Duration (T_OUT, REF+, REF-) .............Continuous Continuous Output Current REG.................................................................................75mA LCD .................................................................................40mA Continuous Power Dissipation 28-Pin SSOP (derate 9.52mW/°C above +70°C) .........762mW 28-Pin NDIP (derate 14.3mW/°C above +70°C) ........1143mW Operating Temperature Range MAX3325C_I .......................................................0°C to +70°C MAX3325E_I ....................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10sec) .............................+300°C Note 1: V+ and V- can have maximum magnitudes of +7V, but their absolute difference cannot exceed 13V. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +3.0V to +3.6V, VL = +3.3V, circuit and components of Figure 1, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS DC CHARACTERISTICS VDD Supply Current No load, VDD = VL = 3.3V, TA = +25°C 2 4 mA VL Supply Current No load, VDD = VL = 3.3V, TA = +25°C 0.5 10 µA VDD Shutdown Supply Current SD232, SDLCD = GND; all input pins = GND or VDD; VDD = VL = 3.3V; TA = +25°C 0.5 10 µA DIGITAL-TO-ANALOG CONVERTER Resolution Guaranteed monotonic Full-Scale Voltage No load 1.13 1.2 6 1.27 Bits V Zero-Scale Voltage No load -15 0 10 mV Output Impedance 0 < VDAC < VREF+, IDAC ≤ 10µA 35 50 65 kΩ TEMPERATURE SENSOR TEMP Output TA = +25°C -3.2 V TEMP Voltage Temperature Coefficient ITEMP < 22µA -18 mV/°C POSITIVE LINEAR REGULATOR REG Output Voltage Line Regulation 1 transmitter loaded with 5kΩ, TA = +25°C VCC ≥ 3.15V, IREG = 0 to 11mA 4.7 5 5.3 V VCC ≥ 3.0V, IREG = 0 to 7mA 5 3V < VDD < 3.6V 6 Short-Circuit Current 50 50 mV mA NEGATIVE LINEAR REGULATOR—LCD BIAS Feedback Regulation Point Input Leakage Current (Note 2) VFB = 0, CMOS input LCD Load Regulation (Note 3) VLCD = -4.0V, load = 0 to -3mA 2 -20 0 20 -10 0 10 20 _______________________________________________________________________________________ mV nA mV 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller (VDD = +3.0V to +3.6V, VL = +3.3V, circuit and components of Figure 1, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25°C.) PARAMETER CONDITIONS LCD Line Regulation 3V < VDD < 3.6V, VLCD = -4.0V LCD Adjustment Range Load = -3mA MIN TYP MAX 10 -5 UNITS mV +2 V POSITIVE REFERENCE VOLTAGE Output Voltage RREF+ = 10kΩ Load Regulation Load = 12µA to 62µA (sourcing current) 1.16 Short-Circuit Current 1.21 1.26 V 4 mV 5 mA NEGATIVE REFERENCE VOLTAGE Output Voltage No load Load Regulation Load = 0 to 50µA (sinking current) -1.14 Short-Circuit Current -1.21 -1.28 V 35 mV 0.125 mA LOGIC INPUTS (SD232, SDLCD, T1IN, T2IN, UP, DOWN) Logic Threshold High 2 V Logic Threshold Low Input Current VIN = GND or VDD -1 0.8 V 1 µA 0.4 V RECEIVER OUTPUTS Output Voltage Low ISINK = 1.6mA Output Voltage High ISOURCE = 1.0mA 0.8 · VL V RECEIVER INPUTS Input Voltage Range -25 Input Threshold Low TA = +25°C, VDD = 3.3V Input Threshold High TA = +25°C, VDD = 3.3V +25 0.6 Input Hysteresis V 2.4 V 7 kΩ 0.3 Input Resistance -15V < VR_IN < +15V, TA = +25°C V 3 5 V TRANSMITTER OUTPUTS Output Voltage Swing All outputs loaded with 3kΩ to ground ±5 ±5.4 V Output Resistance VDD = VL = V+ = V- = 0, VOUT = ±2V 300 10M Ω Short-Circuit Current Output Leakage Current ±35 VDD = 0 or 3V to 3.6V, VOUT = ±12V, transmitters disabled ±60 mA ±25 µA _______________________________________________________________________________________ 3 MAX3325 ELECTRICAL CHARACTERISTICS (continued) TIMING CHARACTERISTICS (VDD = +3.0V to +3.6V, VL = +3.3V, circuit and components of Figure 1, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25°C.) PARAMETER SYMBOL Maximum Data Rate tPHL Receiver Propagation Delay CONDITIONS MIN RL = 3kΩ, CL = 1000pF, one transmitter switching 250 MAX UNITS kbps 300 Receiver input to receiver output, CL = 150pF tPLH TYP ns 300 Receiver Skew | tPLH - tPHL | 300 ns Transmitter Skew | tPLH - tPHL | 200 ns VDD = 3.3V, TA = +25°C, RL = 3kΩ to 7kΩ, CL = 150pF to 1000pF, measured from +3V to -3V or -3V to +3V Transition-Region Slew Rate 6 30 V/µs Note 2: Guaranteed by design and not production tested. Note 3: No load on REG or transmitter outputs. Typical Operating Characteristics (VDD = VL = +3.3V, circuit and components of Figure 1, all transmitters loaded with 3kΩ, TA = +25°C, unless otherwise noted.) TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE 2 1 0 -1 -2 -3 -4 -5 -6 10 8 6 4 MAX3325toc03 50 40 T2 = 250kbps 30 T2 = 120kbps 20 T2 = 20kbps 10 VOUT- 2 FOR DATA RATES UP TO 250kbps 0 0 1000 2000 3000 4000 LOAD CAPACITANCE (pF) 4 12 SLEW RATE (V/µs) T1 TRANSMITTING AT 250kbps T2 TRANSMITTING AT 15.6kbps 3 14 SUPPLY CURRENT (mA) VOUT+ MAX3325toc02 6 5 4 SUPPLY CURRENT vs. LOAD CAPACITANCE (T1 = 20kbps) SLEW RATE vs. LOAD CAPACITANCE MAX3325toc01 TRANSMITTER OUTPUT VOLTAGE (V) MAX3325 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller 5000 0 1000 2000 0 3000 4000 LOAD CAPACITANCE (pF) 5000 0 1000 2000 3000 4000 LOAD CAPACITANCE (pF) _______________________________________________________________________________________ 5000 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller MAX3325 Typical Operating Characteristics (continued) (VDD = VL = +3.3V, circuit and components of Figure 1, all transmitters loaded with 3kΩ and CL, TA = +25°C, unless otherwise noted.) TRANSMITTER OUTPUTS EXITING SHUTDOWN OR POWERING UP MAX3325toc06 MAX3325toc05 SD232 T1IN 5V/div T1IN 5V/div T1OUT/ R1IN 5V/div T1OUT/ R1IN 5V/div R1OUT 5V/div R1OUT 5V/div T2OUT 2V/div 0 T1OUT VCC = 3.3V C1–C4 = 0.1µF 40µs/div CL = 1000pF 4 TEMP OUTPUT VOLTAGE vs. TEMPERATURE TA = +25°C TA = -40°C 5 4 VDD = +3V VREG (V) VDD = +3.3V 3 2 2 1 1 0 TA = +85°C 3 10 20 LOAD CURRENT (mA) 30 40 -2.0 -2.5 -3.0 -3.5 -4.0 -4.5 0 0 -1.5 MAX3325toc09 6 TEMP OUTPUT VOLTAGE (V) VDD = +3.6V MAX3325toc07 6 1µs/div CL = 1000pF VREG vs. LOAD CURRENT AND TEMPERATURE VREG vs. LOAD CURRENT 5 2µs/div MAX3325toc08 CL = 2500pF VREG (V) LOOPBACK WAVEFORMS AT 250kbps LOOPBACK WAVEFORMS AT 120kbps MAX3325toc04 5V/div 0 0 10 20 LOAD CURRENT (mA) 30 40 -40 -20 0 20 40 60 80 100 TEMPERATURE (°C) _______________________________________________________________________________________ 5 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller MAX3325 Pin Description 6 PIN NAME FUNCTION 1 C2+ Positive Terminal of Voltage-Inverting Charge-Pump Capacitor. Connect C2+ to C2- with a 0.22µF capacitor. 2 C2- Negative Terminal of Voltage-Inverting Charge-Pump Capacitor. Connect C2- to C2+ with a 0.22µF capacitor. 3 V- Output of Negative Charge Pump. Bypass V- to GND with a 0.22µF capacitor. 4, 5 R_IN 6, 7 R_OUT RS-232 Receiver Inputs 8 VL 9 LCD Output of Negative Regulator. Connect LCD to FB with a series resistor. Bypass with a 0.47µF capacitor to GND. 10 TEMP Output of Temperature Sensor. Connect TEMP to FB with a series resistor to compensate LCD contrast for changing temperature. Bypass TEMP with a 0.22µF capacitor to GND. 11 REF- Output of Negative Reference, -1.2V. Bypass REF- with a 0.22µF capacitor to GND. 12 FB 13 REF+ Output of Positive Reference, +1.2V. Bypass REF+ with a 0.22µF capacitor to GND. 14 DAC Output of Internal 6-Bit DAC. Connect DAC to FB with a series resistor to adjust LCD voltage. TTL/CMOS Receiver Outputs Supply Input for Receiver Outputs. Connect VL to the system logic supply voltage. Feedback Input for Negative Regulator. Regulates when FB is at zero (0). 15 UP 16 DOWN DAC Adjust Input. A falling edge on UP increments the internal 6-bit DAC counter. DAC Adjust Input. A falling edge on DOWN decrements the internal 6-bit DAC counter. 17 SDLCD Active-Low Shutdown-Control Input for Both Regulators, References, DAC, and Temperature Sensors. Drive SDLCD low to disable all analog circuitry. Drive high to enable the analog circuitry. 18 SD232 Active-Low Shutdown-Control Input for Transmitter Outputs. Drive SD232 low to disable the RS-232 transmitters. Drive high to enable the transmitters. 19, 20 T_IN 21, 22 T_OUT TTL/CMOS Transmitter Inputs 23 REG Output of Positive Regulator. Bypass REG with a 4.7µF capacitor to GND. 24 C1- Negative Terminal of Voltage-Doubling Charge-Pump Capacitor. Connect C1- to C1+ with a 0.22µF capacitor. 25 GND Ground 26 VDD +3.0V to +3.6V Supply Voltage. Bypass VDD with a 0.22µF capacitor to GND. 27 V+ Output of Positive Charge Pump. Bypass V+ to VDD with a 0.22µF capacitor. 28 C1+ RS-232 Transmitter Outputs Positive Terminal of Voltage-Doubling Charge-Pump Capacitor. Connect C1+ to C1- with a 0.22µF capacitor. _______________________________________________________________________________________ 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller MAX3325 V- C4 0.22µF REG MAX3325 4.7µF LCD DISPLAY V+ C3 0.22µF LCD VDD 0.47µF RFB C5 0.22µF FB UP DOWN ROUT DAC 6-BIT DAC 10k SDLCD RREF+8* REF+ 0.22µF C1+ C1 0.22µF C2 0.22µF RREF-* C1C2+ REF0.22µF C2RTEMP GND TEMP 0.22µF SD232 T1IN T1OUT T2IN T2OUT VL 0.22µF CL R1OUT CL R1IN RL R2OUT RL 5k R2IN 5k *RESISTORS RREF+ AND RREF- ARE BOTH SHOWN, BUT ONLY ONE OR THE OTHER IS USED IN APPLICATION. Figure 1. Application Circuit _______________________________________________________________________________________ 7 MAX3325 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller Detailed Description Dual Charge-Pump Voltage Converter The MAX3325’s internal power supply consists of a regulated dual charge pump that provides output voltages of +5.5V (doubling charge pump) and -5.5V (inverting charge pump) over the 3.0V to 3.6V VDD range. The charge pump operates in discontinuous mode; if the output voltages are less than 5.5V, the charge pump is enabled; if the output voltages exceed 5.5V, the charge pump is disabled. Each charge pump requires a flying capacitor (C1, C2) and a reservoir capacitor (C3, C4) to generate the V+ and V- supplies (Figure 1). RS-232 Transmitters The transmitters are inverting level translators that convert logic levels to ±5.0V EIA/TIA-232 levels. The MAX3325 transmitters guarantee a 250kbps data rate with worst-case loads of 3kΩ in parallel with 1000pF, providing compatibility with PC-to-PC communication software (such as LapLink™). The MAX3325’s transmitters are disabled and the outputs are forced into a high-impedance state when the RS-232 circuitry is in shutdown (SD232 = low). The MAX3325 permits the outputs to be driven up to ±13V in shutdown. The transmitter inputs do not have pull-up resistors. Connect unused inputs to GND or VDD. RS-232 Receivers The receivers convert RS-232 signals to logic output levels. The VL pin controls the logic output high voltage. The receiver outputs are always active, regardless of the shutdown state. Positive Voltage Regulator The MAX3325 has a regulated +5V output suitable for powering +5V LCD modules or other circuits. The output of the boost charge pump is regulated with an LDO linear regulator. The REG output sources up to 11mA of current to external circuitry. Adjustable LCD Supply The LCD output provides a flexible output voltage to adjust the contrast of LCD modules. The output voltage range is determined by the external circuitry connected to LCD, FB, DAC, REF+ (or REF-, depending on contrast polarity). Additionally, the TEMP output can be used to automatically compensate the contrast adjustment for temperature variance. The LCD output is a linear regulator powered by the negative charge pump. It is capable of sinking up to 3mA of current. Although the LCD regulator can be adjusted to positive voltages, it is not capable of sourcing current. A minimum output current of 100µA is required. 6-Bit DAC The MAX3325’s DAC output is an unbuffered inverted R2R structure with an output voltage range of 0 to +1.2V. The DAC output impedance is typically 50kΩ, and can be connected through a series resistor to the FB input of the LCD regulator. An internal power-on reset circuit sets the DAC to midscale on power-up. DAC Control Inputs The DAC code is controlled by UP and DOWN to adjust the contrast of the LCD module. These inputs are intended to interface to digital signals, but do not include debounce circuitry. See the Applications section. See Table 1 for the truth table. Temperature Compensation The MAX3325’s TEMP output is used to minimize deviation in LCD contrast level due to temperature changes. The TEMP output is capable of sinking or sourcing up to 22µA to the external resistor network. Shutdown Mode Supply current falls below 1µA in shutdown mode (SDLCD = SD232 = low). When shut down, the device’s charge pumps are shut off, V+ is pulled down to VDD, V- is pulled to ground, and the transmitter outputs are disabled (high impedance). The LCD section is also powered down. The REG, LCD, and both reference outputs become high impedance. The time required to exit shutdown is typically 100µs, as shown in the Typical Operating Characteristics. However, the TEMP output requires 50ms to fully stabilize. Connect SDLCD and SD232 to VDD if the shutdown mode is not used. See Table 2. Table 1. DAC Truth Table UP 0 1 ↓ DOWN 0 ↓ 1 FUNCTION DAC set to midscale DAC register decrements 1 count DAC register increments 1 count Table 2. Shutdown Truth Table SDLCD 0 SD232 0 1 X X 1 FUNCTION Low-power shutdown mode LCD bias and REG outputs enabled RS-232 transmitters enabled X = Don’t care LapLink is a trademark of Traveling Software. 8 _______________________________________________________________________________________ 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller Capacitor Selection The capacitor type used for C1–C4 is not critical for proper operation; polarized or nonpolarized capacitors can be used. Ceramic chip capacitors with an X7R dielectric provide the best combination of performance, cost, and size. The charge pump requires 0.22µF capacitors for 3.3V operation. Do not use values smaller than those listed in Figure 1. Increasing the capacitor values (e.g., by a factor of 2) reduces ripple on the transmitter outputs, slightly reduces power consumption, and increases the available output current from VREG and VLCD. C2, C3, and C4 can be increased without changing C1’s value. However, do not increase C1 without also increasing the values of C2, C3, C4, and C5 to maintain the proper ratios. When using the minimum required capacitor values, make sure the capacitor value does not degrade excessively with temperature or voltage. This is typical of Y5V and Z5U dielectric ceramic capacitors. If in doubt, use capacitors with a larger nominal value, or specify X7R dielectric. The capacitor’s equivalent series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V-. Power-Supply Decoupling In most circumstances, a 0.22µF VDD bypass capacitor (C5) is adequate. Choosing larger values for C5 increases performance and decreases the induced ripple on the VDD supply line. Note that capacitor C2, connected to V+, is returned to C5. This connection also improves the performance of the MAX3325. Locate all bypass capacitors as close as possible to the IC. Keep metal traces as wide as possible. Return all capacitor ground connections directly to a solid-copper ground plane. Transmitter Outputs when Exiting Shutdown The Typical Operating Characteristics show the MAX3325 transmitter outputs when exiting shutdown mode. As they become active, the two transmitter outputs are shown going to opposite RS-232 levels (one transmitter input is high, the other is low). Each transmitter is loaded with 3kΩ in parallel with 2500pF. The transmitter outputs display no ringing or undesirable transients as they come out of shutdown. Note that the transmitters are enabled only when the magnitude of Vexceeds approximately -3V. High Data Rates The MAX3325 maintains the RS-232 ±5.0V minimum transmitter output voltage even at high data rates. Figure 1 shows a transmitter loopback test circuit. The Typical Operating Characteristics show loopback test results at 120kbps and 250kbps. For 120kbps, all transmitters were driven simultaneously at 120kbps into RS232 loads in parallel with 1000pF. For 250kbps, a single transmitter was driven at 250kbps, and all transmitters were loaded with an RS-232 receiver in parallel with 1000pF. Interconnection with Lower Logic Voltages The MAX3325 provides a separate supply for the logic interface to optimize input and output levels. Connect VL to the system’s logic supply voltage, and bypass it with a 0.1µF capacitor to GND. If the logic supply is the same as VDD, connect VL to VDD. The VL pin can be operated from +1.8V to +5.0V to accommodate various logic levels. Setting VLCD Output Voltage The LCD output can be configured in a variety of ways to suit the requirements of the LCD display. First, determine the nominal voltage range that the LCD will require for adequate contrast adjustment. If the display requires temperature compensation for contrast, include the TEMP output in all calculations. The output voltage is defined by: code ⋅ V DAC + VREF+ + RREF+ R + RDAC VLCD = -RFB O -3.3V - VTEMP ⋅ (T - 25°C) VREF+ RTEMP RREF ( ) where code is the current digital code in the DAC, and RO is the nominal DAC output impedance (50kΩ). The other terms in the equation are due to external resistances connected to the indicated pins. A spreadsheet program is an excellent tool for helping to select components and evaluate their effect on the output voltage range. Although the above equation has terms for both REF+ and REF- offset resistors, only one or the other is used. Design Example The first step in designing for a particular display is to obtain the manufacturer’s device specifications for the nominal values as well as the temperature characteristics. For example, consider the Optrex DMC series of dot matrix LCD modules. The manufacturer specifies a nominal contrast bias voltage of 6V at +25°C, where bias voltage is VREG - VLCD. The temperature coefficient needed _______________________________________________________________________________________ 9 MAX3325 Applications Information to maintain the nominal contrast is -16mV/°C. In this case, data for a spread of nominal bias voltages is not available, so a range of ±1V is chosen by experimentation. Feedback Resistor (RFB) The first step in designing the MAX3325 LCD bias is to select a feedback resistor. This can be arbitrary, but values between 220kΩ to 1MΩ are a good starting point. We will choose 330kΩ. If the design can’t reach its target range in later calculations, the feedback resistor can be adjusted accordingly. DAC Output Resistor (ROUT) Given the above criterion of a ±1V output range, the DAC’s output should be multiplied by the ratio of the desired output swing (±1V) divided by the available output from the DAC (0 to 1.2V). Assuming that we’ve used a 330kΩ feedback resistor, this corresponds to a total DAC resistance of 200kΩ. Because the DAC has an intrinsic output impedance of 50kΩ, set ROUT to 200kΩ - 50kΩ = 150kΩ. Temperature Compensation Resistor (RTEMP) Next, the temperature compensation resistor is selected. Because the MAX3325 regulates FB to virtual ground, adding or removing the remaining resistors in this design does not affect the transfer function set in the previous section. The TEMP output has a temperature coefficient of -17.5mV per °C, and the LCD’s is -16mV/°C. To scale these two values, multiply the feedback resistor (330kΩ) by the ratio of the TEMP coefficient divided by the display’s coefficient. For this example, the result is 360kΩ. Interfacing to the UP and DOWN Inputs The UP and DOWN inputs to the MAX3325 are edgetriggered digital inputs. For proper operation, the signals must be standard logic signals. Mechanical switch outputs, (toggle or membrane types) are unsuitable and require proper debouncing before connecting to the MAX3325. The best solution is to use the MAX6817 dual switch debouncer. This sends the correct signal levels to the UP and DOWN inputs, and provides a robust interface to the switch inputs. The UP and DOWN inputs can be driven directly from a microprocessor. System Considerations Because the MAX3325 is the temperature transducer for the LCD bias compensation, optimal performance is obtained by placing the IC as close as possible to the LCD. 9 CONTRAST VOLTAGE (VREG - VLCD) MAX3325 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller DAC CODE = 63 7 DAC CODE = 32 5 3 DAC CODE = 0 ACTUAL DISPLAY MAX3325 LCD BIAS CIRCUITRY -40 Reference Resistance (RREF_) To complete the design, the DC output is biased to the final desired value at DAC midscale. Because the previous steps concentrated on the transfer function only, we now have a large offset of +1.94V. This is calculated from the entire equation, where the reference resistors are assumed to be infinite, the DAC voltage is +0.6V, and VTEMP is -3.2V. Connecting a 130kΩ resistor from REF+ to FB forces VLCD to -1.1V, resulting in a nominal contrast voltage (VREG - VLCD) of +6.1V. This is close to the target value of +6V. -20 0 20 40 80 Figure 2. Design Example for Optrex DMC Display Chip Information TRANSISTOR COUNT: 1957 Actual Performance The graph in Figure 2 shows the actual LCD display’s data curve, along with the MAX3325’s performance with various DAC codes. Note that changing the DAC code does not affect the slope of the temperature compensation. If a wider scale of contrast adjustments is desired, change the DAC output resistor, and readjust the offset voltage. 10 60 TEMPERATURE (°C) ______________________________________________________________________________________ 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller V0.22µF C2+ 0.22µF MAX3325 LCD DISPLAY MODULE C2C1+ POS REG 0.22µF C1- REG VCC 4.7µF V+ NEG REG 0.22µF 3V INPUT 5V AT 15mA OUTPUT LCD BIAS (0 TO -5V) LCD VEE 0.47µF VDD GND FB VSS UP DOWN DAC 6-BIT DAC 10k SDLCD REF+ -1 0.33µF REF0.33µF T TEMP 0.22µF SD232 T1IN TTL/CMOS INPUTS T1OUT RS-232 OUTPUTS T2IN T2OUT VL R1OUT R1IN TTL/CMOS OUTPUTS RS-232 INPUTS R2OUT R2IN ______________________________________________________________________________________ 11 MAX3325 Typical Operating Circuit 3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller SSOP.EPS MAX3325 Package Information Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.