19-1085; Rev 1; 10/96 Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface ____________________________Features The MAX1601/MAX1604 DC power-switching ICs contain a network of low-resistance MOSFET switches that deliver selectable VCC and VPP voltages to two CardBus or PC Card host sockets. Key features include ultra-low-resistance switches, small packaging, softswitching action, and compliance with PCMCIA specifications for 3V/5V switching. 3.3V-only power switching for fast, 32-bit CardBus applications is supported in two ways: stiff, low-resistance 3.3V switches allow high 3.3V load currents (up to 1A); and completely independent internal charge pumps let the 3.3V switch operate normally, even if the +5V and +12V supplies are disconnected or turned off to conserve power. The internal charge pumps are regulating types that draw reduced input current when the VCC switches are static. Also, power consumption is automatically reduced to 10µA max when the switches are programmed to high-Z or GND states over the serial interface, unlike other solutions that may require a separate shutdown-control input. ♦ Supports Two CardBus Sockets ♦ 1A, 0.08Ω Max VY VCC Switch (MAX1601 only) 1A, 0.14Ω Max VX VCC Switch ♦ Soft Switching for Low Inrush Surge Current ♦ Overcurrent Protection ♦ Overcurrent/Thermal-Fault Flag Output ♦ Thermal Shutdown at Tj = +150°C ♦ Independent Internal Charge Pumps ♦ Break-Before-Make Switching Action ♦ 10µA Max Standby Supply Current ♦ 5V and 12V Not Required for Low-RDS(ON) 3.3V Switching ♦ Complies with PCMCIA 3V/5V Switching Specifications ♦ Super-Small, 28-Pin SSOP Package (0.2in. or 5mm wide) ♦ System Management Bus (SMBus) Serial Interface Other key features include guaranteed specifications for output current limit level, and guaranteed specifications for output rise/fall times (in compliance with PCMCIA specifications). Reliability is enhanced by thermal-overload protection, accurate current limiting, an overcurrent-fault flag output, undervoltage lockout, and extra ESD protection at the VCC/VPP outputs. The SMBus serial interface is flexible, and can tolerate logic input levels in excess of the positive supply rail. The MAX1604 and MAX1601 are identical, except for the MAX1604’s VY switch, which has roughly threetimes the on-resistance (typically 140m Ω).The MAX1601/MAX1604 fit two complete CardBus/PCMCIA switches into a space-saving, narrow (0.2in. or 5mm wide) SSOP package. ________________________Applications Desktop Computers Data Loggers Notebook Computers Digital Cameras Docking Stations Printers Handy-Terminals PCMCIA Read/Write Drives _______________Ordering Information TEMP. RANGE PIN-PACKAGE MAX1601EAI PART -40°C to +85°C 28 SSOP MAX1604EAI -40°C to +85°C 28 SSOP __________Simplified Block Diagram VPPA 12IN VY VY VCCA VX VCCA VX VCCA VL MAX1601/MAX1604 VDD SMBCLK SMBDATA SMBSUS GND DECODE LOGIC ADDRESS SELECT OVERCURRENT AND THERMAL SHUTDOWN SMBALERT ADR VPPB 12IN Pin Configuration appears on last page. VY VCCB VCCB VX VCCB SMBus is a trademark of Intel Corp. ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 MAX1601/MAX1604 ________________General Description MAX1601/MAX1604 Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface ABSOLUTE MAXIMUM RATINGS Inputs/Outputs to GND (VL, VX, VY, VCCA, VCCB) (Note 1)........................-0.3V, +6V VPP Inputs/Outputs to GND (12INA, 12INB, VPPA, VPPB) (Note 1) ..................-0.3V, +15V Inputs and Outputs to GND (SMBCLK, SMBDATA, SMBSUS, SMBALERT) (Note 1) ..............................-0.3V, +6V ADR Input to GND ...........................................-0.3V, (VL + 0.3V) VCCA, VCCB Output Current (Note 2).....................................4A VPPA, VPPB Output Current (Note 2) ...............................250mA VCCA, VCCB Short Circuit to GND ............................Continuous VPPA, VPPB Short Circuit to GND..............................Continuous Continuous Power Dissipation (TA = +70°C) SSOP (derate 9.52mW/°C above +70°C) ....................762mW Operating Temperature Range MAX1601EAI/MAX1604EAI .............................-40°C to +85°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10sec) .............................+300°C Note 1: There are no parasitic diodes between any of these pins, so there are no power-up sequencing restrictions (for example, logic input signals can be applied even if all of the supply voltage inputs are grounded). Note 2: VCC and VPP outputs are internally current-limited to safe values. See the Electrical Characteristics table. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VL = VY = 3.3V, VX = 5V, 12INA = 12INB = 12V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX 5.5 13 2.8 UNITS POWER-SUPPLY SECTION Input Voltage Range Undervoltage Lockout Threshold VX, VY or VL 12INA, 12INB VL falling edge 3.0 11 2.4 2.5 12IN falling edge 1.8 3.0 12IN rising edge 5 8 10 1.4 2.5 2.8 VX, VY falling edge Standby Supply Current VX or VY, all switches 0V or high-Z, control inputs = 0V or VL, TA = +25°C VY Quiescent Supply Current Any combination of VY switches on, control inputs = 0V or VL, no VCC loads VX Quiescent Supply Current Any combination of VX switches on, control inputs = 0V or high-Z, no VCC loads 12IN_ Standby Supply Current 12INA tied to 12INB, all switches 0V or high-Z, control inputs = 0V or VL, TA = +25°C 12IN_ Quiescent Supply Current 12INA tied to 12INB, VPPA and VPPB 12V switches on, control inputs = 0V or VL, no VPP loads VL Standby Supply Current V V 1 µA 20 100 µA 20 100 µA 1 µA 15 100 µA All switches 0V or high-Z, control inputs = 0V or VL, TA = +25°C 4 10 µA VL Quiescent Supply Current Any combination of switches on 25 VL Fall Rate When using VL as shutdown pin (Note 3) 150 µA 0.05 V/µs 1 A VCC SWITCHES Operating Output Current Range VCCA or VCCB, VX = VY = 3V to 5.5V On-Resistance, VY Switches 12INA = 12INB = 0V to 13V, VY = 3V, VX = 0V to 5.5V, ISWITCH = 1A, TA = +25°C On-Resistance, VX Switches 2 0 MAX1601 0.06 0.08 MAX1604 0.14 0.24 0.10 0.14 12INA = 12INB = 0V to 13V, VX = 4.5V, VY = 0V to 5.5V, ISWITCH = 1A, TA = +25°C _______________________________________________________________________________________ Ω Ω Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface MAX1601/MAX1604 ELECTRICAL CHARACTERISTICS (continued) (VL = VY = 3.3V, VX = 5V, 12INA = 12INB = 12V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP Output Current Limit VCCA or VCCB 1.2 Output Sink Current VCCA or VCCB < 0.4V, programmed to 0V state 20 Output Leakage Current VCCA or VCCB forced to 0V, high-Z state, TA = +25°C Output Propagation Delay Plus Rise Time VCCA or VCCB, 0V to VX or VY, CL = 30µF, RL = 25Ω, 50% of input to 90% of output, TA = +25°C Output Rise Time VCCA or VCCB, 0V to VX or VY, CL = 1µF, RL = open circuit, 10% to 90% points, TA = +25°C 4.0 Output Propagation Delay Plus Fall Time VCCA or VCCB, VX or VY to 0V, CL = 30µF, RL = open circuit, 50% of input to 10% of output, TA = +25°C 60 Output Fall Time VCCA or VCCB, VX or VY to 0V, CL = 1µF, RL = 25Ω, 90% to 10% points 6 UNITS A mA 2 100 MAX 10 µA 10 ms 1200 µs 100 ms ms VPP SWITCHES Operating Output Current Range VPPA or VPPB On-Resistance, 12V Switches 12IN = 11.6V, ISWITCH = 100mA, TA = +25°C 0 On-Resistance, VPP = VCC Switches Programmed to VX (5V) or VY (3.3V), TA = +25°C Output Current Limit VPPA or VPPB, programmed to 12V 130 Output Sink Current VPPA or VPPB < 0.4V, programmed to 0V state 10 Output Leakage Current VPPA or VPPB forced to 0V, high-Z state, TA = +25°C Output Propagation Delay Plus Rise Time VPPA or VPPB, 0V to 12IN_, CL = 0.1µF, 50% of input to 90% of output, TA = +25°C Output Rise Time VPPA or VPPB, 0V to 12IN_, CL = 0.1µF, 10% to 90% points, TA = +25°C Output Propagation Delay Plus Fall Time VPPA or VPPB, 12IN_ to 0V, CL = 0.1µF, 50% of input to 10% of output, TA = +25°C 9 Output Fall Time VPPA or VPPB, 12IN_ to 0V, CL = 0.1µF, 90% to 10% points 1 ms SMBALERT Signal Propagation Delay VCC_ or VPP_, load step to SMBALERT output, 50% point to 50% point (Note 3) 3 µs SMBALERT Output Low Voltage ISINK = 1mA, low state SMBALERT Output Leakage Current V SMBALERT = 5.5V, high state Thermal Shutdown Threshold Hysteresis = +20°C (Note 4) Logic Input Low Voltage SMBSUS, SMBCLK, SMBDATA Logic Input High Voltage SMBSUS, SMBCLK, SMBDATA Logic Output Low Voltage SMBDATA, ISINK = 4mA 0.70 mA 1 Ω 1 3 Ω 200 260 mA mA 1.2 100 120 10 µA 30 ms µs 800 60 ms INTERFACE AND LOGIC SECTION -0.1 0.4 V 0.1 µA 150 °C 0.8 2.2 V V 0.4 V _______________________________________________________________________________________ 3 MAX1601/MAX1604 Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface ELECTRICAL CHARACTERISTICS (continued) (VL = VY = 3.3V, VX = 5V, 12INA = 12INB = 12V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS 100 kHz SMB Input Capacitance SMBSUS, SMBCLK, SMBDATA SMBCLK Clock Frequency SMBus spec = 10kHz min DC SMBCLK Clock Low Time tLOW 10% to 10% points 4.7 µs SMBCLK Clock High Time tHIGH 90% to 90% points 4 µs SMB Repeated Start-Condition Setup Time tSU:STA 90% to 90% points 250 ns SMB Start-Condition Hold Time tHD:STA 10% of SMBDATA to 90% of SMBCLK 4 µs SMB Stop-Condition Setup Time tSU:STO 90% of SMBCLK to 10% of SMBDATA 4 µs SMB Data Valid to SMBCLK RisingEdge Time tSU:DAT 10% or 90% of SMBDATA to 10% of SMBCLK 500 ns SMB Data Hold Time tHD:DAT (Note 5) 0 ns Bus Free Time tBUF between start and stop conditions 4.7 µs 5 ADR Input Low Voltage ADR Input High Voltage Logic Input Bias Current 0.6 V 1 µA 1000 ns 1.5 ADR, SMBSUS, SMBCLK, SMBDATA V -1 SCL Fall to SDA Valid (Master Clocking-In Data) Start-Condition Setup pF 100 4.7 µs Note 3: Not production tested. Note 4: Thermal limit not active in standby state (all switches programmed to GND or high-Z state). Note 5: A transition must internally provide at least a hold time in order to bridge the undefined region (300ns max) of the falling edge of SMBCLK. 4 _______________________________________________________________________________________ Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface MAX1601/MAX1604 ELECTRICAL CHARACTERISTICS (VL = VY = 3.3V, VX = 5V, 12INA = 12INB = 12V, TA = -40°C to +85°C, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS POWER-SUPPLY SECTION Input Voltage Range Undervoltage Lockout Threshold VX, VY or VL 12INA, 12INB VL falling edge, hysteresis = 1% 3.0 11 2.3 12IN falling edge 1.8 12IN rising edge 5 10 1.4 2.9 VX, VY falling edge 5.5 13 2.9 V V Standby Supply Current VX or VY, all switches 0V or high-Z, control inputs = 0V or VL 15 µA VY Quiescent Supply Current Any combination of VY switches on, control inputs = 0V or VL, no VCC loads 100 µA VX Quiescent Supply Current Any combination of VX switches on, control inputs = 0V or high-Z, no VCC loads 100 µA 12IN_ Standby Supply Current 12INA tied to 12INB, all switches 0V or high-Z, control inputs = 0V or VL 15 µA 12IN_ Quiescent Supply Current 12INA tied to 12INB, VPPA and VPPB 12V switches on, control inputs = 0V or VL, no VPP loads 100 µA VL Standby Supply Current All switches 0V or high-Z, control inputs = 0V or VL 15 µA VL Quiescent Supply Current Any combination of switches on 150 µA V INTERFACE AND LOGIC SECTION SMBALERT Output Low Voltage Logic Input Low Voltage ISINK = 1mA, low state 0.4 SMBCLK, SMBDATA, SMBSUS 0.8 Logic Input High Voltage SMBCLK, SMBDATA, SMBSUS Logic Output Low Voltage SMBDATA, ISINK = 4mA 2.2 0.4 ADR Input Low Voltage ADR Input High Voltage 0.6 1.5 V V V V V _______________________________________________________________________________________ 5 __________________________________________Typical Operating Characteristics (VL = VY = 3.3V, VX = 5V, 12IN, TA = +25°C, unless otherwise noted.) MAX1601/4 TOC-01 4 VCC_ (V) 2 2 1 0 0 CONTROL 5 INPUT 0 (V) CONTROL 5 INPUT 0 (V) 200µs/div CL = 1µF, RL = ∞ CL = 30µF, RL = 25Ω VCC_ SWITCHING (FALL) VCC_ (V) VCC_ SWITCHING (FALL) MAX1601/4 TOC-03 6 4 6 4 VCC_ (V) 2 0 CONTROL 5 INPUT 0 (V) 2 0 CONTROL 5 INPUT 0 (V) CL = 33µF, RL = ∞ 10ms/div 10ms/div CL = 1µF, RL = 25Ω VPP_ SWITCHING (RISE) 15 10 VPP_ (V) VPP_ SWITCHING (FALL) 15 10 VPP_ (V) 5 5 0 0 CONTROL 5 INPUT 0 (V) CONTROL 5 INPUT 0 (V) CL = 0.1µF, RL = ∞ 6 500µs/div 200µs/div MAX1601/4 TOC-06 VCC_ (V) 3 MAX1601/4 TOC-04 6 MAX1601/4 TOC-02 VCC_ SWITCHING (RISE) VCC_ SWITCHING (RISE) MAX1601/4 TOC-05 MAX1601/MAX1604 Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface CL = 0.1µF, RL = ∞ 2ms/div _______________________________________________________________________________________ Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface (VL = VY = 3.3V, VX = 5V, 12IN, TA = +25°C, unless otherwise noted.) MAX1601/4 TOC-08 4 2.0 1.5 IVY (A) 2 VCC_ (V) MAX1601/4 TOC-09 INPUT CURRENT (VCC OUTPUT SHORTED) VCC_ CURRENT LIMITING 1.0 0.5 0 0 1ms/div 2ms/div CL = 1µF, RESISTIVE OVERLOAD, RL = 1Ω VPP_ CURRENT LIMITING MAX1601/4 TOC-11 MAX1601/4 TOC-10 10 10 5 VPP_ (V) 5 0 0 300 I12IN_ (mA) 200 100 0 2ms/div 100µs/div CL = 1µF, RL = 50Ω RL = 0.1Ω VCC_ SHUTDOWN RESPONSE MAX1601/4 TOC-12 VPP_ (V) INPUT CURRENT (VPP OUTPUT SHORTED) 4 VL (V) 2 0 4 VCC_ (V) 2 0 100µs/div CIRCUIT OF FIGURE 2 _______________________________________________________________________________________ 7 MAX1601/MAX1604 _____________________________Typical Operating Characteristics (continued) _____________________________Typical Operating Characteristics (continued) (VL = VY = 3.3V, VX = 5V, 12IN, TA = +25°C, unless otherwise noted.) MAX1601 VY ON-RESISTANCE vs. CURRENT TA = +85°C 100 80 75 70 160 90 85 TA = +25°C 80 150 60 55 TA = +25°C 50 145 140 45 70 40 65 35 120 30 115 TA = -40°C 400 600 800 200 0 1000 400 600 1000 VPPA 600 800 1000 850 12IN RON (mΩ) 710 705 VPPB 700 400 CURRENT (mA) 900 715 800 750 700 695 650 690 600 685 550 20 40 60 80 100 -40 120 140 -20 VX, VY SUPPLY CURRENT vs. INPUT VOLTAGE 20 0.7 VY 0.5 0.4 0.3 0.2 6 5 4 3 2 0 INPUT VOLTAGE (V) 6 100 70 VX = VY = 0V 12IN 60 50 NORMAL OPERATION 40 30 20 SHUTDOWN 0 0 5 80 10 1 0.1 4 60 VL SUPPLY CURRENT vs. VL INPUT VOLTAGE MAX1601/4 TOC-18 VX 7 12IN SUPPLY CURRENT (µA) MAX1601/4 TOC-17 0.8 3 40 12IN SUPPLY CURRENT vs. INPUT VOLTAGE 0.9 0.6 0 TEMPERATURE (°C) CURRENT (mA) MAX1601/4 TOC-19 0 2 200 950 MAX1601/4 TOC-15 720 1 0 12IN_ ON-RESISTANCE vs. TEMPERATURE 12IN_ ON-RESISTANCE vs. CURRENT 725 0 TA = -40°C CURRENT (mA) VCC_ LOAD CURRENT (mA) 12IN RON (mΩ) 800 125 MAX1601/4 TOC-16 200 130 TA = -40°C VL SUPPLY CURRENT (µA) 0 TA = +25°C 135 75 60 TA = +85°C 155 VY RON (mΩ) VY RON (mΩ) VX RON (mΩ) TA = +85°C 65 95 8 165 MAX1601/4 TOC-14 105 MAX1601/4 TOC-13 110 MAX1604 VY ON-RESISTANCE vs. CURRENT MAX1600/3 TOC-20 VX ON-RESISTANCE vs. VCC_ LOAD CURRENT VX, VY SUPPLY CURRENT (µA) MAX1601/MAX1604 Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface 0 2 4 6 8 INPUT VOLTAGE (V) 10 12 0 1 2 3 4 INPUT VOLTAGE (V) _______________________________________________________________________________________ 5 6 Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface PIN NAME 1, 25 GND Ground 2, 3, 26, 27 N.C. No internal connection 4 12INA +12V Supply Voltage Input, internally connects to channel A VPP switch. Tie to VPPA if not used. 5 VPPA Channel A VPP Output 6, 8, 10 VX 7, 22, 24 VCCA Channel A VCC Outputs 9, 18, 20 VCCB Channel B VCC Outputs 11 VPPB Channel B VPP Output 12 12INB +12V Supply Voltage Input, internally connects to channel B VPP switch. Tie to VPPB if not used. 13 ADR 14 SMBSUS SMBus Suspend-Mode Control Input. The device will execute commands previously stored in the normal-mode register if SMBSUS is high, or will execute commands previously stored in the suspend-mode register if SMBSUS is low. 15 SMBCLK SMBus Clock Input 16 SMBDATA SMBus Data Input/Output, open drain 17 SMBALERT Fault-Detection Interrupt Output. SMBALERT goes low if either channel VCC or VPP switch is current limiting or undervoltage lockout, or if the thermal protection circuit is activated. SMBALERT is an open-drain output that requires an external pull-up resistor. 19, 21, 23 VY VY Supply-Voltage Inputs. VY pins must be connected together. Input range is 3V to 5.5V. VY is normally connected to 3V. VL Logic Supply-Voltage Inputs. Connect to the +3.3V or +5V host system supply. VL can be supplied via the output of a CMOS-logic gate to produce an overriding shutdown. When used as a shutdown input, VL should have a 1kΩ series resistor with a 0.1µF capacitor to ground (Figure 2). Note that VL must be greater than undervoltage lockout for any switches to be turned on. 28 FUNCTION VX Supply-Voltage Inputs. VX pins must be connected together. Input range is 3V to 5.5V. VX is normally connected to 5V. Address Input, sets SMBus address location. See Table 1 for address selection. _______________________________________________________________________________________ 9 MAX1601/MAX1604 ______________________________________________________________Pin Description MAX1601/MAX1604 Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface 1/2 MAX1601/MAX1604 VB12 12IN VPPA CHARGE PUMP 3Ω CURRENT LIMIT 40Ω VB3 VY 0.08Ω* VY VCCA CURRENT LIMIT CHARGE PUMP VCCA VCCA VX VB5 0.14Ω 20Ω VX CHARGE PUMP CURRENT LIMIT SMBALERT SMBCLK SHDN SMBDATA SMBSUS SMB GND THERMAL SHUTDOWN ADR VDD VL *0.24Ω FOR THE MAX1604 Figure 1. Functional Diagram (one channel of two) 10 ______________________________________________________________________________________ Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface The MAX1601/MAX1604 power-switching ICs contain a network of low-resistance MOSFET switches that deliver selectable VCC and VPP voltages to two Cardbus or PC Card host sockets. The MAX1601/MAX1604 differ only in the VY switch on-resistance. Figure 1 is the detailed block diagram. The power-input pins (VY, VX, 12IN_) are completely independent. Low inrush current is guaranteed by controlled switch rise times. VCC’s 100µs minimum output rise time is 100% tested with a 1µF capacitive load, and VPP’s 1ms minimum rise time is guaranteed with a 0.1µF load. These respective capacitive loads are chosen as worst-case card-insertion parameters. The internal switching control allows VCC and VPP rise times to be controlled, and makes them nearly independent of resistive and capacitive loads (see rise-time photos in the Typical Operating Characteristics). Fall times are a function of loading, and are compensated by internal circuitry. Power savings is automatic: internal charge pumps draw very low current when the VCC switches are static. Standby mode reduces switch supply current to 1µA. Driving the VL pin low with an external logic gate (master shutdown) reduces total supply current to1µA (Figure 2). Operating Modes The MAX1601/MAX1604 have three operating modes: normal, standby, and shutdown. Normal mode supplies the selected outputs with their appropriate supply voltages. Standby mode places all switches at ground, high impedance, or a combination of the two. Shutdown mode turns all switches off, and puts the VCC and VPP outputs into a high-impedance state. Pull VL low to enter shutdown mode. To ensure a 0.05V/µs fall rate on VL, use a 1kΩ series resistor and a 0.1µF capacitor to ground (Figure 2). Overcurrent Protection Peak detecting circuitry protects both the VCC and VPP switches against overcurrent conditions. When current through any switch exceeds the internal current limit (4A for VCC switches and 200mA for VPP switches), the switch turns off briefly, then turns on again at the controlled rise rate. If the overcurrent condition lasts more than 2µs, the SMBALERT output latches 3.3V VY 1k MASTER SHUTDOWN VL 74HC04 VPPA VCCA TO SOCKETS A AND B MAX1601 MAX1604 0.1µF VPPB VCCB Figure 2. Master Shutdown Circuit low. A continuous short-circuit condition results in a pulsed output current until thermal shutdown is reached. SMBALERT is open-drain and requires an external pull-up resistor. Thermal Shutdown If the IC junction temperature rises above +150°C, the thermal shutdown circuitry opens all switches, including the GND switches, and SMBALERT is pulled low. When the temperature falls below +130°C, the switches turn on again at the controlled rise rate. If the overcurrent condition remains, the part cycles between thermal shutdown and overcurrent. Undervoltage Lockout If the VX or VY switch input voltage drops below 1.5V, the associated switch turns off and SMBALERT goes low. For example, if VY is 3.3V and VX is 0V, and if the interface controller selects VY, the VCCA output will be 3.3V. If VX is selected, VCCA changes to a high-impedance output and SMBALERT goes low. When a voltage is initially applied to 12IN_, it must be greater than 8V to allow the switch to operate. Operation continues until the voltage falls below 2V (the VPP output is high impedance). When VL drops to less than 2.3V, all switches are turned off and the VCC and VPP outputs are high impedance. ______________________________________________________________________________________ 11 MAX1601/MAX1604 _______________Detailed Description MAX1601/MAX1604 Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface ______SMBus™ Interface Operation The SMBus serial interface is a two-wire interface with multi-mastering capability, intended to control lowspeed peripheral devices in low-power portable equipment applications. SMBus is similar to I 2 C™ and AccessBus, but has slightly different logic threshold voltage levels, different fixed addresses, and a suspend-mode register capability. To obtain a complete set of specifications on the SMBus interface, call Intel at (800) 253-3696 and ask for product code SBS5220. SMBus Addressing These dual-channel PC Card switch devices respond to two of four different addresses, depending on the state of the ADR address pin. Normal writing to the device is done by transmitting one of four addresses, followed by a single data byte, to program the channel selected. Write transmissions to the interrupt pointer address are not supported by these devices. Reading from the device is done by transmitting one of two addresses cor- responding to either the A channel address (which will provide data about faults for both A and B channels) or to the interrupt pointer address (discussed later). The normal start condition consists of a high-to-low transition on SMBDATA while SMBCLK is high. The 7-bit address is followed by a bit that designates a read or write operation: high = read, low = write. If the 7-bit address matches one of the supported function addresses, the IC issues an acknowledge pulse by pulling the SMBDATA line low. If the address is not valid, the IC stays off of the bus and ignores any data on the bus until a new start condition is detected. Once the IC receives a valid address that includes a write bit, it expects to receive one additional byte of data. If a stop condition or new start condition is detected before a complete byte of data is clocked in, the IC interprets this as an error and all of the data is rejected and lost. SMBDATA and SMBCLK are Schmitt triggered and can accommodate slower edges. However, rising edges should still be faster than 1µs, and falling edges should be faster than 300ns. Table 1. SMBus Addressing WRITE FUNCTION SMBus Write Operations SMB ADDRESS ADR PIN 0001100 Don’t care N/A 1010000 Grounded Channel A Channel A/B faults 1010001 Grounded Channel B Channel A/B faults 1010010 Tied to VL Channel A Channel A/B faults 1010011 Tied to VL Channel B Channel A/B faults READ FUNCTION Interrupt Pointer If the IC receives a valid address immediately followed by a write bit, the IC becomes a slave receiver. The slave IC generates a first acknowledge after the address and write bit, and a second acknowledge after the command byte. A stop condition following the command (data) byte causes immediate execution of the command, unless the data included a low SUS/OP bit. If the data included a low SUS/OP bit, the command is stored in the suspend-mode register and is executed only when the SMBSUS pin is pulled low (Figure 3). Table 2. Command Format for Channel A Write Operations (address 1010000 or 1010010) BIT NAME POR STATE FUNCTION 7 (MSB) OP/SUS 0 Operate/suspend bit. Selects which latch receives data: high = operation, low = suspend. 6 VCCAON 0 Turns on VCCA when high, pulls VCCA to GND when low. 5 VCCA3/5 0 If VCCA is on, a high connects VY to VCCA, and a low connects VX to VCCA. 4 VCCAHIZ 0 Puts VCCA in a high-impedance state when high. Overrides VCCAON. 3 VPPAON 0 Turns on VPPA when high, pulls VPPA to GND when low. 2 VPPAPGM 0 If VPPA is on, a high connects VPPA to 12INA, and a low connects VPPA to VCCA. 1 VPPAHIZ 0 Puts VPPA in a high-impedance state when high. Overrides VPPAON. 0 (LSB) MASKFLT 0 Masks fault interrupts from both channel A and channel B when high. I2C is a trademark of Philips Corp. SMBus is a trademark of Intel Corp. 12 ______________________________________________________________________________________ Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface BIT NAME POR STATE FUNCTION 7 (MSB) OP/SUS 0 Operate/suspend bit. Selects which latch receives data: high = operation, low = suspend. 6 VCCBON 0 Turns on VCCB when high, pulls VCCB to GND when low. 5 VCCB3/5 0 If VCCB is on, a high connects VY to VCCB, and a low connects VX to VCCB. 4 VCCBHIZ 0 Puts VCCB in a high-impedance state when high. Overrides VCCBON. 3 VPPBON 0 Turns on VPPB when high, pulls VPPB to GND when low. 2 VPPBPGM 0 If VPPB is on, a high connects VPPB to 12INB, and a low connects VPPB to VCCB. 1 VPPBHIZ 0 Puts VPPB in a high-impedance state when high. Overrides VPPBON. 0 (LSB) RFU 0 Reserved for future use. Table 4. Read Format for Interrupt Pointer Address (0001100) BIT NAME POR STATE 7 (MSB) ADD7 0 6 ADD6 0 5 ADD5 0 4 ADD4 0 3 ADD3 0 2 ADD2 0 1 ADD1 0 0 (LSB) ADD0 0 FUNCTION ADD7 to ADD1 provide a return address for any interrupt query. For these devices, the return addresses are: 1010000 = Channel A, ADD = low 1010001 = Channel B, ADD = low 1010010 = Channel A, ADD = high 1010011 = Channel B, ADD = high Table 5. Read Format for Power Switch Address (1010000 or 1010010) BIT NAME POR STATE LATCHED? 7 (MSB) CATFAULT 0 Y Indicates catastrophic (thermal or undervoltage lockout) fault when high. FUNCTION 6 FAULT1 0 Y Indicates VCCA overcurrent/undervoltage lockout when high. 5 FAULT2 0 Y Indicates VPPA overcurrent/undervoltage lockout when high. 4 FAULT3 0 Y Indicates VCCB overcurrent/undervoltage lockout when high. 3 FAULT4 0 Y Indicates VPPB overcurrent/undervoltage lockout when high. 2 SIG/DUAL 0 N Indicates dual part (single-channel devices would read 1). 1 RFU 0 N Reserved for future use. 0 (LSB) RFU 0 N Reserved for future use. ______________________________________________________________________________________ 13 MAX1601/MAX1604 Table 3. Command Format for Channel B Write Operations (address 1010001 or 1010011) MAX1601/MAX1604 Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface A tLOW B C tHIGH D E F G H I J K L M SMBCLK SMBDATA tSU:STA tHD:STA tSU:DAT A = START CONDITION B = MSB OF ADDRESS CLOCKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = R/W BIT CLOCKED INTO SLAVE E = SLAVE PULLS SMBDATA LINE LOW tHD:DAT F = ACKNOWLEDGE BIT CLOCKED INTO MASTER G = MSB OF DATA CLOCKED INTO SLAVE (OP/SUS BIT) H = LSB OF DATA CLOCKED INTO SLAVE I = SLAVE PULLS SMBDATA LINE LOW tSU:STO tBUF J = ACKNOWLEDGE CLOCKED INTO MASTER K = ACKNOWLEDGE CLOCK PULSE L = STOP CONDITION, DATA EXECUTED BY SLAVE M = NEW START CONDITION Figure 3. SMBus Write Timing Diagram SMBus Read Operations If the IC receives a valid address that includes a read bit, the IC becomes a slave transmitter. After receiving the address data, the IC generates an acknowledge during the acknowledge clock pulse and drives the SMBDATA line in sync with SMBCLK. The SMB protocol requires that the master end the read transmission by not acknowledging during the acknowledge bit of SMBCLK. These PC Card ICs support the repeated start-condition method for changing data-transfer direction; that is, a write transmission followed by a repeated start instead of a stop condition prepares the IC for data reading (Figure 4). SMBus Interrupts These PC Card power-switch ICs are slave devices only, and never initiate communications except by asserting an interrupt (by pulling SMBALERT low). Interrupts are generated only for reporting fault conditions, including overcurrent at VCCA, VCCB, VPPA, or VPPB, undervoltage lockout, and IC thermal overload. If an interrupt occurs, it can be an indication of impending system failure. The host system can react by going into suspend mode or taking other action. It can come back later to interrogate the IC via the interrupt pointer to determine status or perform corrective action (such as disabling the appropriate power switch that might be connected to a shorted PC card). The fas test method for turning off the switches in response to a 14 fault condition is to cycle the voltage on VL in order to generate a power-on reset (which clears all of the SMBus registers). Note that the SMBus registers retain their data even if the main VX/VY supplies are turned off, provided that VL remains powered. When a fault occurs, SMBALERT is immediately asserted and latched low. If the fault is momentary and disappears before the IC is serviced, the data is still latched in the interrupt pointer and SMBALERT remains asserted. Normally, the master (host system or PCMCIA digital controller) now sends out the interrupt pointer address (00011000) followed by a read bit. SMBALERT is cleared and the PC Card IC responds by putting out its address on the bus. If the fault persists, SMBALERT is re-asserted, but the data in the fault registers is not reloaded. The data in the fault latches only reflects the first time SMBALERT is asserted. When the part enters operating mode, a false interrupt flag may be issued. The user needs to send the interrupt address to clear the false interrupt. Normally, the master sends out the appropriate PC Card switch address on the bus, followed by a read bit. The data in the fault registers is then clocked out onto the bus (which also clears the fault registers). If the fault persists, the fault bits and SMBALERT are latched again. ______________________________________________________________________________________ Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface B tLOW C D E F G H J I tHIGH MAX1601/MAX1604 A K SMBCLK SMBDATA tSU:STA tHD:STA tSU:STO tSU:DAT A = START CONDITION B = MSB OF ADDRESS CLOCKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = R/W BIT CLOCKED INTO SLAVE E = SLAVE PULLS SMBDATA LINE LOW F = ACKNOWLEDGE BIT CLOCKED INTO MASTER G = MSB OF DATA CLOCKED INTO MASTER H = LSB OF DATA CLOCKED INTO MASTER tBUF I = ACKNOWLEDGE CLOCK PULSE J = STOP CONDITION K = NEW START CONDITION Figure 4. SMBus Read Timing Diagram The interrupt pointer address provides quick fault identification for simple slave devices that lack the complex, expensive logic needed to be a bus master. The host can read the interrupt pointer to determine which slave device generated an SMBALERT interrupt signal. The interrupt pointer address can activate several different slave devices simultaneously, similar to an I2C general call. Any slave device that generated an interrupt attempts to identify itself by putting its own address on the bus during the first read byte. If more than one slave attempts to respond, bus arbitration rules apply and the device with the lower address code wins. The losing device won’t generate an acknowledge and will continue to hold the SMBALERT line low until serviced, which implies that the host interrupt input must be level sensitive. __________Applications Information Changing SMBCLK and SMBDATA Simultaneously When clocking data into the MAX1601/MAX1604, SMBDATA must not fall before SMBCLK. Otherwise, the MAX1601/MAX1604 may interpret this as a start condition. Even when SMBDATA and SMBCLK fall at the same instant, different fall times for the two signals may cause the erroneous generation of a start condition. To ensure that SMBDATA transitions after the falling edge of SMBCLK, add an RC network to SBMDATA (Figure 6). 1k VL 0.1µF +5V VX Supply Bypassing VY Bypass the VY, VX, and 12IN_ inputs with ceramic 0.1µF capacitors. Bypass the VCC_ and VPP_ outputs with a 0.1µF capacitor for noise reduction and ESD protection. Figure 5. Powering from Either VX or VY Power-Up Apply power to the VL input before any of the switch inputs. If VX, VY, or 12IN receive power before VL rises above 2.8V, the supply current may be artificially high (about 5mA). When the voltage on VL is greater than 2.8V (operating mode), the part consumes its specified 24µA. To avoid power sequencing, diode-OR VX and VY to VL through a 1kΩ resistor (Figure 5). Take care not to allow VL to drop below the 2.8V maximum undervoltage lockout threshold. MAX1601 MAX1604 +5V CIRRUS LOGIC CL-PD6730 10k PULL-UP 1.5k SMBDATA SMBDATA SMBCLK 100pF MAX1601 MAX1604 SMBCLK Figure 6. Application with Cirrus Logic Interface ______________________________________________________________________________________ 15 MAX1601/MAX1604 Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface __________________Pin Configuration ___________________Chip Information TRANSISTOR COUNT: 4372 TOP VIEW GND 1 28 VL N.C. 2 27 N.C. N.C. 3 26 N.C. 12INA 4 25 GND VPPA 5 VX 6 24 VCCA MAX1601 MAX1604 23 VY 22 VCCA VCCA 7 21 VY VX 8 20 VCCB VCCB 9 19 VY VX 10 VPPB 11 18 VCCB 12INB 12 17 SMBALERT 16 SMBDATA ADR 13 SMBSUS 14 15 SMBCLK SSOP ________________________________________________________Package Information DIM α E H C L A A1 B C D E e H L α INCHES MILLIMETERS MIN MAX MIN MAX 0.068 0.078 1.73 1.99 0.002 0.008 0.05 0.21 0.010 0.015 0.25 0.38 0.004 0.008 0.09 0.20 SEE VARIATIONS 0.205 0.209 5.20 5.38 0.0256 BSC 0.65 BSC 0.301 0.311 7.65 7.90 0.025 0.037 0.63 0.95 0˚ 8˚ 0˚ 8˚ DIM PINS e SSOP SHRINK SMALL-OUTLINE PACKAGE A B A1 D D D D D 14 16 20 24 28 INCHES MILLIMETERS MAX MIN MAX MIN 6.33 0.239 0.249 6.07 6.33 0.239 0.249 6.07 7.33 0.278 0.289 7.07 8.33 0.317 0.328 8.07 0.397 0.407 10.07 10.33 21-0056A D Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 16 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 © 1996 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.