NEC BN1L3N Compound transistor Datasheet

DATA SHEET
COMPOUND TRANSISTOR
BN1L3N
on-chip resistor PNP silicon epitaxial transistor
For mid-speed switching
FEATURES
PACKAGE DRAWING (UNIT: mm)
• On-chip bias resistor
(R1 = 4.7 kΩ, R2 = 10 kΩ)
• Complementary transistor with BA1L3N
ABSOLUTE MAXIMUM RATINGS (Ta = 25°°C)
Parameter
Symbol
Ratings
Unit
Collector to base voltage
VCBO
−60
V
Collector to emitter voltage
VCEO
−50
V
Emitter to base voltage
VEBO
−5
V
IC(DC)
−100
mA
Collector current (Pulse)
IC(pulse) *
−200
mA
Total power dissipation
PT
250
mW
Collector current (DC)
Junction temperature
Tj
150
°C
Storage temperature
Tstg
−55 to +150
°C
* PW ≤ 10 ms, duty cycle ≤ 50 %
ELECTRICAL CHARACTERISTICS (Ta = 25°°C)
Parameter
Collector cutoff current
Symbol
ICBO
Conditions
MIN.
TYP.
VCB = −50 V, IE = 0
DC current gain
hFE1 **
VCE = −5.0 V, IC = −5.0 mA
35
60
DC current gain
hFE2 **
VCE = −5.0 V, IC = −50 mA
80
200
MAX.
Unit
−100
nA
100
−
−
VCE(sat) **
IC = −5.0 mA, IB = −0.25 mA
−0.04
−0.2
V
Low level input voltage
VIL **
VCE = −5.0 V, IB = −100 µA
−0.9
−0.6
V
High level input voltage
VIH **
VCE = −0.2 V, IC = −5.0 mA
Collector saturation voltage
−3.0
−1.5
V
Input resistance
R1
3.29
4.7
6.11
kΩ
E-to-B resistance
R2
7
10
13
kΩ
Turn-on time
ton
VCC = −5 V, RL = 1 kΩ
0.2
µs
Storage time
tstg
VI = −5 V, PW = 2 µs
5.0
µs
Turn-off time
toff
duty cycle≤2 %
6.0
µs
** PW ≤ 350 µs, duty cycle ≤ 2 %
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D13588EJ1V0DS00 (1st edition)
Date Published April 2002 N CP(K)
Printed in Japan
©
2002
1998
BN1L3N
TYPICAL CHARACTERISTICS (Ta = 25°°C)
2
Data Sheet D13588EJ1V0DS
BN1L3N
Data Sheet D13588EJ1V0DS
3
BN1L3N
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M8E 00. 4
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