BSC032NE2LS OptiMOSTM Power-MOSFET Product Summary Features • Optimized for high performance Buck converter • Very low on-resistance R DS(on) @ V GS=4.5 V • 100% avalanche tested • Superior thermal resistance VDS 25 V RDS(on),max 3.2 mW ID 84 A QOSS 9.4 nC QG(0V..10V) 16 nC • N-channel • Qualified according to JEDEC1) for target applications PG-TDSON-8 • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21 Type Package Marking BSC032NE2LS PG-TDSON-8 032NE2LS Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value V GS=10 V, T C=25 °C 84 V GS=10 V, T C=100 °C 53 V GS=4.5 V, T C=25 °C 68 V GS=4.5 V, T C=100 °C 43 V GS=10 V, T A=25 °C, R thJA=50 K/W 2) 22 Unit A Pulsed drain current3) I D,pulse T C=25 °C 336 Avalanche current, single pulse4) I AS T C=25 °C 45 Avalanche energy, single pulse E AS I D=20 A, R GS=25 W 20 mJ Gate source voltage V GS ±20 V 1) J-STD20 and JESD22 Rev. 2.2 page 1 2013-04-29 BSC032NE2LS Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Power dissipation P tot Value T C=25 °C 37 T A=25 °C, T j, T stg -55 ... 150 IEC climatic category; DIN IEC 68-1 Parameter W 2.5 R thJA=50 K/W 2) Operating and storage temperature Unit °C 55/150/56 Values Symbol Conditions Unit min. typ. max. - - 3.4 top - - 20 6 cm2 cooling area2) - - 50 Thermal characteristics Thermal resistance, junction - case Device on PCB R thJC R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 25 - - Gate threshold voltage V GS(th) V DS=V GS, I D=250 µA 1.2 - 2 Zero gate voltage drain current I DSS V DS=25 V, V GS=0 V, T j=25 °C - 0.1 10 V DS=25 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=30 A - 3.8 4.8 mW V GS=10 V, I D=30 A - 2.7 3.2 0.5 0.9 1.8 W 46 93 - S Gate resistance RG Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=30 A 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See figure 3 for more detailed information Rev. 2.2 page 2 2013-04-29 BSC032NE2LS Parameter Values Symbol Conditions Unit min. typ. max. - 1200 1596 - 470 625 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 51 - Turn-on delay time t d(on) - 3.3 - Rise time tr - 2.8 - Turn-off delay time t d(off) - 15 - Fall time tf - 2.2 - Gate to source charge Q gs - 3.1 4.1 Gate charge at threshold Q g(th) - 1.9 - Gate to drain charge Q gd - 1.9 2.9 Switching charge Q sw - 3.1 - Gate charge total Qg - 7.7 10 Gate plateau voltage V plateau - 2.7 - Gate charge total Qg V DD=12 V, I D=30 A, V GS=0 to 10 V - 16 21 Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 4.5 V - 6.7 - Output charge Q oss V DD=12 V, V GS=0 V - 9.4 13 - - 37 - - 148 V GS=0 V, V DS=12 V, f =1 MHz V DD=12 V, V GS=10 V, I D=30 A, R G,ext=1.6 W pF ns Gate Charge Characteristics5) V DD=12 V, I D=30 A, V GS=0 to 4.5 V nC V nC Reverse Diode Diode continuous forward current IS A T C=25 °C Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=30 A, T j=25 °C - 0.87 1 V Reverse recovery charge Q rr V R=15 V, I F=I S, di F/dt =400 A/µs - 10 - nC 4) 5) See figure 13 for more detailed information See figure 16 for gate charge parameter definition Rev. 2.2 page 3 2013-04-29 BSC032NE2LS 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 100 40 35 80 30 60 ID [A] Ptot [W] 25 20 40 15 10 20 5 0 0 0 40 80 120 0 160 40 80 TC [°C] 120 160 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 101 limited by on-state resistance 1 µs 10 µs 0.5 102 100 100 µs ZthJC [K/W] ID [A] 0.2 1 ms 101 10 ms DC 0.1 0.05 0.02 10-1 0.01 100 single pulse 10-1 10-2 10-1 100 101 102 VDS [V] Rev. 2.2 10-6 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2013-04-29 BSC032NE2LS 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 350 7 10 V 5V 300 6 3.2 V 4.5 V 250 RDS(on) [mW] ID [A] 200 150 3.5 V 5 4V 3.5 V 4V 4 4.5 V 5V 3 7V 8V 10 V 100 2 3.2 V 3V 50 1 2.8 V 0 0 0 1 2 3 0 10 20 VDS [V] 30 40 50 80 100 ID [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 350 200 300 150 250 gfs [S] ID [A] 200 150 100 100 50 50 150 °C 25 °C 0 0 0 1 2 3 4 5 VGS [V] Rev. 2.2 0 20 40 60 ID [A] page 5 2013-04-29 BSC032NE2LS 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=30 A; V GS=10 V V GS(th)=f(T j); V GS=V DS; I D=250 µA 6 2.5 5 2 4 VGS(th) [V] RDS(on) [mW] 250 µA 1.5 3 typ 1 2 0.5 1 0 0 -60 -20 20 60 100 140 180 -60 -20 20 Tj [°C] 60 100 140 180 Tj [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 1000 Ciss 103 100 150 °C Coss IF [A] C [pF] 25 °C 102 10 Crss 101 1 0 5 10 15 20 25 VDS [V] Rev. 2.2 0.0 0.5 1.0 1.5 VSD [V] page 6 2013-04-29 BSC032NE2LS 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 W V GS=f(Q gate); I D=30 A pulsed parameter: T j(start) parameter: V DD 100 12 10 5V 12 V 20 V 25 °C 10 8 VGS [V] IAV [A] 100 °C 125 °C 1 6 4 2 0.1 0 1 10 100 1000 0 4 tAV [µs] 8 12 16 20 Qgate [nC] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 28 V GS 27 Qg 26 VBR(DSS) [V] 25 24 V gs(th) 23 22 Q g(th) 21 Q sw Q gs 20 -60 -20 20 60 100 140 Q gate Q gd 180 Tj [°C] Rev. 2.2 page 7 2013-04-29 BSC032NE2LS Package Outline PG-TDSON-8 PG-TDSON-8: Outline Rev. 2.2 page 8 2013-04-29 BSC032NE2LS Package Outline PG-TDSON-8: Tape Dimensions in mm Rev. 2.2 page 9 2013-04-29 BSC032NE2LS Published by Infineon Technologies AG 81726 Munich, Germany © 2010 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.2 page 10 2013-04-29