Rohm BU9253FS Karaoke/surround digital echo Datasheet

TECHNICAL NOTE
Audio Accessory ICs
Karaoke/Surround
Digital Echo
BU9253AS/FS, BU9262AFS
●Description
The Karaoke/Surround Digital Echo IC incorporates a digital delay circuit, an input/output mixing circuit, supporting Karaoke
echo and surround system, all in a single chip.
BU9253AS/FS has functions required by Karaoke echo system, and BU9262AFS has various functions required for
surround / echo system.
●Features
<BU9253AS/FS>
1) Digital delay time : 131ms (fCLK = 375kHz)
2) Built-in mixing circuit for adding original sound and echo sound
3) Echo mix ratio settable by DC voltage
4) Built-in amplifier circuit for structuring input/output secondary LPF
5) Microphone mute function (mute of mixing sound of original sound + echo sound)
6) Built-in CR oscillation circuit
<BU9262AFS>
1) Digital delay time : 8-stage setting from 9.2ms to 192ms
2) Built-in input/output mixing circuit
3) Built-in feedback, delay volume circuit
4) Built-in input/output LPF
5) Serial interface
6) Auto mute circuit built in (action at power on, mode switching)
7) Built-in auto reset circuit at power on
●Applications
Radio cassette recorder, mini-component and karaoke systems.
●Product lineup
Parameter
Supply voltage
Oscillation frequency
Current consumption
Operating temperature range
Package
Digital delay
Echo level
BU9253AS
4.0V~5.5V
375kHz
6mA
-10~+70℃
SDIP18
Fixed
Fixed
BU9253FS
4.0V~5.5V
375kHz
6mA
-10~+70℃
SSOP-A16
Fixed
Fixed
BU9262AFS
4.5V~5.5V
2MHz
20mA
-10~+70℃
SSOP-A32
Variable
Variable
Ver.B Oct.2005
●Absolute maximum ratings
<BU9253AS>
Parameter
Symbol
Supply voltage
VCCMAX
Terminal voltage
VIN
Power dissipation
PD
Storage temperature
TSTG
* Reduce by 6.0 mW/°C over 25°C
Ratings
7.0
-0.3 ~ VCC+0.3
600*
-55 ~ +125
Unit
V
V
mW
℃
<BU9253FS>
Parameter
Symbol
Supply voltage
VCCMAX
Terminal voltage
VIN
Power dissipation
PD
Storage temperature
TSTG
* Reduce by 5.0 mW/°C over 25°C
Ratings
7.0
-0.3 ~ VCC+0.3
500*
-55 ~ +125
Unit
V
V
mW
℃
<BU9262AFS>
Parameter
Supply voltage
Terminal voltage
Power dissipation
Storage temperature
Symbol
VCC
VIN
PD
TSTG
Ratings
0.3 ~ 7.0
VSS – 0.3 ~ VCC + 0.3
800*
-55 ~ +125
Unit
V
V
mW
℃
* Reduce by 8.0 mW/°C over 25°C
Note: This IC is not designed to be radiation-resistant.
Note: Operation is not guaranteed.
●Operating conditions
<BU9253AS/FS>
Parameter
Supply voltage
Operating temperature
Operating frequency
Symbol
VCC
Ta
fC
Limits
4.0 ~ 5.5
-10 ~ +70
375
Unit
V
℃
kHz
<BU9262AFS>
Parameter
Operating supply range
Operating temperature
Operating frequency
Symbol
VCC
Ta
fC
Limits
4.5 ~ 5.5
-10 ~ +70
2
Unit
V
℃
MHz
2/16
●Electrical characteristics
<BU9253AS/FS>
(Ta=25℃, VCC=5.0V, fC=375kHz, fin=1kHz, VI=-10dBV, ECHO VR pin=VCC, MUTE pin=VCC, unless otherwise specified.)
Limits
Parameter
Symbol
Unit
Min
Typ
Max
Circuit Current
ICC
-
6
12
mA
Voltage Gain 1
GV1
-5.6
-3.5
-1.4
dB
Voltage Gain 2
GV2
-1
0
-1
dB
Output distortion 1
THD1
-
1.5
3
%
Output distortion 2
THD2
-
0.02
0.1
%
VNO1
-
-80
-60
dBV
VNO2
-
-90
-80
dBV
VOM1
1.4
1.7
-
Vrms
VOM2
1.4
1.7
-
Vrms
VH
3.8
-
5.0
V
VM
1.6
-
2.8
V
VL
0
-
0.7
V
fC
-
375
-
kHz
Output noise
voltage 1
Output noise
voltage 2
Maximum output
voltage 1
Maximum output
voltage 2
MUTE control
voltage
Oscillation
frequency
3/16
Condition
No signal input
Delay side total gain
IN→OUT
Through side total gain
IN→OUT、ECHO VR pin=GND
Delay side
Through side
ECHO VR pin=GND
Delay side
Rg=1kΩ
Through side
Rg=1kΩ、ECHO VR pin=GND
Delay side
THD=10%
Through side
THD=1%、ECHO VR pin=GND
H mode hold voltage
MUTE pin DC
M mode hold voltage
MUTE pin DC
L mode hold voltage
MUTE pin DC
<BU9262AFS>
(Ta = 25℃, VCC = 5V, VIN = 200mVrms, fin = 1kHz, fC = 2MHz, Rg = 600Ω, unless otherwise specified.)
Parameter
Circuit current
[Digital delay]
Input/Output Gain
Symbol
ICC
AV1
THD1
THD2
Output distortion
THD3
THD4
VNO1
VNO2
Output noise voltage
VNO3
VNO4
Maximum output voltage
VMX1
[Delay volume “DSIG output”]
Input//Output Gain
AV5
Output distortion
THD5
Output noise voltage
VNO5
Maximum output voltage
VMX5
Maximum attenuation
ATT5
[Feedback volume]
Input/Output Gain
AV6
Maximum attenuation
ATT6
[Line amplifier]
Input/Output Gain
AV7
Output distortion
THD6
Output noise voltage
VNO6
Maximum output voltage
VMX6
Channel separation
AVCS
Input impedance
ZI
[Digital unit]
Input“H”voltage
VIH
Input“L”voltage
VIL
Pull-up resistance
Rd
[Serial data]
Clock width
twCK
Latch width
twLT
Data setup
tdsu
Data hold
th
Latch setup
tlsu
Min.
-
Limits
Typ.
20
Max.
40
-3
-
-
-
-
-
-
-
-
0.7
0
0.6
1.0
1.2
1.5
-90
-87
-85
-83
1.0
3
1.2
2.0
2.4
3.0
-75
-72
-70
-68
-
dB
%
%
%
%
dBV
dBV
dBV
dBV
Vrms
tDL = ~48ms、30kHz LPF
tDL = 96ms、30kHz LPF
tDL = 144ms、30kHz LPF
tDL = 192ms、30kHz LPF
tDL = ~48ms、DIN-AUDIO
tDL = 96ms、DIN-AUDIO
tDL = 144ms、DIN-AUDIO
tDL = 192ms、DIN-AUDIO
THD = 10%、30kHz LPF
0
-
-
1.1
-
3
0.17
-100
1.4
-90
6
0.34
-90
-
-60
dB
%
dBV
Vrms
dB
DLYVOL = MAX.
30kHz LPF
DELAY OFF、DIN-AUDIO
THD = 10%、30kHz LPF
DLYVOL = MIN. DIN-AUDIO
-6
-
-3
-90
0
-60
dB
dB
FBVOL = MAX.
FBVOL = MIN. DIN-AUDIO
-3
-
-
1.2
-
24
0
0.01
-100
1.8
-90
35
3
0.03
-90
-
-65
-
dB
%
dBV
Vrms
dB
kΩ
30kHz LPF
DELAY OFF、DIN-AUDIO
THD = 10%、30kHz LPF
f = 400Hz、DIN-AUDIO
3.8
-
12
-
-
25
-
1.2
50
V
V
kΩ
2.0
2.0
1.0
1.0
1.0
-
-
-
-
-
-
-
-
-
-
us
us
us
us
us
4/16
Unit
mA
Condition
No signal input
●Reference data
<BU9253AS/FS>
Ta=25℃
6.0
5.5
5.0
4.5
4.0
375
370
365
360
4.0
10
MIX OUT VOLTAGE : VOUT [dBv]
4.0
3.5
Mute
2.5
2.0
1.5
1.0
Mute & OSC stop
0.5
0.0
VCC=5V / Ta=25℃
10
-30
-40
-50
-60
-70
-80
0.0
VCC=5V / Ta=25℃
20
10
10
OUTPUT LEVEL : VOUT [dB]
OUTPUT LEVEL : VOUT [dB]
VCC=5V / Ta=25℃
1.0
2.0
3.0
4.0
ECHO VR VOLTAGE : VR [V]
-20
-30
10K
100K
1M
-20
-30
1M
-1.5
-1.0 -0.5
0.0
0.5
1.0
1.5
OUTPUT CURRENT : IOUT [mA]
Fig.10 LPF operation amplifier
output performance
THD=3%
4.0
3.5
3.0
1.0
VCC=5V / Ta=25℃
5.5
5
5.0
4
3
2
1
10.0
100.0
OUTPUT LOAD : RLOAD [kΩ]
Fig.9 Through side output load drive
characteristic
6
VCC=5V / Ta=25℃
THD=1%
4.5
4.0
3.5
3.0
2.5
0
0
10.0
4.5
10M
OUTPUT LEVEL : VOUT [Vpp]
1
100K
10K
Fig.8 MIX operation amplifier
frequency characteristic
OUTPUT VOLTAGE : VOUT [V]
2
5.0
INPUT FREQUENCY : FIN [Hz]
VCC=5V / Ta=25℃
1.0
INPUT FREQUENCY: FIN [kHz]
2.5
1K
6
3
-15
VCC=5V / Ta=25℃
-10
Fig.7 LPF operation amplifier frequency
characteristic
4
-10
5.5
INPUT FREQUENCY : FIN [Hz]
5
-5
VCC=5V / Ta=25℃
0
10M
0
Fig.6 A/D frequency characteristic
-40
-40
5
-20
0.1
5.0
Fig.5 ECHO VR characteristic
-10
5.5
Fig.3 Total gain characteristic
-20
5.5
0
4.5
5.0
INPUT VOLTAGE : VCC [V]
0
20
1K
Delay side
-6
4.0
OUTPUT LEVEL:VOUT[Vpp]
4.5
5.0
INPUT VOLTAGE : VCC [V]
-4
5.5
-10
Fig.4 Mute pin threshold
OUTPUT VOLTAGE : VOUT [V]
4.5
5.0
INPUT VOLTAGE : VCC [V]
-90
4.0
-2
Fig.2 Oscillation frequency
VCC=5V / Ta=25℃
3.0
0
-8
5.5
OUTPUT GAIN : VOUT[dB]
4.5
5.0
INPUT VOLTAGE : VCC [V]
Fig.1 Current consumption
MUTE THRESHOLD : MTH [V]
Through side
380
355
4.0
Ta=25℃
2
OUTPUT GAIN : GV [dB]
6.5
4.5
Ta=25℃
385
OSC FREQUENCY : fC [kHz]
OUTPUT CURRENT : ICC [mA]
7.0
-1.5
-1.0 -0.5
0.0
0.5
1.0
1.5
OUTPUT CURRENT : IOUT [mA]
Fig.11 MIX operation amplifier
output performance
5/16
1.0
10.0
100.0
OUTPUT LOAD : RLOAD [kΩ]
Fig.12 Delay side output load drive
characteristic
●Reference data
<BU9262AFS>
VCC=5V / Ta=25℃
20
15
10
10
0
0
OUTPUT GAIN : VOUT[dB]
Ta=25℃
OUTPUT GAIN : VOUT[dB]
-10
-20
-30
-40
-50
10
4.5
4.7
4.9
5.1
5.3
5.5
INPUT VOLTAGE : VCC [V]
VCC=5V / Ta=25℃
-40
-50
-60
-20
-10
-20
-30
0
10
VCC=5V / Ta=25℃
LEVEL : DBO [dBV]
fIN=10kHz
fIN=1f00Hz
-20
-30
-40
-50
-60
-70
-80
-20
0.001
-20
10M
-30
-40
100K
OUTPUT THD : THD2 [%]
100
10
VIN=1kHz
fIN=10kHz
fIN=1f00Hz
fIN=100Hz
0.1
0.01
-20
10M
VIN=1kHz
5
10
Fig.22 Input level vs distortion ratio
characteristic 1
10
Fig.23 Input level vs distortion ratio
characteristic 2
6/16
-5
0
VCC=5V / Ta=25℃
Cutoff=3kHz/Sampling=2MHz/24
10
1
VIN=1kHz
VIN=100Hz
VIN=100Hz
0.1
-35 -30 -25 -20 -15 -10 -5 0
5
INPUT LEVEL: VIN [dB]
-10
Fig.21 MIX VOL distortion
characteristic
100
10
VIN=100Hz
-15
INPUT LEVEL: RIN [dB]
VCC=5V / Ta=25℃
Cutoff=3kHz/Sampling=2MHz/12
1
Beginning at the top
1
Fig.20 MIX VOL frequency
characteristic
VCC=5V / Ta=25℃
Cutoff=7kHz/Sampling=2MHz/6
0
Fig.18 Line amplifier distortion
characteristic
INPUT FREQUENCY: FIN [Hz]
Fig.19 MIX VOL linearity
-5
VCC=5V / Ta=25℃
-20
1K
-10
10
-10
-50
10
0
-15
INPUT LEVEL: LIN [dB]
0
AMPLITUDE : DBI [dBV]
0.1
-35 -30 -25 -20 -15 -10 -5 0
INPUT LEVEL: VIN [dB]
100K
fIN=100Hz
0.01
OUTPUT DISTORTION : VOUT [%]
OUTPUT GAIN : VOUT [dB]
0
-10
OUTPUT THD : THD1 [%]
Beginning at the top
VCC=5V / Ta=25℃
10
10
-40
1K
VCC=5V / Ta=25℃
Fig.17 Line amplifier frequency
characteristic
Fig.16 Line amplifier linearity
-60
1K
10K
100K
100
INPUT FREQUENCY: FIN [Hz]
INPUT FREQUENCY: FIN [Hz]
AMPLITUDE : DBI [ dBV]
-80
-40
Fig.15 FBVOL frequency
characteristic
-50
-80
-40
-30
0.1
-40
-70
-60
-20
10
OUTPUT DISTORTION : THD6 [%]
OUTPUT GAIN : AV7 [dB]
LEVEL : DBO [dBV]
-30
1
10K
0
-20
100
1K
100
INPUT FREQUENCY: FIN [Hz]
VCC=5V / Ta=25℃
10
-10
-80
-10
Fig.14 PRE FILTER frequency
characteristic
Fig.13 Circuit current
0
VCC=5V / Ta=25℃
-50
10
OUTPUT THD : THD3 [%]
OUTPUT CURRENT : ICC [mA]
25
0.1
-35 -30 -25 -20 -15 -10 -5 0
5
INPUT LEVEL: VIN [dB]
10
Fig.24 Input level vs distortion ratio
characteristic 3
●Pin description, Block diagram, Application circuit
<BU9253AS/FS>
・BU9253AS pin assignment
・Description of terminal
BU9253AS
BU9253FS
Pin No.
Pin No.
1
1
Symbol
CR
MUTE
NC
VCC
ADINTIN
ADINTOUT
ADLPFOUT
18
17
16
15
14
13
12
ADLPFIN
11
GND pin
2
2
ECHO VR
3
-
NC1
Echo level DC control
pin
Not connected
Analog unit DC bypath
4
3
BIAS
5
4
DAINT IN
6
5
DAINT OUT
7
6
DALPF IN
8
7
DALPF OUT
9
8
MIX OUT
10
9
MIX IN
pin
DA side integrator input
pin
1
DA side integrator
GND
output pin
2
3
4
5
6
7
8
9
ECHOVR
NC
BIAS
DAINTIN
DAINTOUT
DALPFIN
DALPFOUT
MIXOUT
Fig.25 BU9253AS pin assignment
DA side LPF input pin
DA side LPF output pin
Mixing output of original
・BU9253FS pin assignment
sound and echo sound
Original sound input pin
CR
MUTE
VCC
16
15
14
ADINT IN ADINT OUT ADLPF OUT
13
ADLPF IN
12
11
10
5
6
7
11
10
ADLPF IN
11
ADLPF OUT
13
12
ADINT OUT
14
13
ADINT IN
15
14
VCC
AD side LPF input pin
AD side integrator
output pin
AD side integrator input
pin
VCC pin
-
NC2
17
15
MUTE
Mute control pin
18
16
CR
Oscillator CR pin
Not connected
1
2
3
GND
ECHO VR
BIAS
4
DAINT IN
DAINT OUT DALPF IN DALPF OUT
Fig.26 BU9253FS pin assignment
・BU9253AS Block diagram, Application circuit
VCC
VC C
+
R7
20k
C5
0.012u
100u
IN
C1
100p
R3
22k
VCC
0.1u
C3
0.01u
R4
10k
R6
8.2k
+
C2
22u
17
16
15
14
MUTE
13
C4
4700p
12
+
R5
20k
11
2.2u
10
-
A/D
+
OSC
A/D side LPF
operation amplifier
A/D側LPF用オペアンプ
COUNTOR
SRAM
MIX
D/A side LPF
operation amplifier
D/A側LPF用オペアンプ
+
D/A
2
3
VC C
R8
2.2k
9
AD side LPF output pin
16
1
MIX IN
of mixing amplifier
12
18
10
Function
GND
R2
39k
MIXIN
4
+
5
-
6
7
C8
3300p
8
9
OUT
22u
C6
0.01u
VR1
10k
R9
10k 0.47u
C7
0.01u
Fig.27 Application circuit
7/16
R10
4.7k
R11
15k
+
2.2u
8
MIX OUT
●Pin description, Block diagram, Application circuit
<BU9262AFS>
・Description of terminal
No.
1
2
3
・Block diagram
Symbol
NC
TESTB
SCK
Function
1
Not connected
2
Test negative logic input pin (normally “H” input)
3
Serial clock input
4
SLT
Serial latch input
5
SI
Serial data input
7
CLKI
Oscillation input pin
9
8
NC
Not connected
10
9
DSOUT
Delay source output
11
10
TESTOUT
Test output pin (normally “L” output)
12
11
LPF1I1
13
LPF1I2
14
ADI
17
DAI
18
DAO
19
LPF2I1
20
LPF2I2
21
LPF2O
22
VOIN
24
DSIG
VREF
27
+
Output
出力
ミキシング
mixing
26
+
Reference
基準電圧
voltage
+
25
24
23
Test
mode output
テストモード出力
Reset
リセット
22
FBVOL
21
LPF
LPF
20
19
ADC
16
ADO
23
LPF capacitor external pin
LPF1O
GND
28
RAM
15
16
29
クロック
Clock
8
15
30
セレクタ
7
Oscillation output pin
14
Serial
シリアル
control
コントロール
回路
circuit
6
CLKO
13
Input mixer
入力ミキサ
selector
5
6
12
31
コントロール
4
32
DLYVOL
Test
mode negative
logic input
テストモード
負論理入力
Control
Processing
処理
18
DAC
17
ADC capacitor connection pin
Fig.28 Block diagram
GND pin
・Pin assignment
DAC capacitor connection pin
NC
1
32
M IX IN
T EST B
2
31
M IC IN
SCK
3
30
VC C
S LT
4
29
LC IN
SI
5
28
R C IN
C LK O
6
27
FB O U T
C LK I
7
26
LC O U T
NC
8
25
RCOUT
DSOUT
9
24
VR E F
T EST O U
TESTOUT
10
23
D S IG
LP F1I1
11
22
VO IN
LPF capacitor external pin
Delay signal / volume input pin
Delay signal output
Analog reference voltage
25
RCOUT
Rch output
26
LCOUT
Lch output
27
FBOUT
Feedback signal output
28
RCIN
Rch input
LP F1I2
12
21
LP F2O
29
LCIN
Lch input
LP F1O
13
20
LP F2I2
30
VCC
Power source pin
AD I
14
19
LP F2I1
31
MICIN
Microphone input (microphone amplifier output connected)
AD O
15
18
D AO
Mix signal input
GND
16
17
D AI
32
MIXIN
Fig.29 Pin assignment
・Application circuit
+
47u
0.1u
1
2
DLYVOL
32
Test
mode negative
logic input
テストモード
負論理入力
31
+
MIC IN
1u
SERIAL CLOCK
3
SERIAL LATCH
4
SERIAL DATA
Input mixer
入力ミキサ
selector
Serial
シリアル
control
コントロール
circuit
回路
30
セレクタ
29
5
28
6
27
+
+
Lch IN
1u
Rch IN
1u
R
2MHz
クロック
Clock
R
7
8
26
+
Output
出力
mixing
ミキシング
+
25
+
+
0.33u R 1M
Lch OUT
2.2u
Rch OUT
2.2u
9
1u NP
10
Reference
基準電圧
voltage
+
12
0.01u
2200p
23
テスト出力
Test
output
11
FBVOL
RAM
47u
0.1u
2200p
LPF
20
19
ADC
0.01u
DSIG
+
2.2u
21
14
15
+
22
LPF
13
24
Processing
18
処理
DAC
16
0.01u
17
Fig.30 Application circuit
8/16
0.01u
●Description of operations
<BU9253AS/FS>
・OSC(Oscillator)
Clock is generated by connecting external RC circuit. Clock is used for the delay counter.
・Mute control circuit (MUTE)
By input voltage of the mute terminal, 3 statuses, that is, mute, mute release (operating), and clock stop & mute can be
selected.
・COUNTER
This counter is for generating delay time. It can generate delay time about 131ms at oscillation frequency
Fclk = 375kHz.
・SRAM
SRAM with 8Kbit capacity for generating the delay.
・A/D side LPF operation amplifier
LPF can be structured by external RC, and band limit of signal to be input to A/D is available.
・A/D
This digitalizes output signal of AD side LPF, and outputs it to SRAM.
・D/A side LPF operation amplifier
LPF can be structured by external RC, and band limit of signal to be output to D/A is available.
・D/A
This converts delayed audio digital data input from SRAM into analog signal.
・Mixing amplifier (MIX)
This circuit is used for mixing delayed signals and (original sound) signals input from MIX IN.
<BU9262AFS>
・Serial control circuit
This serial I/F circuit is for setting each register. It can be controlled by serial 16bit data. It reads in SI at the rise of SCK,
and latches data at the rise of SLT.
No.
D0
D1
D2
D3
D4
Mode
Remarks
Delay time
Delay time setting
"Refer to the separate table."
INPUT select
“ISEL”
( D3、D4 ) = ( L、L ):L+R
( L、L ):L-R
( L、H ):MIC
( H、H ):CLK OFF
D7
D8
D9
D10
D11
D12
D13
Delay out “DOSW”
( D5、D6 ) = ( L、L ):FWD (L, R in phase)
( L、L ):REV (R in opposite phase)
( L、H ):MIC MIX
( H、H ):NORMAL
H : output ON
L : output OFF
Delay volume
“DLYVOL”
Delay signal / volume setting
"Refer to the separate table."
Feedback volume
“FBVOL”
Feedback / volume setting
"Refer to the separate table."
D14
Latch control
(D5, D6) = (L, H) : latch
Others are not latch
D5
D6
OUTPUT select
“OSEL”
9/16
・Delay time control circuit
This circuit controls delay time. -8 delay time can be selected by register.
D0
L
H
L
H
L
H
L
H
D1
L
L
H
H
L
L
H
H
D2
L
L
L
L
H
H
H
H
Delay time (Sampling frequency)
9.2msec (2MHz / 6)
15.4msec (2MHz / 6)
21.1msec (2MHz / 6)
30.0msec (2MHz / 6)
48.0msec (2MHz / 6)
96.0msec (2MHz / 12)
144.0msec (2MHz / 18)
192.0msec (2MHz / 24)
LPF cutoff frequency
7kHz
3kHz
・Delay signal volume circuit
This is the delay signal volume circuit. 8 volume setting can be selected by register.
D8
L
H
L
H
L
H
L
H
D9
L
L
H
H
L
L
H
H
D10
L
L
L
L
H
H
H
H
DLYVOL
+3dB
0dB
-3dB
-6dB
-9dB
-12dB
-15dB
-∞dB
・Feedback volume circuit
This is the feedback volume circuit. 8 feedback volume setting can be selected by register.
D11
L
H
L
H
L
H
L
H
D12
L
L
H
H
L
L
H
H
D13
L
L
L
L
H
H
H
H
FBVOL
-3dB
-5dB
-7dB
-9dB
-11dB
-13dB
-15dB
-∞dB
・Input mixer・selector circuit
This mixes MIC IN, LCIN, RCIN, VOIN signals, and selects the output path by selector.
LCIN
+
+
-
VOIN
+
ISEL
FBVOL
LCOUT
OSEL
#3
RCOUT
+
RCIN
MRCIN
OSEL
#2
+
ADC
Delay
ディレイ
DAC
+
OSEL
#1
-
DLY
VOL
DOSW
Fig.31 Input mixer selector circuit
10/16
DSIG
・Output/ input LPF circuit
This is the LPF circuit connected to the ADC input unit and the DAC output unit. Delay time setting can be select by
internal resistor.
Delay amount
48.0msec or below
96.0msec or below
Switch
S1
S2
Resistance value
4.8kΩ*
11.3kΩ*
*Internal resistance precision is ±30%.
Pins
12, 20
12、20ピン
Pins
11, 19
11、19ピン
Pins
13, 21
13、21ピン
R1
R2
S1
R1
R2
R1
R2
S2
(注)11ピンでは外付け容量結合になります
Note:
In Pin 11, is an external capacity connection
Fig.32 Input LPF / Output LPF circuit
・Auto mute circuit
Delay output is muted during power on and delay time switching.
●Timing chart
<BU9262AFS>
・Serial interface specification
SI
D0
D12 D13 D14 D15
D1
SCK
SLT
Fig.33 Serial interface specification
・Serial timing
SCK
twCK
tdsu
twCK
th
tdsu
SI
twLT
SLT
Fig.34 Serial timing
11/16
●Description of external components
< BU9253AS/FS >
(Refer to Fig. 27.)
・Echo level
Echo signal level is determined by the gains of A/D side operation amplifier and the D/A operation amplifier, since there
is no gain in A/D → SRAM → D/A. Path in applied circuit example,
Gain at A/D side : R4 ÷ R5 = 10K ÷ 20K = 0.5
Gain at D/A side : R11 ÷ R9 = 15K ÷ 10K = 1.5
When the original signal is defined as 1, the echo signal level becomes the feedback ratio.
Echo signal feed back ration = 0.5 x 1.5 = 0.75 = 75%
・Echo level setting method
Echo level can be set by adjusting DC voltage by VR1. It does not change in low voltage range, therefore, R8 is added,
and it can be adjusted by VR pot.
・Clock frequency and delay time
Clock frequency and delay time are as the following equations.
Sample frequency = clock frequency ÷ 6
Delay time = (1 ÷ sample frequency) x 8192 (SRAM 8192 bits)
As an example, when clock frequency is 375kHz, then sample frequency is 375kHz ÷ 6 = 62.5kHz. Therefore, the delay
time is:
Delay time = (1 ÷ 62500) x 8192 = 131ms
Clock frequency is determined by R2, C1 connected to CR terminal (pin 18 in BU9253AS, pin 16 in BU9253FS). When
C, R are changed, oscillation frequency changes, but the delay time is kept fixed.
・LPF frequency characteristic
When the band width is set too narrow, echo voice becomes worse, and when band width is set wide, A/D cannot be
converted, and S/N becomes worse. Band width of applied circuit example is 2kHz.
・A/D, D/A external capacitors C3, C6
Feedback is set by resistance and capacitor so that output follows even when input signal level and frequency of
A/D, D/A change. Variation in the externally attached capacitor can influence the sound quality. A small capacitor can
generate noise, while a capacitor that is too large will attenuate. In applied circuit example, 0.01uF is selected to avoid
influence upon LPF.
・Mute
Can be controlled by input voltage of MUTE pin. It takes more than one SRAM cycle for switching between mute → mute
release (L → M → H). It is necessary for initializing SRAM and insuring stable status before changing operating modes.
MIX OUT output is muted, so original sound and echo sound output is stopped.
MUTE pin
H
M
L
Mode
Mute release (operating)
Mute
Clock stop & mute
In the applied circuit example, MUTE is set by R3, C2. In the specifications, voltage range of M is 1.6V ~ 2.8V, therefore,
it is necessary to change R3,C2, and set the time of 1.6V ~ 2.8V over 131ms. In consideration of fluctuation, C2 = 22uF,
R3 = 22kΩ. When MUTE pin is controlled by the microcontroller, select M range to 1.6V ~ 2.8V and keep M level over
131ms.
・Maximum signal input
When original signal and echo are in phase and mixed, both the signals are added to reach maximum output. In order
not to clip this signal, the maximum output at power source voltage of 5V is about 4Vpp. When echo feedback ratio is
0.75, then maximum signal input becomes about 1.0Vpp.
Vout MAX=1/(1-A)×Vin
=1/(1-0.75)×Vin=4Vpp
∴Vin=1Vpp
12/16
・LPF and echo system gain
When the ratio of original signal and echo is changed, R5, R6, R9, R11 are also changed, and the characteristics of LPF
change too. Therefore, it is necessary to change all the constants of LPF. In the case, to precisely measure the ratio of
original signal and echo, remove R7, input signal around 500Hz without the influence of LPF from MIX IN, and compare
it with the output of DALPF OUT.
R4
R11
fc =
C4
C8
R5
R9
IN
2 π C 4 C 5 R 4R 5
R6
R10
C 5R 4R 5
1
Q=
R 4R 5 +
-
C5
C7
1
R 4R 5
C4
R6
QQgenerally
about
0.7
0.7ぐらい
は一般的に
OUT
A1 =
+
R4
R5
A2 =
R11
R9
Echo
signal amplitude ratio
エコ-信号増幅率
= A1 × A 2 =
Fig.35 LPF and echo system gain
R 4 × R11
R5 × R9
・Clock oscillation
As for C,R, tolerance should be below 5%. Note: If measurement is made by attachment a probe oscilloscope it might
load the oscillator and reduce the oscillation frequency.
* The set values in this document are for reference only. In the actual set, characteristics may change according to board
layout, wiring, types of parts used, and therefore, in actual use, carry out sufficient verification with the actual devices.
13/16
●Cautions on Use
1)
Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any
over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as
fuses.
2)
Operating conditions
Characteristics are guaranteed under the conditions of each specified parameter.
3)
Reverse polarity connection of the power supply
Connecting the of power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines.
An external direction diode can be added.
4)
Power supply line
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply
line, separate the ground section and supply lines of the digital and analog blocks.
Furthermore, for all power supply terminals to ICs, connect a capacitor between the power supply and the GND terminal.
When applying electrolytic capacitors in the circuit, note that capacitance characteristic values are reduced at low
temperatures.
5)
GND voltage
Ground-GND potential should maintain at the minimum ground voltage level. Furthermore, no terminals (except SWOUT)
should be lower than the GND potential voltage including an electric transients.
6)
Short circuit between terminals and GND or other devices
Pay attention to the assembly direction of the ICs. Wrong mounting direction or shorts between terminals, GND, or other
components on the circuits, can damage the IC.
7)
Operation in a strong electromagnetic field
Using the ICs in a strong electromagnetic field can cause operation malfunction.
8)
Inspection with set PCB
During testing, turn on or off the power before mounting or dismounting the board from the test Jig.
Do not power up the board without waiting for the output capacitors to discharge. The capacitors in the low output impedance
terminal can stress the device. Pay attention to the electro static voltages during IC handling, transportation, and storage.
9)
Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the
parasitic element can cause interference with circuit operation, thus resulting in a malfunction and breakdown of the
input terminal. Therefore, pay thorough attention not to apply a voltage lower than the GND to the input terminals.
Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition,
even if the power supply voltage is applied, apply a voltage lower than the power supply voltage to the input terminals, or
a voltage within the guaranteed value of electrical characteristics.
10) Ground wiring pattern
The power supply and ground lines must be as short and thick as possible to reduce line impedance. Fluctuating
voltage on the power ground line may damage the device.
11) External capacitor
When using external ceramic capacitors, consider degradation in the nominal capacitance value due to DC bias and
changes in the capacitance with temperature.
14/16
●Product designation
B
U
9
2
5
3
A
E
Package type
AS: SDIP18
FS: SSOP-A16
Part Number
BU9253
B
-
S
U
9
2
6
2
A
Part Number
BU9262A
F
2
Package and forming specifications
E2: Embossed tape and reel
-
S
E
2
Package and forming specifications
E2: Embossed tape and reel
Package type
FS: SSOP-A32
SDIP18
<Dimension>
<Packing information>
Container
19.4 ± 0.3
10
1
9
3.4 ± 0.2
0.51Min.
3.95 ± 0.3
6.5 ± 0.3
18
Tube
Quantity
1000pcs
Direction
of feed
Direction of products is fixed in a container tube.
7.62
0.3 ± 0.1
0° ∼ 15°
0.5 ± 0.1
1.778
(Unit:mm)
※Orders are available in complete units only.
SSOP-A16
<Dimension>
<Tape and Reel information>
1
8
2500pcs
Direction
of feed
E2
(Correct direction: 1pin of product should be at the upper left when you
hold reel on the left hand, and you pull out the tape on the right hand)
0.15±0.1
0.1
1234
1234
Direction of feed
1pin
Reel
1234
1234
1234
1234
0.36±0.1
1234
0.8
0.3Min.
9
Embossed carrier tape
Quantity
1234
6.2±0.3
1.5±0.1
4.4±0.2
0.11
6.6±0.2
16
Tape
※Orders are available in complete units only.
(Unit:mm)
SSOP-A32
<Dimension>
<Tape and Reel information>
1
16
2000pcs
Direction
of feed
E2
(Correct direction: 1pin of product should be at the upper left when you
hold reel on the left hand, and you pull out the tape on the right hand)
0.3Min.
17
Embossed carrier tape
Quantity
15/16
1234
Direction of feed
※Orders are available in complete units only.
(Unit:mm)
1234
1234
1pin
1234
1234
Reel
1234
0.36 ± 0.1
1234
0.8
0.15 ± 0.1
0.1
1234
1.8 ± 0.1 7.8 ± 0.3
5.4 ± 0.2
0.11
13.6 ± 0.2
32
Tape
16/16
Catalog No.05T411Be '06.4 ROHM C
Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any
means without prior permission of ROHM CO.,LTD.
The contents described herein are subject to change without notice. The specifications for the
product described in this document are for reference only. Upon actual use, therefore, please request
that specifications to be separately delivered.
Application circuit diagrams and circuit constants contained herein are shown as examples of standard
use and operation. Please pay careful attention to the peripheral conditions when designing circuits
and deciding upon circuit constants in the set.
Any data, including, but not limited to application circuit diagrams information, described herein
are intended only as illustrations of such devices and not as the specifications for such devices. ROHM
CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any
third party's intellectual property rights or other proprietary rights, and further, assumes no liability of
whatsoever nature in the event of any such infringement, or arising from or connected with or related
to the use of such devices.
Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or
otherwise dispose of the same, no express or implied right or license to practice or commercially
exploit any intellectual property rights or other proprietary rights owned or controlled by
ROHM CO., LTD. is granted to any such buyer.
Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices
(such as audio visual equipment, office-automation equipment, communications devices, electrical
appliances and electronic toys).
Should you intend to use these products with equipment or devices which require an extremely high level
of reliability and the malfunction of which would directly endanger human life (such as medical
instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers
and other safety devices), please be sure to consult with our sales representative in advance.
It is our top priority to supply products with the utmost quality and reliability. However, there is always a chance
of failure due to unexpected factors. Therefore, please take into account the derating characteristics and allow
for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in
order to prevent possible accidents that may result in bodily harm or fire caused by component failure. ROHM
cannot be held responsible for any damages arising from the use of the products under conditions out of the
range of the specifications or due to non-compliance with the NOTES specified in this catalog.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
ROHM Customer Support System
www.rohm.com
Copyright © 2008 ROHM CO.,LTD.
THE AMERICAS / EUROPE / ASIA / JAPAN
Contact us : webmaster@ rohm.co. jp
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TEL : +81-75-311-2121
FAX : +81-75-315-0172
Appendix1-Rev2.0
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