Kemet C2220C106K3R1CTU Surface mount multilayer ceramic chip capacitor Datasheet

Surface Mount Multilayer Ceramic Chip Capacitors
KPS Series – Commercial Grade (X7R Dielectric)
Overview
KEMET’s KPS Series (KEMET Power Solutions) utilizes
proprietary lead-frame technology to vertically stack one or two
multilayer ceramic chip capacitors (MLCCs) into a single compact
surface mount package. The attached lead-frame mechanically
isolates the capacitor/s from the printed circuit board, therefore
offering advanced mechanical and thermal stress performance.
Isolation also addresses concerns for audible, microphonic noise
that may occur when a bias voltage is applied.
A two chip stack offers up to double the capacitance in the same
or smaller design footprint when compared to traditional surface
mount MLCC devices.
Providing up to 10mm of board flex capability, KPS Series
capacitors are environmentally friendly and in compliance with
RoHS legislation. Available in X7R dielectric, these devices are
capable of Pb-free reflow profiles and provide lower ESR, ESL
and higher ripple current capability when compared to other
dielectric solutions.
Benefits
Applications
•
•
•
•
•
•
•
•
•
•
Higher capacitance in the same footprint
Potential board space savings.
Advanced protection against thermal and mechanical stress
Provides up to 10mm of board flex capability
Reduces audible, microphonic noise
Extremely low ESR and ESL
Pb-Free and RoHS compliant
Capable of Pb-Free reflow profiles
Non-polar device, minimizing installation concerns
Automotive grade (AEC-Q200) under development.
•
•
•
•
•
•
•
Industrial, Automotive, Military, Telecom
Smoothing circuits
DC-to-DC converters
Power supplies (input/output filters)
Noise Reduction (piezoelectric / mechanical)
Circuits with a direct battery or power source connection.
Critical and safety relevant circuits without (integrated) current
limitation.
• Any application that is subject to high levels of board flexure or
temperature cycling
Ordering Information
C
Ceramic
2220
C
Case Size Specification/
(L" x W")
Series
1210
1812
2220
C = Standard
106
M
5
R
2
C
Capacitance
Code (pF)
Capacitance
Tolerance1
Voltage
Dielectric
Failure Rate/Design
2 Sig. Digits
+ Number of
Zeros
K = ±10%
M = ±20%
8 = 10V
4 = 16V
3 = 25V
5 = 50V
1 = 100V
A = 250V
R = X7R
1 = KPS Single Chip Stack
2 = KPS Double Chip Stack
TU
End
Packaging/Grade
Metallization2
(C-Spec)3
C = 100%
Matte Sn
TU = 7" Reel
Unmarked
7289 = 13" Reel
Unmarked
Double chip stacks ("2" in the 13th character position of the ordering code) are only available in M (±20%) capacitance tolerance. Single chip stacks ("1" in
the 13th character position of the ordering code) are available in K (±10%) or M (±20%) tolerances.
2
Additional termination options may be available. Contact KEMET for details.
3
Additional reeling or packaging options may be available. Contact KEMET for details.
1
One WORLD
One Brand
One Strategy
One Focus
One Team
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
One KEMET
C1020-4 • 6/22/2010
1
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Dimensions – Millimeters (Inches)
Chip
Stack
Single
Double
Top View
Single or Double
Chip Stack
Profile View
Double Chip Stack
Single Chip Stack
EIA
Size
Code
Metric
Size
Code
L Length
W Width
T Thickness
LW Lead Width
Mounting
Technique
1210
1812
2220
1210
1812
2220
3225
4532
5650
3225
4532
5650
3.50 (.138) ± 0.30 (.012)
5.00 (.197) ± 0.50 (.020)
6.00 (.236) ± 0.50 (.020)
3.50 (.138) ± 0.30 (.012)
5.00 (.197) ± 0.50 (.020)
6.00 (.236) ± 0.50 (.020)
2.60 (.102) ± 0.30 (.012)
3.50 (.138) ± 0.50 (.020)
5.00 (.197) ± 0.50 (.020)
2.60 (.102) ± 0.30 (.012)
3.50 (.138) ± 0.50 (.020)
5.00 (.197) ± 0.50 (.020)
3.35 (.132) ± 0.10 (.004)
2.65 (.104) ± 0.35 (.014)
3.50 (.138) ± 0.30 (.012)
6.15 (.242) ± 0.15 (.006)
5.00 (.197) ± 0.50 (.020)
5.00 (.197) ± 0.50 (.020)
0.80 (.032) ± 0.15 (.006)
1.10 (.043) ± 0.30 (.012)
1.60 (.063) ± 0.30 (.012)
0.80 (.031) ± 0.15 (.006)
1.10 (.043) ± 0.30 (.012)
1.60 (.063) ± 0.30 (.012)
Solder Reflow
Outline Drawing
Ref
A
B
C
D
E
F
G
Name
Material
Leadframe
Leadframe Attach
Phosphor Bronze - Alloy 510
High Temp Solder
Cu
Ni
Sn
Ni
BaTiO 3
Termination
Electrode
Dielectric
Qualification/Certification
Commercial grade products meet or exceed the performance and reliability standards outlined in Table 4 - Performance and Reliability
of this specification.
Environmental Compliance
RoHS PRC ( Peoples Republic of China) compliant
Electrical Parameters/Characteristics
Operating Temperature Range:
-55°C to +125°C
Capacitance Change with Reference to +25°C and 0 Vdc Applied (TCC):
±15%
Aging Rate (Max % Cap Loss/Decade Hour):
3.5%
Dielectric Withstanding Voltage:
Dissipation Factor (DF) Maximum Limits @ 25ºC:
Insulation Resistance (IR) Limit @ 25°C:
250% of rated voltage
(5 ± 1 seconds and charge/discharge not exceeding 50mA)
5% (10V), 3.5% (16V & 25V) and 2.5% (50V to 200V)
See Insulation Resistance Limit Table page 3
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Capacitance and Dissipation Factor (DF) measured under the following conditions:
1kHz ± 50Hz and 1.0 ± 0.2 Vrms if capacitance ≤10µF
120Hz ± 10Hz and 0.5 ± 0.1 Vrms if capacitance >10µF
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1020-4 • 6/22/2010
2
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Insulation Resistance Limit Table
1000 megohm microfarads
or 100GΩ
EIA Case Size
1210
1812
2220
< 0.39µF
< 2.2µF
< 10µF
500 megohm microfarads
or 10GΩ
≥ 0.39µF
≥ 2.2µF
≥ 10µF
Electrical Characteristics
Z and ESR
Z and C1210C475M5R1C
ESR C1210C475M5R1C
Z and ESR C2220C225MAR2C
3
4
10
10
ESR
ESR
Z
Z
3
10
2
10
Magnitude Ohms
Magnitude Ohms
2
10
1
10
0
10
10
-1
1
10
0
10
10
10
10
-1
-2
10
-3
10
0
2
4
10
10
10
6
8
10
10
10
10
-2
-3
10
0
Frequency (Hz)
2
10
4
10
10
6
8
10
10
10
Frequency (Hz)
Z and ESR C2220C476M3R2C
4
10
ESR
Z
2
Magnitude Ohms
10
0
10
10
10
10
-2
-4
-6
10
0
2
10
10
4
10
6
8
10
10
10
Frequency (Hz)
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1020-4 • 6/22/2010
3
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Electrical Characteristics con't
Impedance - 1812, .10µF, 50V X7R
ESR - 1812, .10µF, 50V X7R
ESR vs. Frequency
10
Impedance vs. Frequency
10000
C1812C104K5R2C (2 Chip Stack)
C1812C104K5R1C (1 Chip Stack)
C1812C104K5R2C (2 Chip Stack)
C1812C104K5R1C (1 Chip Stack)
Impedance (Ohms)
1000
ESR (Ohms)
1
0.1
100
10
1
0.1
0.01
1.E+03
1.E+04
1.E+05
1.E+06
Frequency (Hz)
1.E+07
1.E+08
0.01
1.E+03
ESR - 1210, .22µF, 50V X7R
1.E+05
1.E+06
Frequency (Hz)
1.E+07
1.E+08
Impedance - 1210, .22µF, 50V X7R
ESR vs. Frequency
10
1.E+04
C1210C224K5R2C (2 Chip Stack)
C1210C224K5R1C (1 Chip Stack)
ESR (Ohms)
0.1
C1210C224K5R2C (2 Chip Stack)
C1210C224K5R1C (1 Chip Stack)
100
Impedance (Ohms)
1
Impedance vs. Frequency
1000
10
1
0.1
0.01
1.E+03
1.E+04
1.E+05
1.E+06
1.E+07
1.E+08
0.01
1.E+03
1.E+04
Frequency (Hz)
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
1.E+05
1.E+06
Frequency (Hz)
1.E+07
C1020-4 • 6/22/2010
1.E+08
4
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Electrical Characteristics con't
Microphonics - 2220, 22µF, 50V, X7R
60
50
40
30
20
10
0
Sound Pressure (dB)
Sound Pressure (dB)
Microphonics - 1210, 4.7µF, 50V, X7R
Standard SMD MLCC
KPS - 1 Chip Stack
0
5
10
Vp-p
50
40
30
20
Standard SMD MLCC
KPS - 2 Chip Stack
10
0
15
0
50
40
30
20
Standard SMD MLCC
KPS - 2 Chip Stack
10
0
0
5
10
Vp-p
15
Vp-p
4
6
Microphonics - 1210, 22µF, 25V, X7R
20
Sound Pressure (dB)
Sound Pressure (dB)
Microphonics - 2220, 47µF, 25V, X7R
2
50
40
30
20
Standard SMD MLCC
KPS - 2 Chip Stack
10
0
0
2
Vp-p
4
6
Competitive Comparision
60
50
40
30
20
10
0
Ripple Current (Arms) 2220, 22µF, 50V
Absolute Temperature (C)
Sound Pressure (dB)
Microphonics - 1210, 4.7µF, 50V, X7R
Competitor
KEMET - KPS
0
5
Vp-p
10
15
120
100
80
60
40
KEMET KPS, 2220, 22µF, 50V rated (2 Chip Stack)
20
Competitor 2220, 22µF, 50V rated (2 Chip Stack)
0
0
10
20
Ripple Current (Arms)
30
Note: Refer to Table 4 for test method.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1020-4 • 6/22/2010
5
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Electrical Characteristics con't
Board Flex vs. Termination Type
Board Flex vs. Termination Type
Weibull
X7R 1210 10 uF – (22uF KPS Stacked)
2
Percent
80
70
60
50
40
Standard Termination
KPS – 2 Chip Stack
90
Standard Termination
KPS – 2 Chip Stack
90
Percent
Weibull
X7R 2220 22uF 25V – (47uF KPS Stacked)
2
30
20
80
70
60
50
40
30
20
10
10
1.5
1.0
2.0
3.0
4.0
Board Flexture (mm)
6.0
5.0
1.0
7. 0 8.0 9.0 10.0
1.5
0
5.
0
6.
0
0
7. 8. 9.0 10.0
Board Flexure to 10mm
Weibull
X7R 1210 4.7 uF 50V
2
90
80
70
60
50
40
30
Weibull
X7R 1812 47uF 16V
90
Percent
Percent
0
4.
Board Flexture (mm)
Board Flexure to 10mm
2
0
3.
2.0
20
10
80
70
60
50
40
30
20
10
0
1.
5
1.
0
2.
0
3.
0
4.
Board Flexture (mm)
0
5.
0
6.
0
7.
0 0 0
8. 9. 10.
1
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
Board Flexture (mm)
C1020-4 • 6/22/2010
10
6
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Table 1 – (1210 - 2220 Case Sizes)
Cap pF
Series
Cap
Code
C1210
104
224
474
105
225
335
475
106
156
226
336
476
107
0.10 uF
0.22 uF
0.47 uF
1.0 uF
2.2 uF
3.3 uF
4.7 uF
10 uF
22 uF
33 uF
47 uF
100 uF
220 uF
104
224
474
105
225
335
475
106
226
336
476
107
227
Cap pF
Cap
Code
C2220
Voltage Code
8
4
3
5
1
A
4
3
5
1
A
4
3
5
1
A
Voltage
10
16
25
50
100
250
16
25
50
100
250
16
25
50
100
250
Cap Tolerance
0.10 uF
0.22 uF
0.47 uF
1.0 uF
2.2 uF
3.3 uF
4.7 uF
10 uF
15 uF
22 uF
33 uF
47 uF
100 uF
C1812
K
K
K
K
K
K
K
K
K
K
K
K
K
Product Availability and Chip Thickness Codes - See Table 2 for Chip Thickness Dimensions
Single Chip Stack
M
M
M
M
M
M
M
M
M
M
M
M
M
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
M
M
M
M
M
M
M
M
M
M
M
M
M
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
Voltage
10
16
25
50
Voltage Code
8
4
3
5
Series
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
JS
FW
FW
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
100
250
16
25
50
100
250
16
25
50
100
250
1
A
4
3
5
1
A
4
3
5
1
A
Double Chip Stack
FW
C1210
C1812
C2220
Table 2 – Chip Thickness / Packaging Quantities
Thickness
Code
Chip
Size
Thickness ±
Range (mm)
Qty per Reel
7" Plastic
Qty per Reel
13" Plastic
FV
FW
GP
GR
JS
JR
1210
1210
1812
1812
2220
2220
3.35 ± 0.10
6.15 ± 0.15
2.65 ± 0.35
5.00 ± 0.50
3.50 ± 0.30
5.00 ± 0.50
600
300
500
400
300
200
2000
1000
2000
1700
1300
800
Package Quantity Based on Finished Chip Thickness Specifications
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1020-4 • 6/22/2010
7
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Soldering Process
Recommended Soldering Technique:
• Mounting technique is limited to solder reflow only.
Recommended Soldering Profile
• KEMET recommends following the guidelines outlined in IPC/JEDEC J-STD-020D.1
Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC-7351
EIA Size
Code
Metric Size
Code
1210
1812
2220
3225
4532
5650
Median (Nominal) Land
Protrusion (mm)
X
1.75
2.87
4.78
Y
1.14
1.35
2.08
C
3.00
4.39
5.38
Table 4 – Performance & Reliability: Test Methods and Conditions
Stress
Reference
Test or Inspection Method
Ripple Current
Heat Generation
∆T : 20ºC max.
Terminal Strength
JIS-C-6429
Appendix 1, Note:Force of 1.8kg for 60 seconds.
Board Flex
JIS-C-6429
Appendix 2, Note:2mm (min) for all except 3mm for C0G.
Reflow solder the capacitor onto a PC board and apply voltage with 10kHz~1Mhz sine curve.
(Ripple voltage must be < rated voltage)
Magnification 50X. Conditions:
Solderability
J-STD-002
a) Method B, 4 hrs @ 155°C, dry heat @ 235°C
b) Method B @ 215°C category 3
c) Method D, category 3 @ 260°C
Temperature Cycling
JESD22 Method JA-104
1000 Cycles (-55°C to +125°C), Measurement at 24 hrs. +/- 2 hrs after test conclusion.
Load Humidity: 1000 hours 85°C/85%RH and Rated Voltage.Add 100K ohm resistor. Measurement
at 24 hrs. +/- 2 hrs after test conclusion.
Low Volt Humidity:1000 hours 85C°/85%RH and 1.5V.Add 100K ohm resistor.
Measurement at 24 hrs. +/- 2 hrs after test conclusion.
t = 24 hours/cycle.Steps 7a & 7b not required.Unpowered.
Measurement at 24 hrs. +/- 2 hrs after test conclusion.
-55°C/+125°C.Note: Number of cycles required-300, Maximum transfer time-20 seconds, Dwell
time-15 minutes.Air-Air.
Biased Humidity
MIL-STD-202 Method 103
Moisture Resistance
MIL-STD-202 Method 106
Thermal Shock
MIL-STD-202 Method 107
High Temperature Life
MIL-STD-202 Method 108
1000 hours at 125°C (85°C for X5R, Z5U and Y5V) with 1.5X rated voltage applied.
Storage Life
MIL-STD-202 Method 108
150°C, 0VDC, for 1000 Hours.
Mechanical Shock
MIL-STD-202 Method 213
Figure 1 of Method 213, Condition F.
Resistance to Solvents
MIL-STD-202 Method 215
Add Aqueous wash chemical - OKEM Clean or equivalent.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1020-4 • 6/22/2010
8
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Tape & Reel Packaging Information
KEMET offers Multilayer Ceramic Chip Capacitors packaged in
8mm, 12mm and 16mm tape on 7" and 13" reels in accordance
with EIA standard 481. This packaging system is compatible with
all tape fed automatic pick and place systems. See Table 2 for
details on reeling quantities for commercial chips.
Bar Code Label
Anti-Static Reel
®
Embossed Plastic* or
Punched Paper Carrier.
T
ME
KE
Chip and KPS Orientation in Pocket
(except 1825 Commercial, and 1825 & 2225 Military)
Sprocket Holes
Embossment or Punched Cavity
8mm, 12mm
or 16mm Carrier Tape
178mm (7.00")
or
330mm (13.00")
Anti-Static Cover Tape
(.10mm (.004") Max Thickness)
*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.
Table 5 - Carrier Tape Configuration (mm)
EIA Case Size
Tape size (W)*
Pitch (P1)*
01005 - 0402
8
2
0603 - 1210
8
4
1805 - 1808
12
4
≥ 1812
12
8
KPS 1210
12
8
KPS 1812 & 2220
16
12
Array 0508 & 0612
8
4
*Refer to Figure 1 for W and P1 carrier tape reference locations.
*Refer to Table 4 for tolerance specifications.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1020-4 • 6/22/2010
9
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Figure 1: Embossed (Plastic) Carrier Tape Dimensions
P2
T
T2
ØDo
Po
[10 pitches cumulative
tolerance on tape ±0.2 mm]
E1
Ao
F
Ko
B1
E2
Bo
S1
W
P1
T1
Center Lines of Cavity
ØD 1
Cover Tape
B 1 is for tape feeder reference only,
including draft concentric about B o.
Embossment
For cavity size,
see Note 1 Table 6
User Direction of Unreeling
Table 6 - Embossed (Plastic) Carrier Tape Dimensions
(Metric will govern)
Constant Dimensions — Millimeters (Inches)
Tape Size
D0
8mm
12mm
1.5 +0.10/-0.0
(0.059 +0.004/-0.0)
16mm
D1 Min.
Note 1
1.0
(0.039)
1.5
(0.059)
E1
P0
P2
1.75 ± 0.10
(0.069 ± 0.004)
4.0 ± 0.10
(0.157 ± 0.004)
2.0 ± 0.05
(0.079 ± 0.002)
R Ref.
Note 2
25.0
(0.984)
30
(1.181)
S1 Min.
Note 3
T Max.
T1 Max.
0.600
(0.024)
0.600
(0.024)
0.100
(0.004)
Variable Dimensions — Millimeters (Inches)
Tape Size
Pitch
8mm
Single (4mm)
12mm
Single (4mm) &
Double (8mm)
16mm
Triple (12mm)
B1 Max.
Note 4
4.35
(0.171)
8.2
(0.323)
12.1
(0.476)
E2 Min.
F
P1
T2 Max
W Max
A0,B0 & K0
6.25
(0.246)
10.25
(0.404)
14.25
(0.561)
3.5 ± 0.05
(0.138 ± 0.002)
5.5 ± 0.05
(0.217 ± 0.002)
5.5 ± 0.05
(0.217 ± 0.002)
4.0 ± 0.10
(0.157 ± 0.004)
8.0 ± 0.10
(0.315 ± 0.004)
8.0 ± 0.10
(0.315 ± 0.004)
2.5
(0.098)
4.6
(0.181)
4.6
(0.181)
8.3
(0.327)
12.3
(0.484)
16.3
(0.642)
Note 5
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and
hole location shall be applied independent of each other.
2. The tape with or without components shall pass around R without damage (see Figure 5).
3. If S1<1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Document 481 paragraph 4.3 (b)).
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity defined by A0, B0 and K0 shall surround the component with sufficient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12mm tapes and 10° maximum for 16mm tapes (see Figure 3).
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8mm and 12mm wide tape and to 1.0mm maximum for 16mm tape (see Figure 4)
(e) For KPS Series product A0 and B0 are measured on a plane 0.3mm above the bottom of the pocket.
(f) see Addendum in EIA Document 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1020-4 • 6/22/2010
10
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Figure 2 – Punched (Paper) Carrier Tape Dimensions
P2
T
Po
ØDo
[10 pitches cumulative
tolerance on tape ±0.2 mm]
A0
F
P1
T1
T1
Top Cover Tape
W
E2
B0
Bottom Cover Tape
E1
G
Cavity Size,
See
Note 1, Table 7
Center Lines of Cavity
Bottom Cover Tape
User Direction of Unreeling
Table 7 - Punched (Paper) Carrier Tape Dimensions
(Metric will govern)
Constant Dimensions — Millimeters (Inches)
Tape Size
D0
E1
P0
P2
T1Max
G Min
8mm
1.5 +0.10-0.0
(0.059 +0.004, -0.0)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05
(0.079 ±0.002)
0.10
(.004) Max.
0.75
(.030)
R Ref.
Note 2
25
(.984)
T Max
W Max
A0 B 0
1.1
(0.098)
8.3
(0.327)
8.3
(0.327)
Variable Dimensions — Millimeters (Inches)
Tape Size
Pitch
8mm
Half (2mm)
8mm
Single (4mm)
E2 Min
6.25
(0.246)
F
3.5 ± 0.05
(0.138 ± 0.002)
P1
2.0 ± 0.05
(0.079 ± 0.002)
4.0 ± 0.10
(0.157 ± 0.004)
Note 5
1. The cavity defined by A0, B0 and T shall surround the component with sufficient clearance that:
a) the component does not protrude beyond either surface of the carrier tape.
b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).
e) see Addendum in EIA Document 481 for standards relating to more precise taping requirements.
2. The tape with or without components shall pass around R without damage (see Figure 5).
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1020-4 • 6/22/2010
11
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 Kg Minimum.
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape Width
Peel Strength
8mm
12mm & 16mm
0.1 Newton to 1.0 Newton (10g to 100g)
0.1 Newton to 1.3 Newton (10g to 130g)
The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be 165° to 180° from the plane of the
carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300±10 mm/minute.
3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA-556 and EIA-624.
Figure 3 – Maximum component rotation
°
T
Maximum Component Rotation
Top View
Maximum Component Rotation
Side View
Typical Pocket Centerline
Tape
Width (mm)
8,12
16-200
Bo
Maximum
Rotation (
20
10
°
T)
Typical Component Centerline
Ao
°
s
Tape
Width (mm)
8,12
16-56
72-200
Maximum
Rotation (
20
10
5
°
S)
Figure 4 – Maximum lateral movement
8mm & 12mm Tape
16mm Tape
0.5 mm maximum
0.5 mm maximum
1.0 mm maximum
1.0 mm maximum
Figure 5 – Bending radius
Embossed
Carrier
R
Punched
Carrier
Bending
Radius
R
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1020-4 • 6/22/2010
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Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Figure 6 – Reel Dimensions
Full Radius,
See Note
W3 (Includes
Access Hole at
Slot Location
(Ø 40 mm min.)
flange distortion
at outer edge)
W2 (Measured at hub)
D
A
(See Note)
N
C
(Arbor hole
diameter)
B
(see Note)
W1 (Measured at hub)
If present,
tape slot in core
for tape start:
2.5 mm min. width x
10.0 mm min. depth
Note: Drive spokes optional; if used, dimensions B and D shall apply.
Table 8 – Reel Dimensions
(Metric Dimensions Will Govern)
Constant Dimensions — Millimeters (Inches)
Tape Size
A
B Min
C
D Min
8mm
178 ± 0.20
(7.008 ± 0.008)
or
330 ± 0.20
(13.000 ± 0.008)
1.5
(0.059)
13.0 +0.5/-0.2
(0.521 +0.02/-0.008)
20.2
(0.795)
12mm
16mm
Variable Dimensions — Millimeters (Inches)
Tape Size
N Min
8mm
12mm
16mm
50
(1.969)
W1
8.4 +1.5/-0.0
(0.331 +0.059/-0.0)
12.4 +2.0/-0.0
(0.488 +0.078/-0.0)
16.4 +2.0/-0.0
(0.646 +0.078/-0.0)
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
W2 Max
14.4
(0.567)
18.4
(0.724)
22.4
(0.882)
W3
Shall Accommodate Tape
Width Without Interference
C1020-4 • 6/22/2010
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Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
Figure 7 – Tape leader & trailer dimensions
Embossed Carrier
Carrier Tape
Punched Carrier
8 mm & 12 mm only
Round Sprocket Holes
END
START
Top Cover Tape
Elongated Sprocket Holes
(32 mm tape and wider)
Trailer
160 mm minimum,
Components
100 mm Min.
Leader
400 mm Minimum,
Top Cover Tape
Figure 8 – Maximum camber
Elongated sprocket holes
(32 mm & wider tapes)
Carrier Tape
Round Sprocket Holes
1 mm maximum, either direction
Straight Edge
250 mm
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1020-4 • 6/22/2010
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Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
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C1020-4 • 6/22/2010
15
Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric)
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Headquarters
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www.kemet.com
Tel: 864-963-6300
Fax: 864-963-6521
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Note: KEMET reserves the right to modify minor details of internal and external construction at any time in the interest of product improvement. KEMET does not
assume any responsibility for infringement that might result from the use of KEMET Capacitors in potential circuit designs. KEMET is a registered trademark of
KEMET Electronics Corporation.
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C1020-4 • 6/22/2010
16
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