Fairchild CD4060BCM 14-stage ripple carry binary counters . 12-stage ripple carry binary counters . 14-stage ripple carry binary counter Datasheet

Revised January 2004
CD4020BC • CD4040BC • CD4060BC
14-Stage Ripple Carry Binary Counters •
12-Stage Ripple Carry Binary Counters •
14-Stage Ripple Carry Binary Counters
General Description
Features
The CD4020BC, CD4060BC are 14-stage ripple carry
binary counters, and the CD4040BC is a 12-stage ripple
carry binary counter. The counters are advanced one count
on the negative transition of each clock pulse. The
counters are reset to the zero state by a logical “1” at the
reset input independent of clock.
■ Wide supply voltage range: 3.0V to 15V
■ High noise immunity: 0.45 VDD (typ.)
■ Low power TTL compatibility:
or 1 driving 74LS
Fan out of 2 driving 74L
■ Medium speed operation: 8 MHz typ. at VDD = 10V
■ Schmitt trigger clock input
Ordering Code:
Order Number
CD4020BCM
Package Number
Package Description
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4020BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
CD4040BCM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4040BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
CD4060BCM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4060BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP and SOIC
CD4020BC
Pin Assignments for DIP and SOIC
CD4040BC
Top View
Top View
© 2004 Fairchild Semiconductor Corporation
DS005953
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CD4020BC • CD4040BC • CD4060BC 14-Stage Ripple Carry Binary Counters • 12-Stage Ripple Carry Binary
Counters • 14-Stage Ripple Carry Binary Counters
October 1987
CD4020BC • CD4040BC • CD4060BC
Connection Diagrams
(Continued)
Pin Assignments for DIP and SOIC
CD4060BC
Top View
Schematic Diagrams
CD4020BC
CD4040BC
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2
CD4020BC • CD4040BC • CD4060BC
Schematic Diagrams
(Continued)
CD4060BC
CD4060B Typical Oscillator Connections
RC Oscillator
Crystal Oscillator
3
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CD4020BC • CD4040BC • CD4060BC
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
(Note 2)
Supply Voltage (VDD )
Input Voltage (VIN)
Storage Temperature Range (TS)
−0.5V to +18V
+3V to +15V
Supply Voltage (VDD)
−0.5V to VDD +0.5V
Input Voltage (VIN)
−65°C to +150 °C
0V to VDD
Operating Temperature Range (TA)
−55°C to +125°C
Package Dissipation (PD)
Dual-In-Line
700 mW
Small Outline
500 mW
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. They are not meant to imply
that the devices should be operated at these limits. The tables of “Recommended Operating Conditions” and “Electrical Characteristics” provide conditions for actual device operation.
Lead Temperature (TL)
260 °C
(Soldering, 10 seconds)
Note 2: VSS = 0V unless otherwise specified.
DC Electrical Characteristics (Note 2)
Symbol
IDD
VOL
VOH
VIL
VIH
IOL
IOH
IIN
Parameter
Quiescent Device Current
LOW Level Output Voltage
HIGH Level Output Voltage
LOW Level Input Voltage
−55°C
Conditions
Min
+25°C
Max
Min
Typ
+125°C
Max
Min
VDD = 5V, VIN = VDD or VSS
5
5
150
VDD = 10V, VIN = V DD or VSS
10
10
300
VDD = 15V, VIN = V DD or VSS
20
20
600
VDD = 5V
0.05
0
0.05
0.05
VDD = 10V
0.05
0
0.05
0.05
VDD = 15V
0.05
0
0.05
0.05
VDD = 5V
4.95
4.95
5
4.95
VDD = 10V
9.95
9.95
10
9.95
VDD = 15V
14.95
14.95
15
14.95
1.5
2
1.5
1.5
VDD = 10V, VO = 1.0V or 9.0V
3.0
4
3.0
3.0
VDD = 15V, VO = 1.5V or 13.5V
4.0
6
4.0
4.0
3.5
3.5
3
3.5
VDD = 10V, VO = 1.0V or 9.0V
7.0
7.0
6
7.0
VDD = 15V, VO = 1.5V or 13.5V
11.0
11.0
9
11.0
LOW Level Output Current
VDD = 5V, VO = 0.4V
0.64
0.51
0.88
0.36
(Note 3)
VDD = 10V, VO = 0.5V
1.6
1.3
2.25
0.9
VDD = 15V, VO = 1.5V
4.2
3.4
8.8
2.4
HIGH Level Output Current
VDD = 5V, VO = 4.6V
−0.64
−0.51
−0.88
−0.36
(Note 3)
VDD = 10V, VO = 9.5V
−1.6
−1.3
−2.25
−0.9
VDD = 15V, VO = 13.5V
−4.2
−3.4
−8.8
−2.4
Input Current
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V
V
mA
mA
−0.1
−10−5
−0.1
−1.0
VDD = 15V, VIN = 15V
0.1
10−5
0.1
1.0
4
µA
V
VDD = 15V, VIN = 0V
Note 3: Data does not apply to oscillator points φ0 and φ0 of CD4060BC. I OH and IOL are tested one output at a time.
Units
V
VDD = 5V, VO = 0.5V or 4.5V
VDD = 5V, VO = 0.5V or 4.5V
HIGH Level Input Voltage
Max
µA
(Note 4)
CD4020BC, CD4040BC TA = 25°C, CL = 50 pF, RL = 200k, tr = tf = 20 ns, unless otherwise noted
Symbol
tPHL1, tPLH1
tPHL, tPLH
tTHL, tTLH
tWL, tWH
trCL, tfCL
fCL
tPHL(R)
tWH(R)
Parameter
Propagation Delay Time to Q1
Typ
Max
VDD = 5V
Conditions
Min
250
550
VDD = 10V
100
210
VDD = 15V
75
150
Interstage Propagation Delay Time
VDD = 5V
150
330
from Qn to Qn+1
VDD = 10V
60
125
VDD = 15V
45
90
VDD = 5V
100
200
VDD = 10V
50
100
VDD = 15V
40
80
VDD = 5V
125
335
VDD = 10V
50
125
VDD = 15V
40
100
Transition Time
Minimum Clock Pulse Width
Maximum Clock Rise and Fall Time VDD = 5V
Maximum Clock Frequency
Reset Propagation Delay
Minimum Reset Pulse Width
CIN
Average Input Capacitance
CPD
Power Dissipation Capacitance
Units
ns
ns
ns
ns
No Limit
VDD = 10V
No Limit
VDD = 15V
No Limit
VDD = 5V
1.5
4
VDD = 10V
4
10
VDD = 15V
5
12
MHz
VDD = 5V
200
450
VDD = 10V
100
210
VDD = 15V
80
170
VDD = 5V
200
450
VDD = 10V
100
210
VDD = 15V
80
170
5
7.5
Any Input
50
ns
ns
ns
pF
pF
Note 4: AC Parameters are guaranteed by DC correlated testing.
5
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CD4020BC • CD4040BC • CD4060BC
AC Electrical Characteristics
CD4020BC • CD4040BC • CD4060BC
AC Electrical Characteristics
(Note 5)
CD4060BC TA = 25°C, CL = 50 pF, RL = 200k, tr = tf = 20 ns, unless otherwise noted
Symbol
Parameter
tPHL4, tPLH4
Propagation Delay Time to Q4
tPHL, tPLH
tTHL, tTLH
Conditions
Min
Max
550
1300
VDD = 10V
250
525
VDD = 15V
200
400
Interstage Propagation Delay Time
VDD = 5V
150
330
from Qn to Qn+1
VDD = 10V
60
125
VDD = 15V
45
90
VDD = 5V
100
200
VDD = 10V
50
100
VDD = 15V
40
80
Transition Time
tWL, tWH
Typ
VDD = 5V
Minimum Clock Pulse Width
VDD = 5V
170
500
VDD = 10V
65
170
VDD = 15V
50
125
Maximum Clock Rise and Fall Time VDD = 5V
trCL, tfCL
fCL
Maximum Clock Frequency
tPHL(R)
Reset Propagation Delay
tWH(R)
Minimum Reset Pulse Width
CIN
Average Input Capacitance
CPD
Power Dissipation Capacitance
No Limit
VDD = 15V
No Limit
VDD = 5V
1
3
VDD = 10V
3
8
VDD = 15V
4
10
VDD = 5V
200
450
100
210
VDD = 15V
80
170
VDD = 5V
200
450
VDD = 10V
100
210
VDD = 15V
80
170
5
7.5
Any Input
50
RC Oscillator Notes:
2. RC Oscillator applications are not recommended at supply voltages below 7.0V for R1 < 50 kΩ
1
at VCC = 10V
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ns
ns
ns
6
ns
MHz
VDD = 10V
1. R2 = 2 R1 to 10 R1
2.2 R1 CX
ns
No Limit
VDD = 10V
Note 5: AC Parameters are guaranteed by DC correlated testing.
3. f ≈
Units
ns
ns
pF
pF
CD4020BC • CD4040BC • CD4060BC
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
7
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CD4020BC • CD4040BC • CD4060BC 14-Stage Ripple Carry Binary Counters • 12-Stage Ripple Carry Binary
Counters • 14-Stage Ripple Carry Binary Counters
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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8
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