TI CD74HC158M High speed cmos logic quad 2-input multiplexer Datasheet

[ /Title
(CD74H
C157,
CD74H
CT157,
CD74H
C158,
CD74H
CT158)
/Subject
(High
Speed
Data sheet acquired from Harris Semiconductor
SCHS153
CD74HC157, CD74HCT157,
CD74HC158, CD74HCT158
High Speed CMOS Logic
Quad 2-Input Multiplexers
September 1997
Features
• Common Select Inputs
• Separate Enable Inputs
• Buffered inputs and Outputs
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at
VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Pinout
CD74HC157, CD74HCT157, CD74HC158, CD74HCT158
(PDIP, SOIC)
TOP VIEW
S 1
16 VCC
1I0 2
15 E
1I1 3
14 4I0
1Y 4
13 4I1
2I0 5
12 4Y
2I1 6
11 3I0
2Y 7
10 3I1
GND 8
9 3Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
1
File Number
1642.2
CD74HC157, CD74HCT157, CD74HC158, CD74HCT158
Description
The Harris CD74HC157, CD74HCT157, CD74HC158 and
CD74HCT158 are quad 2-input multiplexers which select
four bits of data from two sources under the control of a
common Select input (S). The Enable input (E) is active Low.
When (E) is High, all of the outputs in the 158, the inverting
type, (1Y-4Y) are forced High and in the 157, the noninverting type, all of the outputs (1Y-4Y) are forced Low,
regardless of all other input conditions.
Moving data from two groups of registers to four common
output busses is a common use of these devices. The state
of the Select input determines the particular register from
which the data comes. They can also be used as function
generators.
Ordering Information
PART NUMBER
TEMP. RANGE (oC)
PACKAGE
PKG.
NO.
CD74HC157E
-55 to 125
16 Ld PDIP
E16.3
CD74HCT157E
-55 to 125
16 Ld PDIP
E16.3
CD74HC158E
-55 to 125
16 Ld PDIP
E16.3
CD74HCT158E
-55 to 125
16 Ld PDIP
E16.3
CD74HC157M
-55 to 125
16 Ld SOIC
M16.15
CD74HCT157M
-55 to 125
16 Ld SOIC
M16.15
CD74HC158M
-55 to 125
16 Ld SOIC
M16.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer or die for this part number is available which meets all electrical specifications. Please contact your local sales office or
Harris customer service for ordering information.
2
CD74HC157, CD74HCT157, CD74HC158, CD74HCT158
Functional Diagram
HC/HCT HC/HCT
157
158
1I0
1I1
2I0
2I1
3I0
3I1
4I0
4I1
2
4
3
5
1Y
1Y
2Y
2Y
3Y
3Y
4Y
4Y
7
6
11
9
10
14
12
13
1
15
S
E
TRUTH TABLE
OUTPUT
ENABLE
SELECT
INPUT
E
S
I0
H
X
L
DATA INPUTS
157
158
I1
Y
Y
X
X
L
H
L
L
X
L
H
L
L
H
X
H
L
L
H
X
L
L
H
L
H
X
H
H
L
NOTE: H = High Voltage Level, L = Low Voltage Level, X = Don’t Care
3
CD74HC157, CD74HCT157, CD74HC158, CD74HCT158
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, ICC or IGND . . . . . . . . . . . . . . . . . .±50mA
Thermal Resistance (Typical, Note 3)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
115
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, VCC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θJA is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
TEST
CONDITIONS
PARAMETER
25oC
-40oC TO 85oC -55oC TO 125oC
SYMBOL
VI (V)
IO (mA)
VCC
(V)
VIH
-
-
2
1.5
-
-
1.5
4.5
3.15
-
-
3.15
-
3.15
-
V
6
4.2
-
-
4.2
-
4.2
-
V
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
-
1.5
-
V
HC TYPES
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
CMOS Loads
VIL
VOH
-
VIH or VIL
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
VOL
VIH or VIL
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
Quiescent Device
Current
-
2
-
-
0.5
-
0.5
-
0.5
V
4.5
-
-
1.35
-
1.35
-
1.35
V
6
-
-
1.8
-
1.8
-
1.8
V
-0.02
2
1.9
-
-
1.9
-
1.9
-
V
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
-0.02
6
5.9
-
-
5.9
-
5.9
-
V
-
-
-
-
-
-
-
-
-
V
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
-5.2
6
5.48
-
-
5.34
-
5.2
-
V
0.02
2
-
-
0.1
-
0.1
-
0.1
V
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
0.02
6
-
-
0.1
-
0.1
-
0.1
V
-
-
-
-
-
-
-
-
-
V
4
4.5
-
-
0.26
-
0.33
-
0.4
V
5.2
6
-
-
0.26
-
0.33
-
0.4
V
II
VCC or
GND
-
6
-
-
±0.1
-
±1
-
±1
µA
ICC
VCC or
GND
0
6
-
-
8
-
80
-
160
µA
4
CD74HC157, CD74HCT157, CD74HC158, CD74HCT158
DC Electrical Specifications
(Continued)
TEST
CONDITIONS
PARAMETER
SYMBOL
VI (V)
IO (mA)
High Level Input
Voltage
VIH
-
-
Low Level Input
Voltage
VIL
-
High Level Output
Voltage
CMOS Loads
VOH
VIH or VIL
VCC
(V)
25oC
-40oC TO 85oC -55oC TO 125oC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
4.5 to
5.5
2
-
-
2
-
2
-
V
-
4.5 to
5.5
-
-
0.8
-
0.8
-
0.8
V
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
4
4.5
-
-
0.26
-
0.33
-
0.4
V
±0.1
-
±1
-
±1
µA
HCT TYPES
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
VOL
VIH or VIL
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
Quiescent Device
Current
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
II
VCC and
GND
0
5.5
-
ICC
VCC or
GND
0
5.5
-
-
8
-
80
-
160
µA
∆ICC
VCC
-2.1
-
4.5 to
5.5
-
100
360
-
450
-
490
µA
NOTE: For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA.
HCT Input Loading Table
UNIT LOADS
INPUT
HCT157
HCT158
I (All)
0.95
0.4
E
0.6
0.6
S
3
2.8
NOTE: Unit Load is ∆ICC limit specified in DC Electrical Table, e.g.,
360µA max at 25oC.
Switching Specifications Input tr, tf = 6ns
PARAMETER
SYMBOL
TEST
CONDITIONS
25oC
-40oC TO 85oC
-55oC TO 125oC
VCC
(V)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
2
-
-
125
-
155
-
190
ns
HC/HCT157 TYPES
Propagation Delay (Figure 1) tPLH, tPHL CL = 50pF
Data to Output
HC157
CL =15pF
4.5
-
-
25
-
31
-
38
ns
5
-
10
-
-
-
-
-
ns
-
12
-
-
-
-
-
ns
-
-
21
-
26
-
32
ns
HCT157
CL = 50pF
6
5
CD74HC157, CD74HCT157, CD74HC158, CD74HCT158
Switching Specifications Input tr, tf = 6ns
PARAMETER
SYMBOL
Enable to Output
(Continued)
TEST
CONDITIONS
tPLH, tPHL CL = 50pF
HC157
CL =15pF
25oC
Select to Output
tPLH, tPHL CL = 50pF
-55oC TO 125oC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
2
-
-
135
-
170
-
205
ns
4.5
-
-
27
-
34
-
41
ns
5
-
11
-
-
-
-
-
ns
-
12
-
-
-
-
-
ns
6
-
-
23
-
29
-
35
ns
HCT157
CL = 50pF
-40oC TO 85oC
VCC
(V)
2
-
-
145
-
180
-
220
ns
4.5
-
-
29
-
36
-
44
ns
5
-
12
-
-
-
-
-
ns
-
15
-
-
-
-
-
ns
-
-
25
-
31
-
38
ns
HC157
-
62
-
-
-
-
-
pF
HCT157
-
70
-
-
-
-
-
pF
2
-
-
140
-
175
-
210
ns
4.5
-
-
28
-
35
-
42
CL =15pF
5
-
11
-
-
-
-
-
-
13
-
-
-
-
-
ns
CL = 50pF
6
-
-
24
-
30
-
36
ns
tPLH, tPHL CL = 50pF
2
-
-
160
-
200
-
240
ns
4.5
-
-
32
-
40
-
48
ns
5
-
13
-
-
-
-
-
ns
-
15
-
-
-
-
-
ns
HC157
CL =15pF
HCT157
CL = 50pF
Power Dissipation
Capacitance (Notes 4, 5)
CPD
-
6
5
HC/HCT158 TYPES
Data to Output
tPLH, tPHL CL = 50pF
HC158
HCT 158
Enable to Output
HC158
CL =15pF
HCT 158
Select to Output
CL = 50pF
6
-
-
27
-
34
-
41
ns
tPLH, tPHL CL = 50pF
2
-
-
150
-
190
-
225
ns
HC158
CL =15pF
4.5
-
-
30
-
38
-
45
ns
5
-
12
-
-
-
-
-
ns
-
14
-
-
-
-
-
ns
6
-
-
26
-
33
-
38
ns
HCT 158
CL = 50pF
Output Transition Time
2
-
-
75
-
95
-
110
ns
4.5
-
-
15
-
19
-
22
ns
6
-
-
13
-
16
-
19
ns
HC158
-
35
-
-
-
-
-
pF
HCT 158
-
35
-
-
-
-
-
pF
-
-
10
-
10
-
10
pF
Power Dissipation
Capacitance (Notes 4, 5)
Input Capacitance
ns
tTLH, tTHL
CPD
CIN
CL = 50pF
-
CL = 50pF
5
-
NOTES:
4. CPD is used to determine the dynamic power consumption, per multiplexer.
5. PD = VCC2 fi (CPD + CL) where fi = input frequency, CL = output load capacitance, VCC = supply voltage.
6
Test Circuits and Waveforms
tr = 6ns
tf = 6ns
VCC
90%
50%
10%
INPUT
GND
tTLH
GND
tTHL
90%
50%
10%
INVERTING
OUTPUT
3V
2.7V
1.3V
0.3V
INPUT
tTHL
tPHL
tf = 6ns
tr = 6ns
tTLH
90%
1.3V
10%
INVERTING
OUTPUT
tPHL
tPLH
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGATION DELAY TIMES, COMBINATION LOGIC
tPLH
FIGURE 2. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
7
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