CEM8206 Feb. 2003 Dual N-Channel Enhancement Mode Field Effect Transistor FEATURES 5 20V , 6A , RDS(ON)=20m Ω @VGS=4.5V. RDS(ON)=30m Ω @VGS=2.5V. D1 D1 D2 D2 8 7 6 5 1 2 3 S1 G1 S2 Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Surface Mount Package. SO-8 4 G2 1 ABSOLUTE MAXIMUM RATINGS (TA=25 C unless otherwise noted) Symbol Limit Unit Drain-Source Voltage VDS 20 V Gate-Source Voltage VGS Ć12 V Parameter Drain Current-Continuous a -Pulsed ID Ć6 A IDM Ć24 A Drain-Source Diode Forward Current a IS 6 A Maximum Power Dissipation a PD 2 W TJ, TSTG -55 to 150 C Operating Junction and Storage Temperature Range THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient a RįJA 5-73 62.5 C/W CEM8206 ELECTRICAL CHARACTERISTICS (TA=25 C unless otherwise noted) Parameter 5 Min Typ C Max Unit Symbol Condition Drain-Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA Zero Gate Voltage Drain Current IDSS VDS = 20V, VGS = 0V 1 µA Gate-Body Leakage IGSS VGS =Ć12V, VDS = 0V Ć100 nA Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250µA 1.5 V Drain-Source On-State Resistance RDS(ON) OFF CHARACTERISTICS 20 V ON CHARACTERISTICS b ID(ON) gFS On-State Drain Current Forward Transconductance 0.5 VGS = 4.5V, ID = 6.0A 17 20 mΩ VGS = 2.5V, ID = 5.2A 23 30 mΩ VDS = 5V, VGS = 4.5V VDS =10V, ID = 6.0A 10 7 A 16 S 950 PF 450 PF 135 PF c DYNAMIC CHARACTERISTICS Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VDS =8V, VGS = 0V f =1.0MHZ c SWITCHING CHARACTERISTICS Turn-On Delay Time Rise Time Turn-Off Delay Time tD(ON) tr tD(OFF) VDD = 10V, ID = 1A, VGS = 4.5V, RGEN = 6Ω 20 40 ns 20 40 ns 72 130 ns Fall Time tf 20 40 ns Total Gate Charge Qg 15 20 nC Gate-Source Charge Qgs Gate-Drain Charge Qgd VDS =10V, ID = 6A, VGS =4.5V 5-74 3.4 nC 1.2 nC CEM8206 ELECTRICAL CHARACTERISTICS (TA=25 C unless otherwise noted) Parameter C Min Typ Max Unit Condition Symbol DRAIN-SOURCE DIODE CHARACTERISTICS b Diode Forward Voltage 5 VGS = 0V, Is =1.7A VSD 0.75 1.2 Notes a.Surface Mounted on FR4 Board, t ś10sec. b.Pulse Test:Pulse Width ś300ijs, Duty Cycle ś 2%. c.Guaranteed by design, not subject to production testing. 25 20 VGS=4.5,3.5,2.5V 20 VGS=2.0V ID, Drain Current (A) ID, Drain Current(A) 16 12 8 4 VGS=1.5V 0.5 1.0 1.5 2.5 2.0 10 5 Tj=125 C 0 0.0 0 0 15 3.0 VDS, Drain-to-Source Voltage (V) 1 1.5 2 2.5 3 VGS, Gate-to-Source Voltage (V) Figure 1. Output Characteristics Figure 2. Transfer Characteristics 1.80 RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) 2400 2000 C, Capacitance (pF) 0.5 25 C -55 C 1600 1200 Ciss 800 Coss 400 Crss 0 0 2 4 6 8 10 12 1.60 ID=6.0A VGS=4.5V 1.40 1.20 1.00 0.80 0.60 -50 -25 0 25 50 75 100 125 150 TJ, Junction Temperature( C) VDS, Drain-to Source Voltage (V) Figure 4. On-Resistance Variation with Temperature Figure 3. Capacitance 5-75 V VDS=VGS ID=250ӴA 1.40 1.20 1.00 0.80 0.60 0.40 -50 -25 0 25 50 75 100 125 150 BVDSS, Normalized Drain-Source Breakdown Voltage 1.60 1.15 ID=250ӴA 1.10 1.05 1.00 0.95 0.90 0.85 -50 -25 50 25 75 100 125 150 Figure 6. Breakdown Voltage Variation with Temperature Figure 5. Gate Threshold Variation with Temperature 50 30 25 Is, Source-drain current (A) gFS, Transconductance (S) 0 Tj, Junction Temperature ( C) Tj, Junction Temperature ( C) 20 15 10 VDS=10V 5 10 1 0.1 0 0 3 6 9 12 15 0.4 0.6 IDS, Drain-Source Current (A) 0.8 1.0 1.2 VSD, Body Diode Forward Voltage (V) Figure 7. Transconductance Variation with Drain Current Figure 8. Body Diode Forward Voltage Variation with Source Current 5 VDS=4.5V ID=6A 4 ID, Drain Current (A) VGS, Gate to Source Voltage (V) 5 Vth, Normalized Gate-Source Threshold Voltage CEM8206 3 2 1 10 10 1 0 2 4 6 10 12 14 16 Qg, Total Gate Charge (nC) ON )L im it 10 10 0 10 -1 10 8 S( 10 -2 0 RD DC 1s 0m 1m m s s s s TA=25 C Tj=150 C Single Pulse 10 -1 10 1 10 0 VDS, Drain-Source Voltage (V) Figure 10. Maximum Safe Operating Area Figure 9. Gate Charge 5-76 10 1 CEM8206 VDD t on V IN D td(off) 5 tf 90% 90% VOUT VOUT VGS RGEN toff tr td(on) RL 10% INVERTED 10% G 90% VIN S 50% 50% 10% PULSE WIDTH Figure 12. Switching Waveforms Figure 11. Switching Test Circuit r(t),Normalized Effective Transient Thermal Impedance 102 0 D=0.5 1 Duty Cycle=0.5 0.2 10 -1 0.1 0.2 0.05 10 PDM 0.1 0.02 0.1 -2 t1 t2 t2 1. RįJA (t)=r * R(t)=r įJA (t) * RįJA 1. (t) RįJA 2. RįJA=See Datasheet 2. R įJA=See Datasheet RįJA (t)PDM* RįJA (t) 3. TJM-TA =3.P*TJMTA = 4. Duty Cycle, D=t1/t2 4. Duty Cycle, D=t1/t2 0.02 Pulse Single Single Pulse 0.01 10 PDM t1 0.05 0.01 -3 -4 10 -3-3 10 10 -2 -2 10 10 10 -1 10 -1 10 0 1 10 1 Square Wave Pulse Duration (sec) Figure 13. Normalized Thermal Transient Impedance Curve 5-77 10 10 2 100