N CLC452 Single Supply, Low-Power, High Output, Current Feedback Amplifier General Description Features The CLC452 has a new output stage that delivers high output drive current (100mA), but consumes minimal quiescent supply current (3.0mA) from a single 5V supply. Its current feedback architecture, fabricated in an advanced complementary bipolar process, maintains consistent performance over a wide range of gains and signal levels, and has a linear-phase response up to one half of the -3dB frequency. ■ ■ ■ ■ ■ ■ ■ ■ The CLC452 offers superior dynamic performance with a 130MHz small-signal bandwidth, 400V/µs slew rate and 4.5ns rise/fall times (2Vstep). The combination of low quiescent power, high output current drive, and high-speed performance make the CLC452 well suited for many battery-powered personal communication/computing systems. ■ 100mA output current 3.0mA supply current 130MHz bandwidth (Av = +2) -78/-85dBc HD2/HD3 (1MHz) 25ns settling to 0.05% 400V/µs slew rate Stable for capacitive loads up to 1000pF Single 5V to ±5V supplies Available in Tiny SOT23-5 package Applications ■ ■ ■ ■ The ability to drive low-impedance, highly capacitive loads, makes the CLC452 ideal for single ended cable applications. It also drives low impedance loads with minimum distortion. The CLC452 will drive a 100Ω load with only -75/-74dBc second/third harmonic distortion (Av = +2, Vout = 2Vpp, f = 1MHz). With a 25Ω load, and the same conditions, it produces only -65/-77dBc second/third harmonic distortion. It is also optimized for driving high currents into single-ended transformers and coils. ■ ■ ■ Coaxial cable driver Twisted pair driver Transformer/Coil Driver High capacitive load driver Video line driver Portable/battery-powered applications A/D driver Maximum Output Voltage vs. RL 10 Output Voltage (Vpp) 9 When driving the input of high-resolution A/D converters, the CLC452 provides excellent -78/-85dBc second/third harmonic distortion (Av = +2, Vout = 2Vpp, f = 1MHz, RL = 1kΩ) and fast settling time. 8 VCC = ±5V 7 6 5 4 3 Vs = +5V 2 1 Available in SOT23-5, the CLC452 is ideal for applications where space is critical. +5V 5kΩ + 7 0.1µF CLC452 2 - 4 75Ω 6 1kΩ Response After 10m of Cable Vin = 10MHz, 0.5Vpp 0.1µF 10m of 75Ω Coaxial Cable Vo 100mV/div 5kΩ 3 75Ω 20ns/div 1kΩ 0.1µF Vo VCC Pinout Pinout SOT23-5 DIP & SOIC VEE Vnon-inv © 1999 National Semiconductor Corporation Printed in the U.S.A. 1000 Single Supply Cable Driver + 0.1µF 100 RL (Ω) Typical Application 6.8µF Vin 10 CLC452 Single Supply, Low-Power, High Output, Current Feedback Amp June 1999 Vinv VEE http://www.national.com +5V Electrical Characteristics (A v PARAMETERS Ambient Temperature = +2, Rf = 1kΩ, RL = 100Ω, Vs = +5V1, Vcm = VEE + (Vs/2), RL tied to Vcm, unless specified) CONDITIONS CLC452AJ TYP +25°C MIN/MAX RATINGS +25°C 0 to 70°C -40 to 85°C UNITS FREQUENCY DOMAIN RESPONSE -3dB bandwidth Vo = 0.5Vpp Vo = 2.0Vpp -0.1dB bandwidth Vo = 0.5Vpp gain peaking <200MHz, Vo = 0.5Vpp gain rolloff <30MHz, Vo = 0.5Vpp linear phase deviation <30MHz, Vo = 0.5Vpp 130 95 30 0 0.1 0.1 95 80 25 0.5 0.3 0.2 90 77 20 0.9 0.3 0.3 85 75 20 1.0 0.3 0.3 MHz MHz MHz dB dB deg TIME DOMAIN RESPONSE rise and fall time settling time to 0.05% overshoot slew rate 4.5 25 11 400 6.0 – 15 300 6.4 – 18 275 6.8 – 18 260 ns ns % V/µs 2V step 1V step 2V step 2V step DISTORTION AND NOISE RESPONSE 2Vpp, 1MHz 2nd harmonic distortion 2Vpp, 1MHz; RL = 1kΩ 2Vpp, 5MHz 3rd harmonic distortion 2Vpp, 1MHz 2Vpp, 1MHz; RL = 1kΩ 2Vpp, 5MHz equivalent input noise voltage (eni) >1MHz non-inverting current (ibn) >1MHz inverting current (ibi) >1MHz -75 -78 -65 -74 -85 -60 -69 -70 -58 -70 -75 -55 -67 -68 -56 -68 -73 -53 -67 -68 -56 -68 -73 -53 dBc dBc dBc dBc dBc dBc 2.8 7.5 10.5 3.5 10 14 3.8 11 15 3.8 11 15 nV/√Hz pA/√Hz pA/√Hz STATIC DC PERFORMANCE input offset voltage average drift input bias current (non-inverting) average drift input bias current (inverting) average drift power supply rejection ratio common-mode rejection ratio supply current 1 8 6 40 6 25 48 51 3.0 4 – 18 – 14 – 45 48 3.4 6 – 22 – 16 – 43 46 3.6 6 – 24 – 17 – 43 46 3.6 mV µV/˚C µA nA/˚C µA nA/˚C dB dB mA 0.39 1.5 4.2 0.8 4.0 1.0 4.1 0.9 100 70 0.28 2.3 4.1 0.9 3.9 1.1 4.0 1.0 80 105 0.25 2.3 4.0 1.0 3.8 1.2 4.0 1.0 65 105 0.25 2.3 4.0 1.0 3.8 1.2 3.9 1.1 40 140 MΩ pF V V V V V V mA mΩ DC DC RL= ∞ MISCELLANEOUS PERFORMANCE input resistance (non-inverting) input capacitance (non-inverting) input voltage range, High input voltage range, Low output voltage range, High RL = 100Ω output voltage range, Low RL = 100Ω output voltage range, High RL = ∞ output voltage range, Low RL = ∞ output current output resistance, closed loop DC NOTES A A A A B Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Absolute Maximum Ratings Notes A) J-level: spec is 100% tested at +25°C. B) The short circuit current can exceed the maximum safe output current. 1) Vs = VCC - VEE supply voltage (VCC - VEE) output current (see note C) common-mode input voltage maximum junction temperature storage temperature range lead temperature (soldering 10 sec) ESD rating (human body model) Reliability Information Transistor Count MTBF (based on limited test data) http://www.national.com 49 31Mhr 2 +14V 140mA VEE to VCC +150°C -65°C to +150°C +300°C 500V ±5V Electrical Characteristics (A v PARAMETERS Ambient Temperature = +2, Rf = 1kΩ, RL = 100Ω, VCC = ±5V, unless specified) CONDITIONS CLC452AJ TYP +25°C GUARANTEED MIN/MAX +25°C 0 to 70°C -40 to 85°C UNITS FREQUENCY DOMAIN RESPONSE -3dB bandwidth Vo = 1.0Vpp Vo = 4.0Vpp -0.1dB bandwidth Vo = 1.0Vpp gain peaking <200MHz, Vo = 1.0Vpp gain rolloff <30MHz, Vo = 1.0Vpp linear phase deviation <30MHz, Vo = 1.0Vpp differential gain NTSC, RL=150Ω differential phase NTSC, RL=150Ω 160 75 30 0 0.1 0.1 0.05 0.08 135 60 25 0.5 0.2 0.2 – – 120 57 25 0.9 0.3 0.3 – – 115 55 20 1.0 0.3 0.3 – – MHz MHz MHz dB dB deg % deg TIME DOMAIN RESPONSE rise and fall time settling time to 0.05% overshoot slew rate 3.2 20 8 540 4.2 – 12 400 4.5 – 15 370 5.0 – 15 350 ns ns % V/µs 2V step 2V step 2V step 2V step DISTORTION AND NOISE RESPONSE 2Vpp, 1MHz 2nd harmonic distortion 2Vpp, 1MHz; RL = 1kΩ 2Vpp, 5MHz 3rd harmonic distortion 2Vpp, 1MHz 2Vpp, 1MHz; RL = 1kΩ 2Vpp, 5MHz equivalent input noise voltage (eni) >1MHz non-inverting current (ibn) >1MHz inverting current (ibi) >1MHz -77 -78 -69 -72 -90 -58 -71 -72 -63 -68 -80 -54 -69 -70 -61 -66 -78 -52 -69 -70 -61 -66 -78 -52 dBc dBc dBc dBc dBc dBc 2.8 7.5 10.5 3.5 10 14 3.8 11 15 3.8 11 15 nV/√Hz pA/√Hz pA/√Hz STATIC DC PERFORMANCE input offset voltage average drift input bias current (non-inverting) average drift input bias current (inverting) average drift power supply rejection ratio common-mode rejection ratio supply current 1 10 3 40 13 30 48 53 3.2 6 – 18 – 24 – 45 50 3.8 8 – 23 – 31 – 43 48 4.0 8 – 25 – 31 – 43 48 4.0 mV µV/˚C µA nA/˚C µA nA/˚C dB dB mA 0.52 1.2 ±4.2 ±3.8 ±4.0 130 60 0.35 1.8 ±4.1 ±3.6 ±3.8 100 90 0.30 1.8 ±4.1 ±3.6 ±3.8 80 90 0.30 1.8 ±4.0 ±3.5 ±3.7 50 120 MΩ pF V V V mA mΩ DC DC RL= ∞ MISCELLANEOUS PERFORMANCE input resistance (non-inverting) input capacitance (non-inverting) common-mode input range output voltage range RL = 100Ω output voltage range RL = ∞ output current output resistance, closed loop DC Notes Model Package Thermal Resistance Plastic (AJP) Surface Mount (AJE) Surface Mount (AJM5) Dice (ALC) CerDIP (A8B) B Ordering Information B) The short circuit current can exceed the maximum safe output current. Package NOTES θJC θJA 105°C/W 95°C/W 140°C/W 25°C/W 70°C/W 155°C/W 175°C/W 210°C/W – 215°C/W 3 Temperature Range CLC452AJP CLC452AJE CLC452AJM5 CLC452ALC CLC452A8B -40°C -40°C -40°C -40°C -55°C CLC452ALC -55°C to +175°C to to to to to +85°C +85°C +85°C +85°C +175°C Description 8-pin PDIP 8-pin SOIC 5-pin SOT dice 8-pin CerDIP, MIL-STD-883 dice, MIL-STD-883 http://www.national.com +5V Typical Performance (A = +2, Rf = 1kΩ, RL = 100Ω, Vs = +5V1, Vcm = VEE + (Vs/2), RL tied to Vcm, unless specified) v Inverting Frequency Response Phase 0 -90 Av = 5 Rf = 402Ω -180 -270 Av = 10 Rf = 249Ω -360 -450 1M 10M Vo = 0.5Vpp Av = -1 Rf = 681Ω Gain Av = -2 Rf = 604Ω Phase -180 -225 -270 Av = -5 Rf = 453Ω -315 Av = -10 Rf = 402Ω RL = 1kΩ 10M Phase 0 -90 RL = 25Ω -180 -270 -360 -360 -450 100M 1M 10M Frequency (Hz) Frequency (Hz) Frequency Response vs. Vo RL = 100Ω Gain -405 1M 100M Vo = 0.5Vpp Magnitude (1dB/div) Gain Normalized Magnitude (1dB/div) Av = 1 Rf = 1kΩ Phase (deg) Vo = 0.5Vpp Frequency Response vs. RL Phase (deg) Av = 2 Rf = 750Ω Phase (deg) Normalized Magnitude (1dB/div) Non-Inverting Frequency Response 100M Frequency (Hz) Frequency Response vs. CL Open Loop Transimpedance Gain, Z(s) 120 220 Gain Vo = 0.5Vpp Magnitude (1dB/div) Vo = 0.1Vpp Magnitude (dBΩ) Vo = 2.5Vpp 100 CL = 10pF Rs = 46.4Ω CL = 100pF Rs = 20Ω CL = 1000pF Rs = 6.7Ω + Rs - CL 1k 1k 180 Phase 80 140 60 100 40 60 1k 20 1M 10M 1M 100M 10M Frequency (Hz) 10k 100M 100k Frequency (Hz) 20 100M 10M Frequency (Hz) Equivalent Input Noise Gain Flatness 1M 2nd & 3rd Harmonic Distortion 12.5 3.2 -40 10 Non-Inverting Current 7.5pA/√Hz 7.5 3 2.9 5 Voltage 2.85nV/√Hz 20 1k 30 100k 1M 3rd RL = 100Ω -60 2nd RL = 1kΩ -70 2nd RL = 100Ω -80 2.5 2.8 10 -50 Distortion (dBc) Magnitude (0.05dB/div) 3.1 Noise Current (pA/√Hz) Noise Voltage (nV/√Hz) Vo = 2Vpp Inverting Current 10.5pA/√Hz -90 10M 1M 10M Frequency (Hz) Frequency (MHz) 2nd Harmonic Distortion, RL = 25Ω Frequency (Hz) 3rd Harmonic Distortion, RL = 25Ω 2nd Harmonic Distortion, RL = 100Ω -60 -35 -44 3rd RL = 1kΩ 10MHz -40 -48 5MHz -50 -52 -54 2MHz -56 -58 10MHz -45 5MHz -50 -55 2MHz -60 1MHz -65 1MHz 0.5 1 1.5 2 2.5 0.5 1 1.5 2 2.5 0 -80 10MHz 5MHz -75 2MHz Output Amplitude (Vpp) http://www.national.com 2 2.5 -70 10MHz -75 -80 5MHz -85 2MHz -90 1MHz -85 1.5 2.5 3rd Harmonic Distortion, RL = 1kΩ -70 -80 -75 1 2 -60 Distortion (dBc) Distortion (dBc) -60 0.5 1.5 -65 5MHz 0 1 -65 10MHz -55 2MHz 0.5 Output Amplitude (Vpp) -60 1MHz -75 2nd Harmonic Distortion, RL = 1kΩ 3rd Harmonic Distortion, RL = 100Ω -70 2MHz Output Amplitude (Vpp) -45 -65 -70 -80 0 Output Amplitude (Vpp) -50 5MHz 1MHz -75 0 -65 -70 -60 Distortion (dBc) Distortion (dBc) 10MHz Distortion (dBc) Distortion (dBc) -46 0 0.5 1MHz -95 1 1.5 Output Amplitude (Vpp) 4 2 2.5 0 0.5 1 1.5 Output Amplitude (Vpp) 2 2.5 Phase (deg) Magnitude (1dB/div) Vo = 1Vpp +5V Typical Performance (A = +2, Rf = 1kΩ, RL = 100Ω, Vs = + 5V1, Vcm = VEE + (Vs/2), RL tied to Vcm, unless specified) v Closed Loop Output Resistance Recommended Rs vs. CL Large & Small Signal Pulse Response 70 + Rs CL 1k 50 Rs (Ω) 10 1 1k 1k 40 30 20 0.1 10 0 0.01 100k 1M 10M 10 100M 100 Frequency (Hz) PSRR & CMRR IBN, Vos vs. Temperature Maximum Output Voltage vs. RL -0.6 60 CMRR 40 30 20 10 0 10k 100k 1M 10M 100M 4.4 -0.7 IBN 4 -0.9 3 -1 2 -1.1 1 -100 2.8 2.4 -50 0 50 100 1.6 150 10 100 Inverting Frequency Response Av = +1 Rf = 1kΩ 0 -45 -90 Av = +5 Rf = 402 -135 Av = +10 Rf = 249Ω -180 -225 10M Normalized Magnitude (1dB/div) Gain Vo = 1Vpp Av = -2 Rf = 604Ω Gain Phase Av = -1 Rf = 681Ω -225 -270 Av = -5 Rf = 453Ω -315 Av = -10 Rf = 402Ω Vo = 1Vpp RL = 1kΩ 10M Phase Vo = 0.1Vpp -270 -360 -450 1M 100M 10M Magnitude (1dB/div) Vo = 2Vpp Gain Flatness CL = 10pF Rs = 68.1Ω CL = 100pF Rs = 17.4Ω CL = 1000pF Rs = 6.7Ω + Rs - 1k CL 100M Frequency (Hz) Vo = 1Vpp Vo = 5Vpp -90 -180 -360 Frequency Response vs. CL Vo = 1Vpp 0 RL = 25Ω Frequency (Hz) Frequency (Hz) Frequency Response vs. Vo RL = 100Ω Gain -425 1M 100M -180 Phase (deg) Av = +2 Rf = 750Ω Frequency Response vs. RL Phase (deg) Vo = 1Vpp 1000 RL (Ω) = +2, Rf = 1kΩ, RL = 100Ω, VCC = ± 5V, unless specified) v Phase (deg) Normalized Magnitude (1dB/div) 3.2 2 Non-Inverting Frequency Response Magnitude (1dB/div) 4 3.6 Temperature (°C) ±5V Typical Performance (A 1M 5 Vos -0.8 Frequency (Hz) Phase 4.8 Magnitude (0.05dB/div) 1k 6 IBN (µA) Offset Voltage Vos (mV) PSRR 50 Time (10ns/div) 1000 CL (pF) Output Voltage (Vpp) 10k PSRR & CMRR (dB) Small Signal Magnitude (1dB/div) Output Resistance (Ω) 60 - Large Signal Output Voltage (0.5V/div) 100 1k 1k 1M 10M Frequency (Hz) 100M 1M 10M 100M Frequency (Hz) 5 0 5 10 15 20 25 30 Frequency (MHz) http://www.national.com ±5V Typical Performance (A v = +2, Rf = 1kΩ, RL = 100Ω, VCC = ± 5V, unless specified) Small Signal Pulse Response Large Signal Pulse Response 2nd & 3rd Harmonic Distortion -40 Output Voltage (1V/div) Av = -2 -50 Av = +2 Distortion (dBc) Output Voltage (200mV/div) Vo = 2Vpp Av = +2 Av = -2 3rd RL = 100Ω -60 2nd RL = 1kΩ -70 2nd RL = 100Ω -80 3rd RL = 1kΩ -90 Time (10ns/div) Time (10ns/div) 1M 10M Frequency (Hz) 2nd Harmonic Distortion, RL = 25Ω 3rd Harmonic Distortion, RL = 25Ω -40 2nd Harmonic Distortion, RL = 100Ω -30 -55 10MHz -40 -60 10MHz 5MHz -55 2MHz -60 1MHz 10MHz -50 5MHz -60 1MHz -70 2MHz -80 -65 Distortion (dBc) -50 Distortion (dBc) Distortion (dBc) -45 1 2 3 4 5 -65 2MHz -70 1MHz -75 -90 0 5MHz -80 0 1 Output Amplitude (Vpp) 2 3 4 5 0 1 Output Amplitude (Vpp) 3rd Harmonic Distortion, RL = 100Ω 2nd Harmonic Distortion, RL = 1kΩ -50 2 3 4 5 Output Amplitude (Vpp) 3rd Harmonic Distortion, RL = 1kΩ -60 -60 10MHz -65 10MHz -60 5MHz -65 -70 2MHz -75 1MHz 2MHz -70 5MHz -75 10MHz 2 3 4 5 0 Output Amplitude (Vpp) Recommended Rs vs. CL 1MHz 2 3 4 5 0 Maximum Output Voltage vs. RL CL RL 40 30 4 5 Differential Gain & Phase -0.2 Gain Positive Sync -0.015 8 -0.3 Gain Negative Sync 6 -0.02 -0.4 -0.025 -0.5 Phase Positive Sync 4 -0.03 -0.6 10 Phase Negative Sync 0 2 10 100 1000 -0.035 10 100 CL (pF) 1000 -0.7 1 2 RL (Ω) Long Term Settling Time 0.2 12 4 Number of 150Ω Loads Short Term Settling Time IBN, Vos vs. Temperature 1.5 3 0.2 Vo = 2Vstep Vo = 2Vstep 8 4 IBN Vos 0 0 IBN (µA) 0.5 Vo (% Output Step) 1 Vo (% Output Step) 0.15 0.1 0 -0.1 0.1 0.05 0 -0.05 -0.1 -0.15 -0.5 -4 -100 -50 0 50 Temperature (°C) http://www.national.com 100 150 -0.2 -0.2 1 10 100 Time (ns) 6 1000 1µ 10µ 100µ 1m Time (s) 10m 100m 1 Phase (deg) 1k 20 Offset Voltage Vos (mV) 3 -0.01 Gain (%) 1k 2 f = 3.58MHz Output Voltage (Vpp) - 1 Output Amplitude (Vpp) Rs 60 Rs (Ω) -85 -95 1 10 50 2MHz -80 Output Amplitude (Vpp) 70 + 5MHz -75 -90 1MHz -85 1 -70 -80 -80 0 Distortion (dBc) -65 Distortion (dBc) Distortion (dBc) -55 CLC452 Operation The CLC452 is a current feedback amplifier built in an advanced complementary bipolar process. The CLC452 operates from a single 5V supply or dual ±5V supplies. Operating from a single supply, the CLC452 has the following features: ■ ■ ■ Vo = Vin where: ■ Provides 100mA of output current while consuming 15mW of power Offers low -78/-85dB 2nd and 3rd harmonic distortion Provides BW > 80MHz and 1MHz distortion < -70dBc at Vo = 2.0Vpp ■ ■ ■ The CLC452 performance is further enhanced in ±5V supply applications as indicated in the ±5V Electrical Characteristics table and ±5V Typical Performance plots. Av Rf 1+ Z(jω ) Equation 1 Av is the closed loop DC voltage gain Rf is the feedback resistor Z(jω) is the CLC452’s open loop transimpedance gain Z( jω ) is the loop gain Rf The denominator of Equation 1 is approximately equal to 1 at low frequencies. Near the -3dB corner frequency, the interaction between Rf and Z(jω) dominates the circuit performance. The value of the feedback resistor has a large affect on the circuits performance. Increasing Rf has the following affects: Current Feedback Amplifiers Some of the key features of current feedback technology are: ■ Independence of AC bandwidth and voltage gain ■ Inherently stable at unity gain ■ Adjustable frequency response with feedback resistor ■ High slew rate ■ Fast settling ■ ■ ■ ■ ■ Current feedback operation can be described using a simple equation. The voltage gain for a non-inverting or inverting current feedback amplifier is approximated by Equation 1. Decreases loop gain Decreases bandwidth Reduces gain peaking Lowers pulse response overshoot Affects frequency response phase linearity Refer to the Feedback Resistor Selection section for more details on selecting a feedback resistor value. CLC452 Design Information Single Supply Operation (VCC = +5V, VEE = GND) The specifications given in the +5V Electrical Characteristics table for single supply operation are measured with a common mode voltage (Vcm) of 2.5V. Vcm is the voltage around which the inputs are applied and the output voltages are specified. For single supply DC coupled operation, keep input signal levels above 0.8V DC. For input signals that drop below 0.8V DC, AC coupling and level shifting the signal are recommended. The non-inverting and inverting configurations for both input conditions are illustrated in the following 2 sections. Operating from a single +5V supply, the Common Mode Input Range (CMIR) of the CLC452 is typically +0.8V to +4.2V. The typical output range with RL=100Ω is +1.0V to +4.0V. DC Coupled Single Supply Operation Figures 1 and 2 show the recommended non-inverting and inverting configurations for input signals that remain above 0.8V DC. VCC Note: Rt, RL and Rg are tied to Vcm for minimum power consumption and maximum output swing. Vin 3 2 Rt Vcm Rg Vcm Note: Rb, provides DC bias for non-inverting input. Rb, RL and Rt are tied to Vcm for minimum power consumption and maximum output swing. 6.8µF + + 7 0.1µF CLC452 - 4 3 Vo 6 Rb Rf RL Vin Vcm Rg 2 VCC 6.8µF + + 7 0.1µF CLC452 - 4 Vo 6 Rf RL Vcm Vcm Rt R Vo = A v = 1+ f Vin Rg Vcm Figure 1: Non-Inverting Configuration R Vo = Av = − f Vin Rg Select Rt to yield desired Rin = Rt || Rg Figure 2: Inverting Configuration 7 http://www.national.com AC Coupled Single Supply Operation Figures 3 and 4 show possible non-inverting and inverting configurations for input signals that go below 0.8V DC. The input is AC coupled to prevent the need for level shifting the input signal at the source. The resistive voltage divider biases the non-inverting input to VCC ÷ 2 = 2.5V (For VCC = +5V). VCC 6.8µF + Rb Vin 6.8µF R 3 VCC 2 2 R - 4 Rf 1 R , where: Rin = 2πRinC c 2 R >> R source 6.8µF + Vin Cc ■ 3 Rg 2 + 7 0.1µF CLC452 - 4 6 Vo ■ Rf R Vo = Vin − f + 2.5 Rg 1 2πR gC c VCC + Rt 7 0.1µF CLC452 2 - 4 6 Vo R Vo = A v = 1+ f Vin Rg + 6.8µF VEE Figure 5: Dual Supply Non-Inverting Configuration http://www.national.com Decrease Rf to peak frequency response and extend bandwidth Increase Rf to roll off frequency response and compress bandwidth Driving Cables and Capacitive Loads When driving cables, double termination is used to prevent reflections. For capacitive load applications, a small series resistor at the output of the CLC452 will improve stability and settling performance. The Frequency Response vs. CL and Recommended Rs vs. CL plots, in the typical performance section, give the recommended series resistance value for optimum flatness at various capacitive loads. Rf 0.1µF Rg VEE Load Termination The CLC452 can source and sink near equal amounts of current. For optimum performance, the load should be tied to Vcm. 6.8µF + 6.8µF Bandwidth vs. Output Amplitude The bandwidth of the CLC452 is at a maximum for output voltages near 1Vpp. The bandwidth decreases for smaller and larger output amplitudes. Refer to the Frequency Response vs. Vo plots. Dual Supply Operation The CLC452 operates on dual supplies as well as single supplies. The non-inverting and inverting configurations are shown in Figures 5 and 6. 3 0.1µF Note: Rb provides DC bias for the non-inverting input. Select Rt to yield desired Rin = Rt || Rg. Unity Gain Operation The recommended Rf for unity gain (+1V/V) operation is 1kΩ. Rg is left open. Parasitic capacitance at the inverting node may require a slight increase in Rf to maintain a flat frequency response. Figure 4: AC Coupled Inverting Configuration Vin Rf As a rule of thumb, if the recommended Rf is doubled, then the bandwidth will be cut in half. R low frequency cutoff = 4 Vo Feedback Resistor Selection The feedback resistor, Rf, affects the loop gain and frequency response of a current feedback amplifier. Optimum performance of the CLC452, at a gain of +2V/V, is achieved with Rf equal to 1kΩ. The frequency response plots in the Typical Performance sections illustrate the recommended Rf for several gains. These recommended values of Rf provide the maximum bandwidth with minimal peaking. Within limits, Rf can be adjusted to optimize the frequency response. VCC R - 6 Figure 6: Dual Supply Inverting Configuration Figure 3: AC Coupled Non-Inverting Configuration VCC 2 Rg R Vo = Av = − f Vin Rg Vo 6 CLC452 0.1µF + 0.1µF Rg C R Vo = Vin 1 + f + 2.5 Rg low frequency cutoff = + 7 7 Rt + Cc + CLC452 2 VCC Vin 3 8 1.0 Transmission Line Matching One method for matching the characteristic impedance (Zo) of a transmission line or cable is to place the appropriate resistor at the input or output of the amplifier. Figure 7 shows typical inverting and non-inverting circuit configurations for matching transmission lines. R1 Z0 V1 +- R3 R2 R4 V2 +- Z0 Rg AJP AJE Power (W) 0.8 SOT 0.6 0.4 C6 + Z0 CLC452 - R6 0.2 Vo R7 0 Rf -40 -20 0 20 40 60 80 100 120 140 160 180 Ambient Temperature (°C) R5 Figure 8: Power Derating Curves Figure 7: Transmission Line Matching Layout Considerations A proper printed circuit layout is essential for achieving high frequency performance. Comlinear provides evaluation boards for the CLC452 (730013-DIP, 730027SOIC, 730068-SOT) and suggests their use as a guide for high frequency layout and as an aid for device testing and characterization. Non-inverting gain applications: ■ ■ ■ Connect Rg directly to ground. Make R1, R2, R6, and R7 equal to Zo. Use R3 to isolate the amplifier from reactive loading caused by the transmission line, or by parasitics. General layout and supply bypassing play major roles in high frequency performance. Follow the steps below as a basis for high frequency layout: Inverting gain applications: ■ ■ ■ Connect R3 directly to ground. Make the resistors R4, R6, and R7 equal to Zo. Make R5 II Rg = Zo. ■ ■ The input and output matching resistors attenuate the signal by a factor of 2, therefore additional gain is needed. Use C6 to match the output transmission line over a greater frequency range. C6 compensates for the increase of the amplifier’s output impedance with frequency. ■ ■ Power Dissipation Follow these steps to determine the power consumption of the CLC452: ■ ■ 1. Calculate the quiescent (no-load) power: Pamp = ICC (VCC - VEE) 2. Calculate the RMS power at the output stage: Po = (VCC - Vload) (Iload), where Vload and Iload are the RMS voltage and current across the external load. 3. Calculate the total RMS power: Pt = Pamp + Po Include 6.8µF tantalum and 0.1µF ceramic capacitors on both supplies. Place the 6.8µF capacitors within 0.75 inches of the power pins. Place the 0.1µF capacitors less than 0.1 inches from the power pins. Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance. Minimize all trace lengths to reduce series inductances. Use flush-mount printed circuit board pins for prototyping, never use high profile DIP sockets. Evaluation Board Information Data sheets are available for the CLC730013/ CLC730027 and CLC730068 evaluation boards. The evaluation board data sheets provide: ■ ■ ■ The maximum power that the DIP, SOIC, and SOT packages can dissipate at a given temperature is illustrated in Figure 8. The power derating curve for any CLC452 package can be derived by utilizing the following equation: Evaluation board schematics Evaluation board layouts General information about the boards The CLC730013/CLC730027 data sheet also contains tables of recommended components to evaluate several of Comlinear’s high speed amplifiers. This table for the CLC452 is illustrated below. Refer to the evaluation board data sheet for schematics and further information. (175° − Tamb ) θ JA Components Needed to Evaluate the CLC452 on the Evaluation Board: where ■ Tamb = Ambient temperature (°C) θJA = Thermal resistance, from junction to ambient, for a given package (°C/W) ■ 9 Rf, Rg - Use this product data sheet to select values Rin, Rout - Typically 50Ω (Refer to the Basic Operation section of the evaluation board data sheet for details) http://www.national.com ■ ■ ■ Rt - Optional resistor for inverting gain configurations (Select Rt to yield desired input impedance = Rg || Rt) C1, C2 - 0.1µF ceramic capacitors C3, C4 - 6.8µF tantalum capacitors Gain = K = 1 + ■ ■ ωc = This example illustrates a lowpass filter with Q = 0.707 and corner frequency fc = 10MHz. A Q of 0.707 was chosen to achieve a maximally flat, Butterworth response. Figure 11 indicates the filter response. Magnitude (dB) Application Circuits Single Supply Cable Driver The typical application shown on the front page shows the CLC452 driving 10m of 75Ω coaxial cable. The CLC452 is set for a gain of +2V/V to compensate for the divide-by-two voltage drop at Vo. -15 -18 -21 -24 -30 1M 10M Figure 11: Lowpass Response Twisted Pair Driver The high output current and low distortion, of the CLC452, make it well suited for driving transformers. Figure 12 illustrates a typical twisted pair driver utilizing the CLC452 and a transformer. The transformer provides the signal and its inversion for the twisted pair. Vin 3 Rt 0.1µF 2 5kΩ V = Av Vin + CLC452 6 V= Rm 1:n 3 - 158Ω 158Ω C2 100pF 2 + CLC452 - 4 6 0.1µF UTP Rf Req Rg Vo R A v = 1+ f Rg 100Ω IL RL C1 7 n A v Vin 4 Zo Rf R2 100M Frequency (Hz) +5V 5kΩ 3 0 -3 -6 -9 -12 -27 Single Supply Lowpass Filter Figures 9 and 10 illustrate a lowpass filter and design equations. The circuit operates from a single supply of +5V. The voltage divider biases the non-inverting input to 2.5V. And the input is AC coupled to prevent the need for level shifting the input signal at the source. Use the design equations to determine R1, R2, C1, and C2 based on the desired Q and corner frequency. R1 1 RC Figure 10: Design Equations Support Berkeley SPICE 2G and its many derivatives Reproduce typical DC, AC, Transient, and Noise performance Support room temperature simulations 0.1µF R1C2 R1C1 + (1− K) R 2C1 R 2C 2 1 (3 − K) Q= The readme file that accompanies the diskette lists released models, and provides a list of modeled parameters. The application note OA-18, Simulation SPICE Models for Comlinear’s Op Amps, contains schematics and a reproduction of the readme file. Vin R 2C 2 + R1C1 For R1 = R 2 = R and C1 = C2 = C SPICE Models SPICE models provide a means to evaluate amplifier designs. Free SPICE models are available for Comlinear’s monolithic amplifiers that: ■ 1 Q= C5, C6, C7, C8 R1 thru R8 The evaluation boards are designed to accommodate dual supplies. The boards can be modified to provide single supply operation. For best performance; 1) do not connect the unused supply, 2) ground the unused supply pin. ■ 1 R1R 2C1C2 Corner frequency = ω c = Components not used: ■ Rf Rg V= -n A v Vin 4 Vo = 1n A v Vin 2 Figure 12: Twisted Pair Driver 1kΩ 1.698kΩ Rg To match the line’s characteristic impedance (Zo) set: 0.1µF ■ ■ Figure 9: Lowpass Filter Topology http://www.national.com 10 RL = Zo Rm = Req + Vo - Where Req is the transformed value of the load impedance, (RL), and is approximated by: Req = The load current (IL) and voltage (Vo) are related to the CLC452’s maximum output voltage and current by: RL Vo ≤ n ⋅ Vmax n2 IL ≤ Select the transformer so that it loads the line with a value close to Zo, over the desired frequency range. The output impedance, Ro, of the CLC452 varies with frequency and can also affect the return loss. The return loss, shown below, takes into account an ideal transformer and the value of Ro. Return Loss(dB) ≈ − 20log10 n2 ⋅ I max n From the above current relationship, it is obvious that an amplifier with high output drive capability is required. Ro Zo 11 http://www.national.com CLC452, Single Supply, Low-Power, High Output, Current Feedback Amp Customer Design Applications Support National Semiconductor is committed to design excellence. For sales, literature and technical support, call the National Semiconductor Customer Response Group at 1-800-272-9959 or fax 1-800-737-7018. Life Support Policy National’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of National Semiconductor Corporation. As used herein: 1. Life support devices or systems are devices or systems which, a) are intended for surgical implant into the body, or b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. N National Semiconductor Corporation National Semiconductor Europe National Semiconductor Hong Kong Ltd. National Semiconductor Japan Ltd. 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 Fax: (+49) 0-180-530 85 86 E-mail: europe.support.nsc.com Deutsch Tel: (+49) 0-180-530 85 85 English Tel: (+49) 0-180-532 78 32 Francais Tel: (+49) 0-180-532 93 58 Italiano Tel: (+49) 0-180-534 16 80 2501 Miramar Tower 1-23 Kimberley Road Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 Tel: 81-043-299-2309 Fax: 81-043-299-2408 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. http://www.national.com 12