Raltron COCE8889 9x14 pecl j-lead clock- pb free compliant(see page two for part numbering scheme) Datasheet

CLOCK
Page 1 of 2
9X14 PECL J-LEAD CLOCK- PB FREE COMPLIANT
(SEE PAGE TWO FOR PART NUMBERING SCHEME)
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APPROVALS
RALTRON
Eng. approval, date: RONEN 3/20/03
Sales approval, date:
Created by, date: RONEN 3/20/03
Revision:
"
CUSTOMER
Name (please print):
Title (please print):
Signature, date:
MECHANICAL SPECIFICATION
OUTLINE TOLERANCE:
±0.015” / 0.4mm
(Unless otherwise specified)
4 pin Version
6 pin Version
.550 MAX
13.96 MAX.
.185 MAX.
4.70 MAX.
.030
.76
.018 TYP.
.46 TYP.
"
.200 TYP.
5.08 TYP.
.300 ±008
7.61 ±.20
.100 TYP.
2.54 TYP.
PIN FUNCTIONS (4 pins):
[1] E/ D OR N/C OR COMP. OUT
[2] CASE / GROUND
[3] OUTPUT
[4] SUPPLY VOLTAGE
.76
.030
.185 MAX.
4.70 MAX.
.018 TYP.
.46 TYP.
PIN FUNCTIONS (6 pins):
[1] NC OR COMP. OUTPUT
[2] EN / DIS OR NC
[3] CASE / GROUND
[4] OUTPUT
[5] COMP. OUTPUT OR NC
[6] SUPPLY VOLTAGE
.350
8.88
.385
9.77
.350
8.88
.385 MAX.
9.77 MAX.
.550
.300 ±008
7.61 ±.20
MARKING (EXAMPLE):
CE8950A-LZ
155.520-T-C-EL
RAL D/C
ELECTRICAL SPECIFICATION
PARAMETER
Frequency, nom
Supply voltage, nom.
Supply current, max.
(excluding load)
PECL output level
Duty cycle
Rise- / fall time, max.
Jitter, rms, max.
Overall freq. stability, max.
SYMBOL
fo
Vcc
Is
VALUE
70.000~250.0
3.3VDC
5.0VDC
100
UNIT
MHz
V
mA
2.275 / 1.68
3.975/3.38
40…60 OR 45…55
0.100…1.0 (see note A)
1.0
SEE PART NUMBER
GENERATION TABLE
Enabled
V
%
ns
ps
ppm
En
Dis
CONDITIONS
Vcc±5%
Vcc=+3.3VDC/+5.0VDC
Ta=+25°C, 50Ω to Vcc-2.0VDC load
Vcc=+3.3VDC/+5.0VDC load=50Ω to Vcc-2.0VDC
load=50Ω to Vcc-2.0VDC / @50%Vcc, Ta=+25°C
20%~80% Vout, 80%~20% Vout, max
1σ, Fj=12KHz…20MHz
Including operating temperature, ±5% load & supply
variations, calibration @+25°C, and 10 year aging
Pin 2=Low, Vcc-1.620 (max.)
Pin 2=High, Vcc-1.025 (min.)
Enable option
Disable option
Operating temperature range
Ta
-
Storage temperature range
Absolute voltage range
T(stg)
Vcc(abs)
Non-destructive, DC
SEE PART NUMBER
GENERATION TABLE
-55…+90
-0.5…+7.0
VOH / VOL
DC
tr / tf
J
∆f/fc
Pin 4 will assume a fixed level of
logic “0”, and pin 5 will assume a
fixed level of logic“1”
°C
°C
V
3/20/03 marketing-rfq, clock
NOTE A: RISE AND FALL TIME VALUES (tr/tf) ARE FREQUENCY DEPENDENT.
RALTRON ELECTRONICS CORP. ! 10651 N.W . 19
th
St ! Miami, Florida 33172 ! U.S.A.
phone: +001(305) 593-6033 ! fax: +001(305)594-3973 ! e-mail: [email protected] ! internet: http:/www.raltron.com
CLOCK
Page 2 of 2
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ELECTRICAL TEST DIAGRAM FOR 3.3V PECL CLOCK WITH COMP. OUTPUT
▀
PART NUMBER GENERATION
SERIES
CO88: 5.0V PECL, NO EN/DIS
CO89: 3.3V PECL, NO EN/DIS
CE88: 5.0V PECL, EN/DIS
CE89: 3.3V PECL, EN/DIS
OVERALL
STABILITY
50: ±50ppm
00: ±100ppm
REV
A
TEMP. RANGE
(°°C)
LV: 0…50
LZ: 0…+70
HZ: -20…+70
D3: -40…+85
FREQUENCY
(MHz)
70.000…250.0
OPTIONS
SUFFIX
T: 45…55 DUTY
C: COMP. OUTPUT
C1: COMP. OUTPUT PIN 1
(See Note 3)
EL
(See note 2)
NOTE:
1.Variations from standard specification are available, please contact factory.
2.EL is added at the end of the part number for all PECL clocks with enable/disable option.
3. C1 suffix to be applied only when using the 6 pins package version
5/13/02rketing-rfq, vcxo
PART NUMBER EXAMPLE: CE8950A-LZ-155.520-T-C-EL
RALTRON ELECTRONICS CORP. ! 10651 N.W . 19
th
PIN SUFIX
OPTION
4: 4 PINS
St ! Miami, Florida 33172 ! U.S.A.
phone: +001(305) 593-6033 ! fax: +001(305)594-3973 ! e-mail: [email protected] ! internet: http:/www.raltron.com
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