TI CY74FCT162841TSSOP 20-bit latch Datasheet

Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT16841T
CY74FCT162841T
20-Bit Latches
SCCS067 - July 1994 - Revised March 2000
Features
Functional Description
• FCT-C speed at 5.5 ns (FCT16841T Com’l)
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for significantly improved
noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
• Industrial temperature range of −40˚C to +85˚C
• VCC = 5V ± 10%
The CY74FCT16841T and CY74FCT162841T are 20-bit
D-type latches designed for use in bus applications requiring
high speed and low power. These devices can be used as two
independent 10-bit latches, or as a single 10-bit latch, or as a
single 20-bit latch by connecting the Output Enable (OE) and
Latch (LE) inputs. Flow-through pinout and small shrink
packaging aid in simplifying board layout. The output buffers
are designed with a power-off disable feature to allow live
insertion of boards.
The CY74FCT16841T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162841T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162841T is ideal for driving transmission lines.
CY74FCT16841T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V,
TA = 25˚C
CY74FCT162841T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,
TA= 25˚C
Pin Configuration
Logic Block Diagrams
SSOP/TSSOP
Top View
1OE
1LE
1D1
D
1Q1
C
TO 9 OTHER CHANNELS
FCT16841-1
2OE
2LE
2D1
D
2Q1
C
TO 9 OTHER CHANNELS
FCT16841-2
1OE
1
56
1LE
1Q1
2
55
1 D1
1Q2
GND
3
4
54
53
1Q3
5
52
1Q4
6
51
1 D4
VCC
7
50
VCC
1 D5
1 D2
GND
1 D3
1Q5
8
49
1Q6
9
48
1 D6
1Q7
10
47
1 D7
GND
11
46
GND
1Q8
12
45
1 D8
1Q9
13
44
1 D9
1Q10
14
43
1D10
2Q1
15
42
2 D1
2Q2
16
41
2 D2
2Q3
17
40
2 D3
GND
18
39
GND
2Q4
19
38
2 D4
2Q5
20
37
2 D5
2Q6
21
36
2 D6
VCC
2Q7
22
35
VCC
23
34
2 D7
2Q8
24
33
2 D8
GND
2Q9
25
32
GND
26
31
2 D9
2Q10
27
30
2D10
2OE
28
29
2LE
FCT16841-3
Copyright
© 2000, Texas Instruments Incorporated
CY74FCT16841T
CY74FCT162841T
Function Table[1]
Pin Description
Name
Description
Inputs
Outputs
D
Data Inputs
D
LE
OE
Q
LE
Latch Enable Input (Active HIGH)
H
H
L
H
OE
Output Enable Input (Active LOW)
L
H
L
L
O
Three-State Outputs
X
L
L
Q[2]
X
X
H
Z
Maximum Ratings[3, 4]
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Power Dissipation .......................................................... 1.0W
Storage Temperature ...................................... −55°C to +125°C
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Ambient Temperature with
Power Applied .................................................. −55°C to +125°C
Operating Range
DC Input Voltage .................................................−0.5V to +7.0V
Range
DC Output Voltage ..............................................−0.5V to +7.0V
Industrial
DC Output Current
(Maximum Sink Current/Pin) ...........................−60 to +120 mA
Ambient
Temperature
VCC
−40°C to +85°C
5V ± 10%
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
VIH
Input HIGH Voltage
Logic HIGH Level
VIL
Input LOW Voltage
Logic LOW Level
VH
Input
Hysteresis[6]
VIK
Input Clamp Diode Voltage
VCC=Min., IIN=−18 mA
IIH
Input HIGH Current
IIL
Input LOW Current
IOZH
Min.
Typ.[5]
Max.
2.0
Unit
V
0.8
100
mV
−1.2
V
VCC=Max., VI=VCC
±1
µA
VCC=Max., VI=GND
±1
µA
High Impedance Output
Current (Three-State Output pins)
VCC=Max., VOUT=2.7V
±1
µA
IOZL
High Impedance Output
Current (Three-State Output pins)
VCC=Max., VOUT=0.5V
±1
µA
IOS
Short Circuit Current[7]
VCC=Max., VOUT=GND
−80
−200
mA
IO
Output Drive Current[7]
VCC=Max., VOUT=2.5V
−50
−180
mA
±1
µA
IOFF
Power-Off Disable
VCC=0V, VOUT
≤4.5V[8]
−0.7
V
−140
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = HIGH Impedance.
2. Output level before LE HIGH-to-LOW Transition.
3. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature
range.
4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
5. Typical values are at VCC= 5.0V, TA= +25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
8. Tested at +25˚C.
2
CY74FCT16841T
CY74FCT162841T
Output Drive Characteristics for CY74FCT16841T
Parameter
VOH
VOL
Min.
Typ.[5]
VCC=Min., IOH=−3 mA
2.5
3.5
VCC=Min., IOH=−15 mA
2.4
3.5
VCC=Min., IOH=−32 mA
2.0
3.0
Description
Output HIGH Voltage
Output LOW Voltage
Test Conditions
VCC=Min., IOL=64 mA
Max.
Unit
V
0.2
0.55
V
Min.
Typ.[5]
Max.
Unit
Output Drive Characteristics for CY74FCT162841T
Parameter
Description
Test Conditions
Output LOW
Current[7]
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
60
115
150
mA
IODH
Output HIGH
Current[7]
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
−60
−115
−150
mA
VOH
Output HIGH Voltage
VCC=Min., IOH=−24 mA
2.4
3.3
VOL
Output LOW Voltage
VCC=Min., IOL=24 mA
IODL
V
0.3
0.55
V
Typ.[5]
Max.
Unit
Capacitance[6] (TA =+25˚C, f = 1.0 MHz)
Symbol
Description
Conditions
CIN
Input Capacitance
VIN = 0V
4.5
6.0
pF
COUT
Output Capacitance
VOUT = 0V
5.5
8.0
pF
Min.
Typ.[5]
Power Supply Characteristics
Parameter
Description
Test Conditions
Max.
Unit
ICC
Quiescent Power Supply
Current
VCC=Max.
VIN<0.2V
VIN>VCC-0.2V
—
5
500
µA
∆ICC
Quiescent Power Supply
Current (TTL inputs HIGH)
VCC=Max.,
VIN=3.4V[9]
—
0.5
1.5
mA
ICCD
Dynamic Power Supply
Current[10]
VCC=Max., One Input
Toggling, 50% Duty
Cycle, Outputs Open,
OE=GND
VIN=VCC or
VIN=GND
—
60
100
µA/MHz
IC
Total Power Supply Current[11] VCC=Max., f1=10 MHz,
50% Duty Cycle,
Outputs Open, One Bit
Toggling, OE=GND
LE = VCC
VIN=VCC or
VIN=GND
—
0.6
1.5
mA
VIN=3.4V or
VIN=GND
—
0.9
2.3
VIN=VCC or
VIN=GND
—
3.0
5.5[12]
VIN=3.4V or
VIN=GND
—
8.0
20.5[12]
VCC=Max., f1=2.5 MHz,
50% Duty Cycle, Outputs
Open, Twenty Bits
Toggling, OE=GND
LE = VCC
Notes:
9. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
10. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
= IQUIESCENT + IINPUTS + IDYNAMIC
11. IC
IC
= ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
ICC = Quiescent Current with CMOS input levels
∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V)
= Duty Cycle for TTL inputs HIGH
DH
= Number of TTL inputs at DH
NT
ICCD = Dynamic Current caused by an input transition pair (HLH or LHL)
= Clock frequency for registered devices, otherwise zero
f0
= Input signal frequency
f1
= Number of inputs changing at f1
N1
All currents are in milliamps and all frequencies are in megahertz.
12. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY74FCT16841T
CY74FCT162841T
Switching Characteristics Over the Operating Range[13]
74FCT16841AT
Parameter
tPLH
tPHL
tPLH
tPHL
tPHZ
tPZL
tPHZ
tPLZ
Description
Propagation Delay
D to Q
(LE=HIGH)
Propagation Delay
LE to Q
Output Enable Time
OE to Q
Output Disable Time
OE to Q
74FCT16841CT
74FCT162841CT
Condition[14]
Min.
Max.
Min.
Max.
Unit
Fig.
No.[15]
CL=50 pF
RL=500Ω
1.5
9.0
1.5
5.5
ns
1, 5
CL=300 pF[16]
RL=500Ω
1.5
13.0
1.5
13.0
CL=50 pF
RL=500Ω
1.5
12.0
1.5
6.4
ns
1, 5
CL=300 pF[16]
RL=500Ω
1.5
16.0
1.5
15.0
CL=50 pF
RL=500Ω
1.5
11.5
1.5
6.5
ns
1, 7, 8
CL=300 pF[16]
RL=500Ω
1.5
23.0
1.5
12.0
CL=5 pF[16]
RL=500Ω
1.5
7.0
1.5
5.7
ns
1, 7, 8
CL=50 pF
RL=500Ω
1.5
8.0
1.5
6.0
CL=50 pF
RL=500Ω
2.5
—
2.0
—
ns
9
tSU
Set-Up Time
HIGH or LOW, D to LE
tH
Hold Time
HIGH or LOW, D to LE
2.5
—
1.5
—
ns
9
tW
LE Pulse Width HIGH
4.0[17]
—
4.0[17]
—
ns
5
—
0.5
—
0.5
ns
—
tSK(O)
Output
Skew[18]
Notes:
13. Minimum limits are specified but not tested on Propagation Delays.
14. See test circuit and waveform.
15. See “Parameter Measurement Information” in the General Information section.
16. These conditions are specified but not tested.
17. These limits are specified but not tested.
18. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.
Ordering Information for CY74FCT16841T
Speed
(ns)
Ordering Code
Package
Name
Package Type
Operating
Range
5.5
CY74FCT16841CTPVC/PVCT
O56
56-Lead (300-Mil) SSOP
Industrial
6.5
CY74FCT16841ATPVC/PVCT
O56
56-Lead (300-Mil) SSOP
Industrial
Ordering Information CY74FCT162841T
Speed
(ns)
5.5
Ordering Code
Package
Name
Package Type
74FCT162841CTPACT
Z56
56-Lead (240-Mil) TSSOP
CY74FCT162841CTPVC
O56
56-Lead (300-Mil) SSOP
74FCT162841CTPVCT
O56
56-Lead (300-Mil) SSOP
4
Operating
Range
Industrial
CY74FCT16841T
CY74FCT162841T
Package Diagrams
56-Lead Shrunk Small Outline PackageO56
56-Lead Thin Shrunk Small Outline Package Z56
5
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright  2000, Texas Instruments Incorporated
Similar pages