Intersil DG405AK/883 Monolithic cmos analog switch Datasheet

DG401/883, DG403/883
DG405/883
Monolithic CMOS Analog Switches
June 1994
Features
Description
• This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• ON-Resistance <35Ω
The DG401/883, DG403/883 and DG405/883 monolithic
CMOS analog switches have TTL and CMOS compatible
digital inputs.
• Low Power Consumption (PD <35µW)
• Fast Switching Action
- tON <150ns
- tOFF <100ns
• Low Charge Injection
• DG401/883 Dual SPST; Replaces HI-5041/883
• DG403/883 Dual SPDT; Replaces DG190/883B,
IH5043/883B, IH5151/883B, HI-5051/883, HI-5043/883B
• DG405/883 Dual DPST; Replaces DG184/883B,
HI-5045/883, IH5145/883B
• TTL, CMOS Compatible
• Single or Split Supply Operation
Applications
• Audio Switching
These switches feature low analog ON resistance (<35Ω)
and fast switch time (tON <150ns). Low charge injection simplifies sample and hold applications.
The improvements in the DG401/403/405/883 series are
made possible by using a high voltage silicon-gate process.
An epitaxial layer prevents the latch-up associated with older
CMOS technologies. The 44V maximum voltage range permits controlling 30V peak-to-peak signals. Power supplies
may be single-ended from +5V to +34V, or split from ±5V to
±17V.
The analog switches are bilateral, equally matched for AC or
bidirectional signals. The ON resistance variation with analog signals is quite low over a ±15V analog input range. The
three different devices provide the equivalent of two SPST
(DG401/883), two SPDT (DG403/883) or two DPST
(DG405/883) relay switch contacts with CMOS or TTL level
activation. The pinout is similar, permitting a standard layout
to be used, choosing the switch function as needed.
Ordering Information
• Battery Operated Systems
• Data Acquisition
PART NUMBER
• Hi-Rel Systems
TEMPERATURE
RANGE
PACKAGE
• Sample and Hold Circuits
DG401AK/883
-55oC
• Communication Systems
DG403AK/883
-55oC to +125oC
16 Lead CERDIP
DG405AK/883
-55oC
16 Lead CERDIP
to
to
+125oC
16 Lead CERDIP
+125oC
Pinouts
DG401/883
(CERDIP)
TOP VIEW
DG403/883, DG405/883
(CERDIP)
TOP VIEW
16 S1
D1
NC 2
15 IN1
NC 2
NC 3
14 V-
D3
3
14 V-
NC 4
13 GND
S3
4
13 GND
NC 5
12 VL
S4
5
12 VL
NC 6
11 V+
D4
6
11 V+
NC 7
10 IN2
NC 7
10 IN2
D1
D2
1
8
9 S2
D2
1
8
16 S1
15 IN1
9 S2
(NC) NO CONNECTION
(NC) NO CONNECTION
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
888-468-3774 | 321-724-7143 | Copyright © Intersil Corporation 1999
4-1
512046
File Number 3703
Spec Number
DG401/883, DG403/883, DG405/883
Functional Diagrams
DG401/883
VL
12
S1
DG403/883
V+
VL
11
16
D1
S1
IN1 15
S2
V+
12
1
S3
IN2
DG405/883
VL
11
12
16
1
4
3
D1
S1
D3
S3
IN1 15
10
IN2
9
8
D2
S2
S4
13
GND
IN2
9
8
5
6
13
V-
11
16
1
4
3
D1
D3
IN1 15
10
14
V+
D2
S2
D4
S4
14
GND
10
9
8
5
6
13
V-
D2
D4
14
GND
V-
Schematic Diagram
V+
SOURCE
VVL
VIN
V+
GND
DRAIN
V-
Truth Table
DG401/883
DG403/883
DG405/883
LOGIC
SWITCH
SWITCH 1, 2
SWITCH 3, 4
SWITCH
0
OFF
OFF
ON
OFF
1
ON
ON
OFF
ON
NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V.
Spec Number
4-2
512046
Specifications DG401/883, DG403/883, DG405/883
Absolute Maximum Ratings
Reliability Information
V+ to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44.0V
GND to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
VL . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND - 0.3V) to (VC+) +0.3V
Digital Inputs (Note 1), VS , VD . . . . . (V-) -2V to (V+) + 2V or 30mA,
Whichever Occurs First
Continuous (Any Terminal) Current, (Note 1) . . . . . . . . . . . . . .±30mA
Peak Current, S or D (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . .±100mA
(Pulsed 1ms, 10% Duty Cycle)
Storage Temperature Range (A Suffix) . . . . . . . . . -65oC to +125oC
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC
Thermal Resistance (Max)
θJC
θJA
CERDIP Package . . . . . . . . . . . . . . . . . .
18oC/W
75oC/W
Operating Temperature (A Suffix) . . . . . . . . . . . . . . -55oC to +125oC
Junction Temperature (CerDIP) . . . . . . . . . . . . . . . . . . . . . . +175oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V Max
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V Max
Input High Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V Min
Input Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at V+ = +15V, V- = -15V, VL = 5V, Unless Otherwise Specified
PARAMETERS
Drain-to-Source
ON Resistance
Delta Drain-to-Source
ON Resistance
Source OFF Leakage Current
SYMBOL
RDS(ON)
GROUP A
SUBGROUP TEMPERATURE
CONDITIONS
V+ = +13.5V, V- = -13.5V,
IS = -10mA, VD = ±10V
Delta
RDS(ON)
V+ = +16.5V, V- = -16.5V,
IS = -10mA,
VD = +5V, 0V, -5V
IS(OFF)
V+ = +16.5V, V- = -16.5V,
VS = -15.5V, VD = +15.5V
V+ = +16.5V, V- = -16.5V,
VS = +15.5V, VD = -15.5V
Drain OFF Leakage Current
ID(OFF)
V+ = +16.5V, V- = -16.5V,
VS = -15.5V, VD = +15.5V
V+ = +16.5V, V- = -16.5V,
VS = +15.5V, VD = -15.5V
Channel ON Leakage
Current
ID(ON) +
IS(ON)
V+ = +16.5V, V- = -16.5V,
VS = VD = ±15.5V
1
2, 3
1
2, 3
+25oC
+125oC,
-55oC
+25oC
+125oC,
-55oC
LIMITS
MIN
MAX
UNITS
-
35
Ω
-
45
Ω
-
3
Ω
-
5
Ω
1
+25oC
-
±0.25
nA
2
+125oC
-
±20
nA
1
+25oC
-
±0.25
nA
2
+125oC
-
±20
nA
1
+25oC
-
±0.25
nA
2
+125oC
-
±20
nA
1
+25oC
-
±0.25
nA
2
+125oC
-
±20
nA
1
+25oC
-
±0.4
nA
2
+125oC
-
±40
nA
+125oC
-
±1.0
µA
Low Level Input Current
IIL
VIN Under Test = 0.8V,
All Others = 2.4V
1, 2
+25oC,
High Level Input Current
IIH
VIN Under Test = 2.4V,
All Others = 0.8V
1, 2
+25oC, +125oC
-
±1.0
µA
Positive Supply Current
I+
V+ = 16.5V, V- = -16.5V,
VIN = 0V or 5.0V
1
+25oC
-
+1.0
µA
-
+5.0
µA
-
-1.0
µA
-
-5.0
-
+1.0
-
+5.0
-
-1.0
-
-5.0
Negative Supply Current
Logic Supply Current
Ground Current
I-
IL
IGND
V+ = +16.5V, V- = -16.5V,
VIN = 0V or 5.0V
V+ = +16.5V, V- = -16.5V,
VIN 0V or 5V
V+ = +16.5V, V- = -16.5V,
VIN 0V or 5V
2, 3
1
2, 3
1
2, 3
1
2, 3
+125oC,
-55oC
+25oC
+125oC,
-55oC
+25oC
+125oC,
-55oC
+25oC
+125oC,
-55oC
Spec Number
4-3
µA
µA
512046
Specifications DG401/883, DG403/883, DG405/883
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at V+ = +15V, V- = -15V, VL = 5V, Unless Otherwise Specified
LIMITS
PARAMETERS
SYMBOL
Turn On Time
tON
Turn Off Time
tOFF
Break-Before-Make
Time Delay
(DG403 Only)
tD
CONDITIONS
GROUP A
SUBGROUP
TEMPERATURE
MIN
MAX
UNITS
9
+25oC
-
150
ns
10, 11
+125oC, -55oC
-
275
ns
9
+25oC
-
100
ns
10
+125oC
-
250
ns
11
-55oC
-
175
ns
9
+25oC
10
150
ns
RL = 300Ω, CL = 35pF
RL = 300Ω, CL = 35pF
RL = 300Ω, CL = 35pF
NOTE:
1. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
Table 3 Intentionally Left Blank.
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
SUBGROUPS (SEE TABLES 1 AND 2)
Interim Electrical Parameters (Pre Burn-In)
1
Final Electrical Test Parameters
1 (Note 1), 2, 3, 9, 10, 11
Group A Test Requirements
1, 2, 3, 9, 10, 11
Groups C and D Endpoints
1
NOTE:
1. PDA applies to Subgroup 1 only.
Spec Number
4-4
512046
DG401/883
Die Characteristics
DIE DIMENSIONS:
2150µm x 1720µm x 485 ± 25µm
METALLIZATION:
Type: Si - Al
Thickness: 12kÅ ± 1kÅ
GLASSIVATION:
Type: Nitride
Thickness: 8kÅ ± 1kÅ
WORST CASE CURRENT DENSITY:
1.5 x 105A/cm2
Metallization Mask Layout
DG401/883
D1
S1
IN1
V-
NC
GND
NC
VL
NC
NC
V+
D2
S2
IN2
Spec Number
4-5
512046
DG403/883, DG405/883
Die Characteristics
DIE DIMENSIONS:
2150µm x 1720µm x 485 ± 25µm
METALLIZATION:
Type: Si - Al
Thickness: 12kÅ ± 1kÅ
GLASSIVATION:
Type: Nitride
Thickness: 8kÅ ± 1kÅ
WORST CASE CURRENT DENSITY:
1.5 x 105A/cm2
Metallization Mask Layout
DG403/883, DG405/883
D1
S1
IN1
V-
D3
GND
S3
VL
S4
D4
V+
D2
S2
IN2
Spec Number
4-6
512046
DG401/883, DG403/883, DG405/883
Test Circuits
3V
LOGIC
INPUT
5V
tR < 20ns
tF < 20ns
50%
0V
SWITCH
INPUT
tOFF
SWITCH
INPUT
VO
D1
S1
IN1
CL
RL
LOGIC
INPUT
0.9 VO
0.9 VO
GND
V-
0V
tON
SWITCH
INPUT
(NOTE 2)
RL = 300Ω
CL = 35pF
V+
VS
VO
SWITCH
OUTPUT
+15V
VL
0V
0.9 VO
-15V
Repeat test for IN2 and S2
For load conditions, see Specifications. CL (includes fixture
and stray capacitance)
VS
NOTES:
R
1. Logic input waveform is inverted for switches that have the
opposite logic sense.
V
O
L
= V S ----------------------------------R +r
L
DS ( ON )
2. VS = 10V for tON , VS = -10V for tOFF.
FIGURE 1A.
FIGURE 1B.
FIGURE 1. SWITCHING TIME
5V
3V
LOGIC
INPUT
+15V
VL
50%
RL = 300Ω
CL = 35pF
V+
0V
VO1
SWITCH
OUTPUT
VO2
RL1
CL1
IN1
0V
VS2
RL2
LOGIC
INPUT
VO2
SWITCH
OUTPUT
D2
VS2 = 10V
0.9 VO
VO1
D1
VS1 = 10V
VS1
GND
0.9 VO
0V
V-
0V
tD
CL2
-15V
tD
CL (includes fixture and stray capacitance)
FIGURE 2A.
FIGURE 2B.
FIGURE 2. BREAK-BEFORE-MAKE
Burn-In Circuit
DG401/883, DG403/883, DG405/883
R1
1
R2
R4
S1 16
VA
A1 15
2
D3
V- 14
4
S3
VR 13
5
S4
VL 12
6
D4
V+ 11
3
R3
D1
7
A2 10
8
9
D2
S2
VC1
D2
C2
VL
V+
C3
D3
Spec Number
4-7
512046
DG401/883, DG403/883, DG405/883
Ceramic Dual-In-Line Frit Seal Packages (CerDIP)
c1
F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A)
LEAD FINISH
16 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
-D-
-A-
BASE
METAL
INCHES
(c)
E
b1
M
M
(b)
-Bbbb S
C A-B S
SECTION A-A
D S
D
BASE
PLANE
Q
-C-
SEATING
PLANE
A
α
L
S1
eA
A A
b2
b
ccc M
C A-B S
e
eA/2
c
aaa M C A - B S D S
D S
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.200
-
5.08
-
b
0.014
0.026
0.36
0.66
2
b1
0.014
0.023
0.36
0.58
3
b2
0.045
0.065
1.14
1.65
-
b3
0.023
0.045
0.58
1.14
4
c
0.008
0.018
0.20
0.46
2
c1
0.008
0.015
0.20
0.38
3
D
-
0.840
-
21.34
5
E
0.220
0.310
5.59
7.87
5
e
0.100 BSC
2.54 BSC
-
eA
0.300 BSC
7.62 BSC
-
3.81 BSC
-
eA/2
NOTES:
1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
MILLIMETERS
0.150 BSC
L
0.125
0.200
3.18
5.08
-
Q
0.015
0.060
0.38
1.52
6
S1
0.005
-
0.13
-
7
α
90o
105o
90o
105o
-
aaa
-
0.015
-
0.38
-
bbb
-
0.030
-
0.76
-
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
ccc
-
0.010
-
0.25
-
M
-
0.0015
-
0.038
2, 3
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
N
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
16
16
8
Rev. 0 4/94
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
11. Materials: Compliant to MIL-I-38535.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number
4-8
512046
DG401, DG403
DG405
DESIGN INFORMATION
Monolithic CMOS Analog Switches
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application
and design information only. No guarantee is implied.
Typical Performance Curves
4
10
VL = 5V
TA = +25oC
V+ = 15V
V- = -15V
TA = +20oC
3
tON , tOFF (ns)
8
VT (V)
6
4
DG403
SW3, 4
2
1
2
0
0
0
2
4
6
8
10
VL (V)
12
14
16
0
18 20
FIGURE 3. INPUT SWITCHING THRESHOLD vs LOGIC
SUPPLY VOLTAGE
20
FIGURE 4. INPUT SWITCHING THRESHOLD vs
POWER SUPPLY VOLTAGE
V+ = 15V
V- = -15V
VL = 5V
35
30
TA = +25oC
50
+125oC
25
RDS(ON) (Ω)
RDS(ON) (Ω)
4
6
8
10
12 14
16 18
POSITIVE/NEGATIVE SUPPLIES (±V)
60
40
+85oC
20
+25oC
15
-40oC
0oC
40
V+ = 6V, V- = -6V
V+ = 10V, V- = -10V
V+ = 22V, V- = -22V
V+ = 12V, V- = -12V
V+ = 15V, V- = -15V
V+ = 20V, V- = -20V
30
20
-55oC
10
-15
-10
-5
0
VD (V)
5
10
10
15
-25
-15
-5
5
15
26
VD (V)
FIGURE 6. RDS(ON) vs VD AND POWER SUPPLY VOLTAGE
FIGURE 5. RDS(ON) vs VD AND TEMPERATURE
70
200
180
TA = +25oC
60
V+ = 15V
V- = -15V
VL = 5V
160
V+ = 7.5V
CL = 10nF
140
50
V+ = 10V
40
Q (pC)
RDS(ON) (Ω)
2
V+ = 12V
V+ = 15V
30
CL = 1nF
100
80
60
V+ = 20V
40
V+ = 22V
20
120
0
10
0
5
10
15
20
25
VD (V)
FIGURE 7. RDS(ON) vs VD AND POWER SUPPLY VOLTAGE,
V- = -0V
CL = 100nF
C
20
A
-15
-10
-5
0
VS (V)
5
10
15
FIGURE 8. CHARGE INJECTION vs ANALOG VOLTAGE (VS)
Spec Number
4-9
512046
DG401, DG403, DG405
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application
and design information only. No guarantee is implied.
Typical Performance Curves (Continued)
0.0
100.0
10.0
-0.5
RL = 600Ω
1.0
IS(OFF) (nA)
LOSS (dB)
V+ = 15V
V- = -15V
VL = 5V
VD = ±14V
-1.0
RL = 75Ω
-1.5
V+ = 15V, V- = -15V
VL = 5V, VS = 1VRMS
SEE INSERTION LOSS TEST SETUP
-2.0
TYPICAL
0.1
0.01
RL = 50Ω
0.001
0.0001
10K
100K
1M
FREQUENCY (Hz)
-55 -35
10M
100.0
ID(ON) + IS(ON) (nA)
ID(OFF) (nA)
45
65
85
105
125
105
125
V+ = 15V
V- = -15V
VL = 5V
VD = ±14V
10.0
1.0
TYPICAL
0.1
0.01
0.001
1.0
TYPICAL
0.1
0.01
0.001
0.0001
0.0001
-55 -35
-15
5
25
45
65
85
105
125
-55 -35
-15
TEMPERATURE (oC)
5
25
45
65
85
TEMPERATURE (oC)
FIGURE 12. ID(ON) + IS(ON) vs TEMPERATURE
FIGURE 11. ID(OFF) vs TEMPERATURE
90
60
25
FIGURE 10. IS(OFF) vs TEMPERATURE
V+ = 15V
V- = -15V
VL = 5V
VD = ±14V
10.0
5
TEMPERATURE (oC)
FIGURE 9. INSERTION LOSS vs FREQUENCY
100.0
-15
100.0
WHEN VANALOG EXCEEDS POWER
SUPPLY SWITCH, SUBSTRATE
DIODES BEGIN TO CONDUCT.
10.0
V+ = 15V
V- = -15V
VL = 5V
I+
IL
IS, ID (pA)
0
I+, I -, IL, (mA)
30
ID(OFF) , IS(OFF)
-30
ID(ON) + IS(ON)
-60
0.1
0.01
V+ = 15V, V- = -15V
-90
IL
VL = 5V, TA = +25oC
ID(OFF) , VS = 0V
IS(OFF) , VD = 0V
-120
0.001
I0.0001
-150
-20
-15
-10
-5
0
VS , VD (V)
5
10
15
I-
1.0
-55 -35
20
-15
5
25
45
65
85
105
125
TEMPERATURE (oC)
FIGURE 13. LEAKAGE CURRENT vs ANALOG VOLTAGE
FIGURE 14. SUPPLY CURRENT vs TEMPERATURE
Spec Number
4-10
512046
DG401, DG403, DG405
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application
and design information only. No guarantee is implied.
Typical Performance Curves (Continued)
40
20
V+ = 15V
V- = -15V
VL = 5V
15
10
VL = 5V
35
30
tON , tOFF (ns)
VS = 10V
VS (V)
5
0
NOT MEASURABLE DUE TO
CAPACITIVE FEEDTHROUGH
-5
-10
25
20
VS = -10V
15
10
-20
5
SEE BBM TEST SETUP
SEE BBM TEST SETUP
0
-15
0
10
20
30
40
50
0
5
10
20
25
FIGURE 16. BREAK-BEFORE-MAKE vs POWER SUPPLY
VOLTAGE
FIGURE 15. BREAK-BEFORE-MAKE vs ANALOG VOLTAGE
600
240
V+ = 15V
V- = -15V
VL = 5V
540
480
tON , VS = 10V
210
180
V+ = 15V
V- = -15V
VL = 5V
tON , tOFF (ns)
420
tON , tOFF (ns)
15
POSITIVE/NEGATIVE SUPPLIES(V)
BREAK-BEFORE-MAKE TIME (ns)
360
300
240
tON, VS = 10V
150
120
90
180
tOFF , VS = -10V
tON, VS = -10V
60
tOFF , VS = 10V
120
30
60
tOFF , VS = -10V
0
0
1
2
3
VIN (V)
0
4
5
-55 -35
6
-15
5
25
45
TEMPERATURE
FIGURE 17. SWITCHING TIME vs INPUT LOGIC VOLTAGE (VIN)
REFER TO FIGURE 1 FOR TEST CONDITIONS.
65
V+ = 15V
V- = -15V
VL = 5V
140
105 125
FIGURE 18. SWITCHING TIME vs TEMPERATURE, REFER TO
FIGURE 1 FOR TEST CONDITIONS.
450
160
85
(oC)
V+ = 15V
V- = -15V
VL = 5V
400
350
120
tON
300
tON , tOFF (ns)
tON , tOFF (ns)
tON
100
tOFF
80
tOFF
60
tON, VS = 10V
250
200
150
40
100
20
50
tOFF , VS = -10V
0
0
-15
-10
-5
0
VS (V)
5
10
0
15
FIGURE 19. SWITCHING TIME vs ANALOG VOLTAGE, REFER
TO FIGURE 1 FOR TEST CONDITIONS.
1
2
3
VIN (V)
4
5
6
FIGURE 20. SWITCHING TIME vs INPUT LOGIC VOLTAGE (VIN),
REFER TO FIGURE 1 FOR TEST CONDITIONS.
Spec Number
4-11
512046
DG401, DG403, DG405
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application
and design information only. No guarantee is implied.
Typical Performance Curves (Continued)
160
200
V+ = 15V
V- = -15V
VL = 5V
140
VS = 5V
tON
180
tON , VS = 10V
VS = -5V
tON
160
120
140
tON , tOFF (ns)
tON , tOFF (ns)
tON , VS = -10V
100
tOFF , VS = 10V
80
tOFF , VS = -10V
60
VL = 5V
VS = 5V
tOFF
120
100
VS = -5V
tOFF
80
60
40
40
20
20
0
-55 -35
-15
5
25
45
65
TEMPERATURE
85
0
105 125
0
(oC)
240
V- = -5V
210
V- = -15
300
270
VS = 5V
tON
210
180
tON
V- = -15V
150
tON
120
V- = 0V
V- = -5V
90
VS = -5V
240
tON , tOFF (ns)
tON , tOFF (ns)
300
V- = 0V
180
V- = -5V
150
V- = -15V
tON
120
tOFF
V- = -15V
tON
90
V- = 0V
60
tOFF
tOFF
V- = -5V
60
30
30
0
0
0
5
10
15
20
0
25
5
10
POSITIVE SUPPLIES (V)
15
20
25
POSITIVE SUPPLIES (V)
FIGURE 23. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE,
REFER TO FIGURE 1 FOR TEST CONDITIONS.
300
FIGURE 24. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE,
REFER TO FIGURE 1 FOR TEST CONDITIONS.
300
VS = 5V
270
VS = -5V
270
240
240
210
210
V- = 0V
180
V- = -15V
V- = -5V
V- = -15V
150
tON , tOFF (ns)
tON , tOFF (ns)
25
FIGURE 22. SWITCHING TIME vs POWER SUPPLY VOLTAGE,
REFER TO FIGURE 1 FOR TEST CONDITIONS.
FIGURE 21. SWITCHING TIME vs TEMPERATURE, REFER TO
FIGURE 1 FOR TEST CONDITIONS.
270
5
10
15
20
POSITIVE/NEGATIVE SUPPLIES (V)
V- = -5V
V- = 0V
120
90
180
tON , V- = -5V
150
120
tOFF , V- = -5V
tON , V- = -15V
90
60
60
tON
tOFF
30
tOFF , V- = -15V
30
0
0
0
5
10
15
POSITIVE SUPPLIES (V)
20
25
FIGURE 25. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE,
REFER TO FIGURE 1 FOR TEST CONDITIONS.
0
5
10
15
POSITIVE SUPPLIES (V)
20
25
FIGURE 26. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE,
REFER TO FIGURE 1 FOR TEST CONDITIONS.
Spec Number
4-12
512046
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