Vishay DG405BDJ Low-power, high-speed cmos analog switch Datasheet

DG401B/403B/405B
New Product
Vishay Siliconix
Low-Power, High-Speed CMOS Analog Switches
FEATURES
D
D
D
D
D
D
D
D
44-V Supply Max Rating
"15-V Analog Signal Range
On-Resistance—r DS(on): 23 Low Leakage—ID(on): 40 pA
Fast Switching—tON: 100 ns
Upgrade to DG401/403/405
TTL, CMOS Compatible
Single Supply Capability
BENEFITS
APPLICATIONS
D Wide Dynamic Range
D Break-Before-Make Switching Action
(DG403B only)
D Simple Interfacing
D
D
D
D
Audio and Video Switching
Sample-and-Hold Circuits
Test Equipment
PBX, PABX
DESCRIPTION
The DG401B/403B/405B monolithic analog switches are
replacements for the popular DG401/403/405 analog switches
and provide improved performance, combining high speed (tON:
100 ns, typ) with low power consumption make the DG401B series
ideal for portable and battery powered applications.
Built on the Vishay Siliconix proprietary high-voltage silicon-gate
process to achieve high voltage rating and superior switch on/off
performance, break-before-make is guaranteed for the SPDT
configurations.
Each switch conducts equally well in both directions when on,
and blocks up to 30 V peak-to-peak when off. On-resistance
is very flat over the full "15-V analog range. The DG401B has
two independent SPST switches. The DG403B has four SPST
switches in NO/NC combinations. The DG405B has four
switches in two SPST pairs. (See Functional Block Diagrams
and Pin Configurations on pages 1 and 2.)
The DG401B/403B/405B is available in both 16-pin plastic dip
and 16-pin SOIC packages.
As a committed partner to the community and the
environment, Vishay Siliconix manufactures this product with
the lead (Pb)-free device terminations. For analog switching
products manufactured with 100% matte tin device
terminations, the lead (Pb)-free “—E3” suffix is being used as
a designator.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG401B
Dual-In-Line and SOIC
D1
NC
NC
NC
NC
NC
NC
D2
1
16
S1
2
15
IN1
3
14
4
13
5
12
V−
GND
Two SPST Switches per Package
TRUTH TABLE
Logic
Switch
NC
0
OFF
V+
1
ON
6
11
7
10
IN2
8
9
S2
Logic
g “0” v 0.8 V
Logic “1” w 2
2.4
4V
Top View
Document Number: 73069
S-42444—Rev. A, 10-Jan-05
www.vishay.com
1
DG401B/403B/405B
New Product
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG403B
Dual-In-Line and SOIC
D1
NC
D3
S3
S4
D4
NC
D2
1
16 S1
2
15
3
14
13
4
12
5
11
6
7
8
IN1
Four SPST Switches in Two Pairs per Package
V−
TRUTH TABLE
GND
NC
V+
10
IN2
9
S2
Logic
SW1, SW2
SW3, SW4
0
OFF
ON
1
ON
OFF
Logic “0” v 0.8 V
Logic “1”
1 w 2.4 V
Top View
DG405B
Dual-In-Line and SOIC
D1
NC
D3
S3
S4
D4
NC
D2
1
16 S1
2
15
3
14
13
4
12
5
IN1
Four SPST Switches in Two Pairs per Package
V−
TRUTH TABLE
GND
Logic
Switch
NC
0
OFF
V+
1
ON
6
11
7
10
IN2
8
9
S2
Logic “0” v 0.8 V
Logic “1” w 2.4 V
Top View
ORDERING INFORMATION
Standard
Commercial
Part Number
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2
Lead (Pb)-Free
Commercial
Part Number
DG401BDJ
DG401BDJ—E3
DG403BDJ
DG403BDJ—E3
DG405BDJ
DG405BDJ—E3
DG401BDY
DG401BDY—E3
DG403BDY
DG403BDY—E3
DG405BDY
DG405BDY—E3
DG401BDY-T1
DG401BDY-T1—E3
DG403BDY-T1
DG403BDY-T1—E3
DG405BDY-T1
DG405BDY-T1—E3
Package
Temperature
Range
16-Pin
6
Plastic Dip
p
16-Pin
6
Narrow SOIC
SO C
-40
0 to 85
85°C
C
16-Pin
16
Pi Narrow
N
SOIC
With Tape and Reel
Document Number: 73069
S-42444—Rev. A, 10-Jan-05
DG401B/403B/405B
New Product
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
V+ to V− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V
GND to V− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
Digital Inputsa VS, VD . . . . . . . . . . . . . . . . . . . . . . . (V−) − 0.3 V to (V+) +0.3 V
or 30 mA, whichever occurs first
Current (Any Terminal) Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Current, S or D (Pulsed 1 ms 10% duty) . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
Storage Temperature (DJ, DY Suffix) . . . . . . . . . . . . . . . . . . . . . −65 to 125_C
Power Dissipation (Package)b
16-Pin Plastic DIPc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
16-Pin SOICd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V− will be clamped by internal
diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mW/_C above 75_C
d. Derate 7.6 mW/_C above 75_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
SPECIFICATIONSa
Test Conditions
Unless Specified
Parameter
Limits
−40 to 85_C
V+ = 15 V, V− = −15 V, VIN = 2.4 V, 0.8 Vf
Tempb
Mind
Full
−15
rDS(on)
IS = −10 mA, VD = "10 V
V+ = 13.5 V, V− = −13.5 V
Room
Full
23
45
55
rDS(on)
IS = −10 mA, VD = "5 V, 0 V
V+ = 16.5 V, V− = −16.5 V
Room
Full
0.72
3
5
Symbol
Typc
Maxd
Unit
15
V
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
Drain-Source On-Resistance
VANALOG
IS(off)
Switch Off Leakage Current
ID(off)
V+ = 16.5, V− = −16.5 V
VD = "15.5 V, VS = #15.5 V
Room
Hot
−0.5
−5
−0.01
0.5
5
Room
Hot
−0.5
−5
−0.01
0.5
5
ID(on)
V+ = 16.5 V, V− = −16.5 V
VS = VD = "15.5 V
Room
Hot
−1
−10
−0.04
1
10
Input Current VIN Low
IIL
VIN under test = 0.8 V, All Other = 2.4 V
Full
−1
0.005
1
Input Current VIN High
IIH
VIN under test = 2.4 V, All Other = 0.8 V
Full
−1
0.005
1
Turn-On Time
tON
100
150
tOFF
RL = 300 , CL = 35 pF
See Figure 2
Room
Turn-Off Time
Room
60
100
tD
RL = 300 , CL = 35 pF
Room
Channel On Leakage Current
nA
Digital Control
A
Dynamic Characteristics
Break-Before-Make Time Delay (DG403B)
Charge Injection
5
Q
CL = 10,000 pF, Vgen = 0 V, Rgen = 0 Room
60
Off Isolation Reject Ratio
OIRR
Room
−81.7
Channel-to-Channel Crosstalk
XTALK
RL = 100 , CL = 5 pF
f = 1 MHz
Room
−94.8
Source Off Capacitance
CS(off)
Room
12
Drain Off Capacitance
CD(off)
Room
12
CD, CS(on)
Room
39
Positive Supply Current
I+
Room
Full
0.250
Negative Supply Current
I−
Channel On Capacitance
f = 1 MHz,, VS = 0 V
ns
12
pC
dB
pF
p
Power Supplies
Ground Current
IGND
V+ = 16.5 V, V− = −16.5 V
VIN = 0 or 5 V
Room
Full
−0.5
−1
0.25
Room
Full
−0.5
−1
0.25
0.5
1
mA
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f.
VIN = input voltage to perform proper function.
Document Number: 73069
S-42444—Rev. A, 10-Jan-05
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DG401B/403B/405B
New Product
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Supply Current vs. Temperature
Supply Current vs. Switching Frequency
100000
60
50
10000
Supply Current (mA)
ICC − Supply Current (pA)
V+ = 15 V
V− = −15 V
1000
I+
I−
100
10
40
30
20
10
1
0
−55
−25
5
35
65
95
0
125
2000
Temperature (_C)
rON vs. Analog Voltage and Supply Voltage
12000
50
45
40
VCC = 7.5 V
VCC = 10 V
VCC = 12 V
VCC = 15 V
VCC = 20 V
VCC = 22 V
80
rON − On-Resistance ( Ω )
rON − On-Resistance ( Ω )
VCC = #6 V
VCC = #10 V
VCC = #12 V
VCC = #15 V
VCC = #20 V
VCC = #22 V
35
30
25
70
60
50
40
30
20
15
10
−25 −20 −15 −10
10
−5
0
5
10
15
20
25
0
VD − Analog Voltage (V)
125 _C
85 _C
25 _C
0 _C
−40 _C
−55 _C
45
80
60
Leakage Current (pA)
50
40
35
30
25
5
VD − Analog Voltage (V)
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10
15
V+ = 15 V
V− = −15 V
For ID(off), VS = 0 V
For IS(off), VD = 0 V
−20
ID(on)
ID(off)
IS(off)
−40
−80
0
25
0
15
−5
20
20
−60
−10
15
40
20
10
−15
10
Leakage Current vs. Analog Voltage
100
VCC = #15 V
IS = 10 mA
5
VD − Analog Voltage (V)
rON vs. Analog Voltage and Temperature
rON − On-Resistance ( Ω )
10000
rON vs. Analog Voltage and Single Supply Voltage
20
4
8000
90
55
55
6000
Frequency (kHz)
60
60
4000
−100
−15
−5
5
15
VD − Analog Voltage (V)
Document Number: 73069
S-42444—Rev. A, 10-Jan-05
DG401B/403B/405B
New Product
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Leakage Current vs. Temperature
Switching Time vs. Supply Voltage
10000
150
t(on), VS = +5 V
t(on), VS = −5 V
t(off), VS = −5 V
t(off), VS = +5 V
Switching Time (nS)
Leakage Current (pA)
125
1000
100
IS(off)
ID(on)
ID(off)
10
100
75
50
25
1
0
−55
−25
5
35
65
95
125
0
"5
"10
Switching Time vs. Single Supply Voltage
"20
80
t(on), VS = +5 V
t(off), VS = +5 V
225
70
Switching Time (nS)
200
175
150
125
100
75
50
t(on), VS = +10 V
t(on), VS = −10 V
t(off), VS = +10 V
t(off), VS = −10 V
60
50
40
30
V+ = 15 V
V− = −15 V
25
0
0
5
10
15
20
20
−55
25
−25
Supply Voltage (V)
5
35
65
95
125
Temperature (_C)
Insertion Loss, Off -Isolation
Crosstalk vs. Frequency
Input Switching Threshold vs. Supply Voltage
3.0
−10
2.8
10
2.6
2.4
Loss, OIRR, X TALK (dB)
VTH − Input Threshold Voltage (V)
"25
Switching Time vs. Temperature
250
Switching Time (nS)
"15
Supply Voltage (V)
Temperature (_C)
2.2
2.0
1.8
1.6
1.4
1.2
1.0
Insertion Loss
30
50
Off Isolation
70
Cross Talk
90
110
0.8
0.6
5
10
15
20
Supply Voltage (V)
Document Number: 73069
S-42444—Rev. A, 10-Jan-05
25
30
130
0.01
0.1
1
10
Frequency (MHz)
100
1000
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DG401B/403B/405B
New Product
Vishay Siliconix
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
S
V−
Level
Shift/
Drive
VIN
V+
GND
D
V−
FIGURE 1.
TEST CIRCUITS
VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the output waveform.
Logic
Input
+15 V
V+
S
"10 V
D
VO
IN
RL
1 k
V−
GND
Switch
Input*
50%
0V
tOFF
VS
VO
90%
CL
35 pF
Switch
Output
Switch
Input*
−15 V
0V
tON
90%
VO
−VS
*VS = 10 V for tON, VS = −10 V for tOFF
CL (includes fixture and stray capacitance)
RL
VO = VS
tr <20 ns
tf <20 ns
3V
Note:
RL + rDS(on)
Logic input waveform is inverted for switches that
have the opposite logic sense control
FIGURE 2. Switching Time
+15 V
Logic
Input
V+
VS1
VS2
S1
D1
S2
D2
GND
VO1
Switch
Output
RL1
V−
RL2
CL1
CL2
50%
0V
VS1
VO1
VO2
IN
3V
Switch
Output
0V
VS2
VO2
0V
90%
90%
tD
tD
−15 V
CL (includes fixture and stray capacitance)
FIGURE 3. Break-Before-Make
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Document Number: 73069
S-42444—Rev. A, 10-Jan-05
DG401B/403B/405B
New Product
Vishay Siliconix
TEST CIRCUITS
+15 V
V+
Rg
S
D
VO
IN
Vg
IN
CL
10 nF
3V
VO
VO
On
On
Off
V−
GND
Q = VO x CL
−15 V
FIGURE 4. Charge Injection
+15 V
C
V+
S
VS
D
Rg = 50 C
RL
100 IN
0V, 2.4 V
+15 V
VO
V+
S
VS
GND
V−
C
Rg = 50 −15 V
RL
100 IN
0V, 2.4 V
Off Isolation = 20 log
GND
VS
V−
−15 V
C = RF bypass
FIGURE 5. Off Isolation
FIGURE 6. Insertion Loss
C
+15 V
V+
S1
VS
D
C
Rg = 50 50 VO
C
VO
C = RF bypass
+15 V
VO
D
V+
S2
S
Meter
RL
IN
0.8 V
GND
0 V, 2.4 V
IN
C
V−
D
GND
V−
−15 V
XTALK Isolation = 20 log
C = RF bypass
C
f = 1 MHz
VS
VO
FIGURE 7. Crosstalk
Document Number: 73069
S-42444—Rev. A, 10-Jan-05
HP4192A
Impedance
Analyzer
or Equivalent
−15 V
FIGURE 8. Capacitances
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DG401B/403B/405B
New Product
Vishay Siliconix
APPLICATIONS
+15 V
+15 V
V+
V+
Left
Source 1
Right
Left
S1
D1
S3
D3
Left
D1
S3
D3
S2
D2
S4
D4
Right
Integrate/
Reset
TTL
eout
C1
S2
D2
S4
D4
C2
IN2
IN2
TTL
Channel
Select
+
−
IN1
IN1
Source 2
Right
ein
S1
DG403B
GND
V−
Slope
Select
DG403B
GND
V−
−15 V
−15 V
FIGURE 9. Stereo Source Selector
FIGURE 10. Dual Slope Integrator
Dual Slope Integrators
+15 V
The DG403B is well suited to configure a selectable slope
integrator. One control signal selects the timing capacitor C1
or C2. Another one selects ein or discharges the capacitor in
preparation for the next integration cycle.
V+
S1
D1
S3
D3
IN1
Band-Pass Switched Capacitor Filter
Single-pole double-throw switches are a common element for
switched capacitor networks and filters. The fast switching
times and low leakage of the DG403B allow for higher clock
rates and consequently higher filter operating frequencies.
ein
S2
D2
S4
D4
IN2
Clock
DG403B
GND
V−
−15 V
+
−
eout
FIGURE 11. Band-Pass Switched Capacitor Filter
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Document Number: 73069
S-42444—Rev. A, 10-Jan-05
DG401B/403B/405B
New Product
Vishay Siliconix
APPLICATIONS
Peak Detector
A3 acting as a comparator provides the logic drive for
operating SW1. The output of A2 is fed back to A3 and
compared to the analog input ein. If ein > eout the output of A3
is high keeping SW1 closed. This allows C1 to charge up to the
analog input voltage. When ein goes below eout A3 goes
negative, turning SW1 off. The system will therefore store the
most positive analog input experienced.
Reset
SW2
ein
−
A1
+
+
A3
−
SW1
R1
+
A2
−
DG401B
eout
C1
FIGURE 12. Positive Peak Detector
Document Number: 73069
S-42444—Rev. A, 10-Jan-05
www.vishay.com
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Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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