Vishay DG408LDQ-E3 Precision 8-ch/dual 4-ch low voltage analog multiplexer Datasheet

DG408L/409L
Vishay Siliconix
Precision 8-Ch/Dual 4-Ch Low Voltage Analog Multiplexers
DESCRIPTION
FEATURES
The DG408L/409L are low voltage pin-for-pin compatible
companion devices to the industry standard DG408/409 with
improved performance.
Using BiCMOS wafer fabrication technology allows the
DG408L/409L to operate on single and dual supplies. Single
supply voltage ranges from 3 to 12 V while dual supply
operation is recommended with ± 3 to ± 6 V.
The DG408L is an 8 Channel single-ended analog
multiplexer designed to connect one of eight inputs to a
common output as determined by a 3 bit binary address (A0,
A1, A2). The DG409L is a dual 4 Channel differential analog
multiplexer designed to connect one of four differential
inputs to a common dual output as determined by its 2 bit
binary address (A0, A1). Break-before-make switching action
to protect against momentary crosstalk between adjacent
channels.
The DG408L/409L provides lower on-resistance, faster
switching time, lower leakage, less power consumption and
higher off-Isolation than the DG408/409.
• Pin-For-Pin compatibility with DG408/409
• 2.7- to 12 V Single Supply or ± 3 to ± 6 V
Dual Supply Operation
• Lower On-Resistance: rDS(on) - 17 Ω Typ.
• Fast Switching: tON - 38 ns, tOFF - 18 ns
• Break-Before-Make Guaranteed
• Low Leakage: IS(off) - 0.2 nA Max.
• Low Charge Injection: 1 pC
• TTL, CMOS, LV Logic (3 V) Compatible
• - 82 dB Off-Isolation at 1 MHz
• 2000 V ESD Protection (HBM)
Pb-free
Available
RoHS*
COMPLIANT
BENEFITS
•
•
•
•
High Accuracy
Single and Dual Power Rail Capacity
Wide Operating Voltage Range
Simple Logic Interface
APPLICATIONS
•
•
•
•
•
•
•
Data Acquisition Systems
Battery Operated Equipment
Portable Test Equipment
Sample and Hold Circuits
Communication Systems
SDSL, DSLAM
Audio and Video Signal Routing
FUNCTIONAL BLOCK DIAGRAMS AND PIN CONFIGURATIONS
DG408L
Dual-In- Line, SOIC and TSSOP
A0
EN
VS1
S2
S3
S4
D
16
1
2
Decoders/Drivers
15
3
14
4
13
5
12
6
11
7
10
8
9
DG409L
Dual-In- Line, SOIC and TSSOP
A1
A0
A2
EN
GND
V-
V+
S1a
S5
S2a
S6
S3a
S7
S4a
S8
Da
Top View
16
1
2
Decoders/Drivers
15
3
14
4
13
5
12
6
11
7
10
8
9
A1
GND
V+
S1b
S2b
S3b
S4b
Db
Top View
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 71342
S-71241–Rev. E, 25-Jun-07
www.vishay.com
1
DG408L/409L
Vishay Siliconix
TRUTH TABLE - DG408L
TRUTH TABLE - DG409L
A2
A1
A0
EN
On Switch
A1
A0
EN
On Switch
X
X
X
1
None
X
X
0
None
0
0
0
0
1
0
0
1
1
0
0
1
1
2
0
1
1
2
0
1
0
1
3
1
0
1
3
0
1
1
1
4
1
1
1
4
1
0
0
1
5
1
0
1
1
6
1
1
0
1
7
1
1
1
1
8
Logic "0" = VAL ≤ 0.8 V
Logic "1" = VAH ≥ 2.4 V
X = Do not Care
For low and high voltage levels for VAX and VEN consult “Digital Control” parameters for specific V+ operation.
ORDERING INFORMATION - DG408L
Temp Range
Package
Part Number
16-Pin SOIC
DG408LDY
DG408LDY-E3
DG408LDY-T1
DG408LDY-T1-E3
16-Pin TSSOP
DG408LDQ
DG408LDQ-E3
DG408LDQ-T1
DG408LDQ-T1-E3
ORDERING INFORMATION - DG409L
Temp Range
- 40 to 85 °C
Package
Part Number
16-Pin SOIC
DG409LDY
DG409LDY-E3
DG409LDY-T1
DG409LDY-T1-E3
16-Pin TSSOP
DG409LDQ
DG409LDQ-E3
DG409LDQ-T1
DG409LDQ-T1-E3
- 40 to 85 °C
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
Voltage Referenced V+ to V-
14
GND
7
a
Current (Any Terminal)
30
Peak Current, S or D (Pulsed at 1 ms, 10 % Duty Cycle Max)
100
(A Suffix)
- 65 to 150
(D Suffix)
- 65 to 125
16-Pin Plastic TSSOPc
Power Dissipation (Package)b
V
(V-) - 0.3 to (V) + 0.3
Digital Inputs , VS, VD
Storage Temperature
Unit
16-Pin Narrow SOIC
16-Pin CerDIP
LCC-20e
d
c
mA
°C
650
600
900
mW
750
Notes:
a. Signals on SX, DX, AX, or EN exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 7.6 mW/°C above 75 °C.
d. Derate 12 mW/°C above 75 °C.
e. Derate 10 mW/°C above 75 °C.
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Document Number: 71342
S-71241–Rev. E, 25-Jun-07
DG408L/409L
Vishay Siliconix
SPECIFICATIONS (SINGLE SUPPLY 12 V)
Test Conditions
Unless Otherwise Specified
V+ = 12 V, ± 10 %, V- = 0 V
Parameter
Symbol
VEN = 0.8 V or 2.4 Vf
Tempb
Typd
A Suffix
- 55 to 125 °C
D Suffix
- 40 to 85 °C
Minc
Maxc
Minc
Maxc
Unit
0
12
0
12
V
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
rDS(on) Matching
VANALOG
rDS(on)
ΔrDS
Between Channelsg
On-Resistance Flatnessi
rFLAT(on)
IS(off)
Switch Off Leakage Current
ID(off)
Channel On Leakage Current
ID(on)
Full
VD = 10.8 V, VD = 2 V or 9 V, IS = 10 mA
Sequence Each Switch On
Room
Full
17
29
38
29
35
VD = 10.8 V, VD = 2 V or 9 V
IS = 10 mA
Room
1
3
3
Room
3
VEN = 0 V, VD = 11 V or 1 V
VS = 1 V or 11 V
VS = VD = 1 V or 11 V
7
Ω
7
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
2.4
nA
Digital Control
Logic High Input Voltage
VINH
Full
Logic Low Input Voltage
VINL
Full
2.4
0.8
0.8
IIN
VAX = VEN = 2.4 V or 0.8 V
Full
Transition Time
tTRANS
VS1 = 8 V, VS8 = 0 V, (DG408L)
VS1b = 8 V, VS4b = 0 V, (DG409L)
See Figure 2
Room
Full
30
Break-Before-Make Time
tOPEN
VS(all) = VDA = 5 V
See Figure 4
Room
Full
11
Room
Full
38
55
60
55
60
Room
Full
18
25
35
25
30
Room
1
5
5
Room
- 70
Room
- 82
Input Current
- 1.5
1.5
-1
1
V
µA
Dynamic Characteristics
Enable Turn-On Time
tON(EN)
Enable Turn-Off Time
tOFF(EN)
VAX = 0 V, VS1 = 5 V (DG408L)
VAX = 0 V, VS1b = 5 V (DG409L)
See Figure 3
Q
CL = 1 nF, VGEN = 0 V, RGEN = 0 Ω
Charge Injectione
Off Isolatione, h
OIRR
Crosstalke
XTALK
Source Off Capacitancee
Drain Off Capacitance
Drain On
e
Capacitancee
f = 100 kHz, RL = 1 kΩ
60
68
1
60
65
1
ns
CS(off)
f = 1 MHz, VS = 0 V, VEN = 0 V
Room
7
CD(off)
f = 1 MHz, VD = 2.4 V, VEN = 0 V
Room
20
CD(on)
f = 1 MHz, VD = 0 V, VEN = 2.4 V
(DG409L only)
Room
31
VEN = VA = 0 V or 5 V
Room
0.2
pC
dB
pF
Power Supplies
Power Supply Range
V+
Power Supply Current
I+
3
12
0.7
3
12
V
0.7
mA
Notes:
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. ΔrDS(on) = rDS(on) Max - rDS(on) Min.
h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin.
i. rDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal.
Document Number: 71342
S-71241–Rev. E, 25-Jun-07
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DG408L/409L
Vishay Siliconix
SPECIFICATIONS (DUAL SUPPLY V+ = 5 V, V = 5 V)
Test Conditions
Unless Otherwise Specified
V+ = 5 V, ± 10 %, V- = - 5 V, V- = 0 V
Parameter
Symbol
VEN = 0.6 V or 2.4 Vf
Tempb
Typd
A Suffix
- 55 to 125 °C
D Suffix
- 40 to 85 °C
Minc
Maxc
Minc
Maxc
Unit
-5
5
-5
5
V
40
50
Ω
Analog Switch
rDS(on)
IS(off)
Switch Off Leakage Currenta
ID(off)
Channel On Leakage
Currenta
ID(on)
Full
VD = ± 3.5 V, IS = 10 mA
Sequence Each Switch On
V+ = 5.5 , V- = 5.5 V
VEN = 0 V, VD = ± 4.5 V, VS =
V+ = 5.5 V, V- = - 5.5 V
VEN = 2.4 V, VD = ± 4.5 V, VS =
Room
Full
4.5 V
±
Drain-Source On-Resistance
VANALOG
±
Analog Signal Rangee
4.5 V
20
40
50
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
2.4
nA
Digital Control
Logic High Input Voltage
VINH
Full
Logic Low Input Voltage
VINL
Full
Input Currenta
2.4
0.6
0.6
IIN
VAX = VEN = 2.4 V or 0.6 V
Full
Transition Timee
tTRANS
VS1 = 3.5 V, VS8 = - 3.5 V, (DG408L)
VS1b = 3.5 V, VS4b = - 3.5 V, (DG409L)
See Figure 2
Room
Full
30
Break-Before-Make Timee
tOPEN
VS(all) = VDA = 3.5 V
See Figure 4
Room
Full
8
Room
Full
25
55
68
55
60
Room
Full
20
40
50
40
45
- 1.5
1.5
-1
1
V
µA
Dynamic Characteristics
1
60
65
1
ns
Enable Turn-On Timee
tON(EN)
Enable Turn-Off Timee
tOFF(EN)
VAX = 0 V, VS1 = 3.5 V (DG408L)
VAX = 0 V, VS1b = 3.5 V (DG409L)
See Figure 3
Source Off Capacitancee
CS(off)
f = 1 MHz, VS = 0 V, VEN = 0 V
Room
6
Drain Off Capacitancee
CD(off)
f = 1 MHz, VD = 0 V, VEN = 0 V
Room
15
Capacitancee
CD(on)
f = 1 MHz, VD = 0 V, VEN = 2.4 V
Room
29
Drain On
60
78
pF
Notes:
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. ΔrDS(on) = rDS(on) Max - rDS(on) Min.
h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin.
i. rDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal.
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Document Number: 71342
S-71241–Rev. E, 25-Jun-07
DG408L/409L
Vishay Siliconix
SPECIFICATIONS (SINGLE SUPPLY 5 V)
Test Conditions
Unless Otherwise Specified
V+ = 5 V, ± 10 %, V- = 0 V
Parameter
Symbol
VEN = 0.6 V or 2.4 Vf
Tempb
Typd
A Suffix
- 55 to 125 °C
D Suffix
- 40 to 85 °C
Minc
Maxc
Minc
Maxc
Unit
0
5
0
5
V
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
rDS(on) Matching Between
Channelsg
On-Resistance Flatnessi
VANALOG
rDS(on)
ΔrDS
rFLAT(on)
IS(off)
Switch Off Leakage
Currenta
ID(off)
Channel On Leakage
ID(on)
Currenta
Full
V+ = 4.5 V, VD or VS = 1 V or 3.5 V,
ID = 5 mA
Room
Full
35
49
62
40
62
V+ = 4.5 V, VD = 1 V or 3.5 V,
IS = 5 mA
Room
1.5
3
3
4
4
V+ = 5.5 V, VS = 1 V or 4 V
VD = 4 V or 1 V
V+ = 5.5 V, VD = VS = 1 V or 4 V
Sequence Each Switch On
Room
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Full
2.4
Ω
nA
Digital Control
Logic High Input Voltage
VINH
Logic Low Input Voltage
VINL
Input Currenta
V+ = 5 V
Full
2.4
0.6
0.6
IIN
VAX = VEN = 2.4 V or 0.6 V
Full
Transition Timee
tTRANS
VS1 = 3.5 V, VS8 = 0 V, (DG408L)
VS1b = 3.5 V, VS4b = 0 V, (DG409L)
See Figure 2
Room
Full
44
Break-Before-Make Timee
tOPEN
VS(all) = VDA = 3.5 V,
See Figure 4
Room
Full
17
Room
Full
43
60
70
60
65
Room
Full
26
45
60
45
50
Room
1
5
5
Room
- 70
Room
- 80
f = 1 MHz, VS = 0 V, VEN = 0 V
Room
8
CD(off)
f = 1 MHz, VD = 0 V, VEN = 0 V
Room
21
CD(on)
f = 1 MHz, VD = 0 V, VEN = 2.4 V
(DG409L only)
Room
32
- 1.5
1.5
-1
1
V
µA
Dynamic Characteristics
Enable Turn-On Timee
tON(EN)
Enable Turn-Off Timee
tOFF(EN)
VAX = 0 V, VS1 = 3.5 V (DG408L)
VAX = 0 V, VS1b = 3.5 V (DG409L)
See Figure 3
Charge Injectione
Q
CL = 1 nF, RGEN = 0 Ω, VGEN = 0 Ω
Isolatione, h
OIRR
Off
Crosstalke
XTALK
Source Off Capacitancee
Drain Off Capacitance
Drain On
e
Capacitancee
CS(off)
f = 100 kHz, RL = 1 kΩ
125
138
1
125
135
1
ns
pC
dB
pF
Notes:
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. ΔrDS(on) = rDS(on) Max - rDS(on) Min.
h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin.
i. rDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal.
Document Number: 71342
S-71241–Rev. E, 25-Jun-07
www.vishay.com
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DG408L/409L
Vishay Siliconix
SPECIFICATIONS (SINGLE SUPPLY 3 V)
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 3 V, ± 10 %, V- = 0 V
VEN = 0.4 V or 2.0 Vf
Tempb
Typd
A Suffix
- 55 to 125 °C
D Suffix
- 40 to 85 °C
Minc
Maxc
Minc
3
0
Maxc
Unit
3
V
80
100
Ω
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
VANALOG
rDS(on)
Full
V+ = 2.7 V, VD = 0.5 or 2.2 V,
IS = 5 mA
IS(off)
Switch Off Leakage Currenta
V+ = 3.3 V, VS = 2 or 1 V, VD = 1 or 2 V
ID(off)
Channel On Leakage
Currenta
ID(on)
V+ = 3.3 V, VD = VS = 1 or 2 V
Sequence Each Switch On
Room
Full
0
60
80
105
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
2
nA
Digital Control
Logic High Input Voltage
VINH
Full
Logic Low Input Voltage
VINL
Full
Input Currenta
2
0.4
0.4
IIN
VAX = VEN = 2.4 V or 0.4 V
Full
Transition Time
tTRANS
VS1 = 1.5 V, VS8 = 0 V, (DG408L)
VS1b = 1.5 V, VS4b = 0 V, (DG409L)
See Figure 2
Room
Full
75
Break-Before-Make Time
tOPEN
VS(all) = VDA = 1.5 V,
See Figure 4
Room
Full
32
Room
Full
70
95
115
95
105
Room
Full
55
100
115
100
105
5
5
- 1.5
1.5
-1
1
V
µA
Dynamic Characteristics
Enable Turn-On Time
tON(EN)
Enable Turn-Off Time
tOFF(EN)
VAX = 0 V, VS1 = 1.5 V (DG408L)
VAX = 0 V, VS1b = 1.5 V (DG409L)
See Figure 3
Q
CL = 1 nF, RGEN = 0 Ω, VGEN = 0 V
Charge Injectione
Off Isolation
e, h
OIRR
Crosstalke
XTALK
Source Off Capacitancee
e
Drain Off Capacitance
Drain On
Capacitancee
RL = 1 kΩ, f = 100 kHz
150
175
1
150
175
1
ns
Room
0.4
Room
- 70
Room
- 79
CS(off)
f = 1 MHz, VS = 0 V, VEN = 0 V
Room
8
CD(off)
f = 1 MHz, VD = 0 V, VEN = 0 V
Room
19
CD(on)
f = 1 MHz, VD = 0 V, VEN = 2 V
(DG409L only)
Room
33
pC
dB
pF
Notes:
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. ΔrDS(on) = rDS(on) Max - rDS(on) Min.
h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin.
i. rDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 71342
S-71241–Rev. E, 25-Jun-07
DG408L/409L
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
25
rDS(on) – Drain-Source On-Resistnace (Ω)
rDS(on) – Drain-Source On-Resistnace (Ω)
80
70
60
V+ = 2.7 V
50
40
V+ = 4.5 V
30
V+ = 12 V
20
10
0
20
V+ = 5 V
V- = - 5 V
15
10
5
0
0
2
4
6
8
10
12
-5
-3
-1
VD – Drain Voltage (V)
5
rDS(on) vs. VD and Power Supply
1.8
50
rDS(on) – Drain-Source On-Resistnace (Ω)
Upper Threshold Limit
1.6
1.4
1.2
VT (V)
3
VD – Drain Voltage (V)
rDS(on) vs. VD and Power Supply
Low Threshold Limit
1.0
0.8
0.6
0.4
0.2
0.0
85 °C
125 °C
40
30
25 °C
- 55 °C
20
10
0
0
2
4
6
8
10
12
14
0
1
2
V+ – Positive Supply Voltage (V)
3
4
5
6
VD – Drain Voltage (V)
rDS(on) vs. VD and Temperature
Input Threshold vs. V+ Supply Voltage
35
70
30
60
85 °C
25
Switching Speed (nS)
rDS(on) – Drain-Source On-Resistnace (Ω)
1
125 °C
20
25 °C
15
- 55 °C
10
50
40
tTRANS
30
tON
20
tOFF
5
10
0
0
-6
-4
-2
0
2
VD – Drain Voltage (V)
rDS(on) vs. VD and Temperature
Document Number: 71342
S-71241–Rev. E, 25-Jun-07
4
6
0
2
4
6
8
10
12
14
V+ – Positive Supply Voltage (V)
Switching Time vs. Positive Supply Voltage
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DG408L/409L
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
40
10
35
IS(off)
Switching Speed (nS)
Leakage Current (pA)
0
- 10
ID(off)
ID(on)
- 20
30
tON
25
tTRANS
20
tOFF
15
10
- 30
5
- 40
-5
0
-3
-1
1
3
3
5
4
VD, V S – Analog Voltage (V)
5
6
± – Dual Power Supply Voltage (V)
Leakage Current vs. Analog Voltage
Switching Time vs. Dual Power Supply Voltage
1.0
10
- 10
0.8
V+ = 12 V
V- = 0 V
V+ = 3 V
V- = 0 V
RL = 50 Ω
- 30
Loss (dB)
Q – Charge Injection (pC)
CL = 1000 pF
0.6
- 50
Insertion Loss
- 3 dB = 280 MHz
Off Isolation
0.4
V+ = 5 V
V- = - 5 V
- 70
V+ = 5 V
V- = 0 V
0.2
Crosstalk
- 90
0.0
-5
- 110
0
5
10
0.1
1
1000
Frequency (MHz)
Charge Injection vs. Analog Voltage
Insertion Loss, Off Isolation and Crosstalk
vs. Frequency (Single Supply)
35
35
CD, CS – Drain/Source Capacitance (pF)
CD, CS – Drain/Source Capacitance (pF)
100
10
VS – Source Voltage (V)
CD(on)
30
V+ = 12 V
V– = 0 V
25
20
CD(off)
15
10
CS(off)
5
0
0
2
4
6
8
10
12
Drain/Source Capacitance vs. Analog Voltage
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CD(on)
30
V+ = 5 V
V- = - 5 V
25
20
CD(off)
15
10
CS(off)
5
0
-5
-4
-3
-2
-1
0
1
2
3
4
5
Drain/Source Capacitance vs. Analog Voltage
Document Number: 71342
S-71241–Rev. E, 25-Jun-07
DG408L/409L
Vishay Siliconix
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
GND
D
A0
V+
VLevel
Shift
AX
Decode/
Drive
S1
V+
EN
Sn
V-
Figure 1.
TEST CIRCUITS
V+
V+
A2
S1
A1
50 Ω
A0
3V
EN
VS1
S2 - S7
DG408L
S8
VS8
VO
D
GND
V35 pF
300 Ω
Logic
Input
VAX
tr < 20 ns
tf < 20 ns
3V
50 %
0V
VVS1
VO
A1
tTRANS
VSB4
DG409L
3V
90 %
VS8
S1a - S4a, Da
V+
S4b
50 Ω
VO
Db
EN
GND
50 %
VS1
S1b
A0
90 %
Switch
Output
V+
V300 Ω
35 pF
S1 ON
tTRANS
S8 ON (DG408L)
or
S4 ON (DG409L)
V-
Figure 2. Transition Time
Document Number: 71342
S-71241–Rev. E, 25-Jun-07
www.vishay.com
9
DG408L/409L
Vishay Siliconix
TEST CIRCUITS
V+
V+
VS1
S1
EN
S2 - S8
A0
DG408L
A1
A2
GND
VO
D
V-
50 Ω
300 Ω
tr < 20 ns
tf < 20 ns
3V
Logic
Input
50 %
0V
35 pF
tON(EN)
V-
tOFF(EN)
0V
10 %
V+
Switch
Output
VO
V+
90 %
VS1
S1b
VO
EN
S1a - S4a, Da
S2b - S4b
A0
DG409L
A1
Db
GND
VO
V-
50 Ω
300 Ω
35 pF
V-
Figure 3. Enable Switching Time
bbm.5
EN
3V
V+
4/9
All S and Da
A0
VS1
tr < 20 ns
tf < 20 ns
3V
50 %
0V
DG408L
DG409L
A1
A2
Db, D
GND
50 Ω
Logic
Input
VO
VS
V-
V-
300 Ω
80 %
Switch
Output
35 pF
VO
0V
tOPEN
Figure 4. Break-Before-Make Interval
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Document Number: 71342
S-71241–Rev. E, 25-Jun-07
DG408L/409L
Vishay Siliconix
TEST CIRCUITS
V+
Rg
V+
SX
Vg
OFF
ON
OFF
0V
A0
Channel
Select
3V
Logic
Input
EN
VO
D
A1
CL
1 nF
A2
GND
V-
ΔVO
Switch
Output
ΔVO is the measured voltage due to charge transfer
error Q, when the channel turns off.
V-
Q = CL x ΔVO
Figure 5. Charge Injection
V+
V+
VIN
VS
VIN
V+
SX
SX
VS
Rg = 50 Ω
S8
A0
D
A2
EN
GND
S8
VO
A1
RL
1 kΩ
V-
V+
S1
A0
Rg = 50 Ω
D
VO
A1
A2
EN
GND
RL
1 kΩ
V-
VVOUT
Off Isolation = 20 log
VCrosstalk = 20 log
VIN
VOUT
VIN
Figure 6. Off Isolation
Figure 7. Crosstalk
V+
V+
VS
V+
S1
Rg = 50 Ω
V+
A0
D
VO
Channel
Select
A1
A2
GND
EN
V-
RL
1 kΩ
S1
Meter
A2
S8
A1
A0
D
GND
VInsertion Loss = 20 log
V-
f = 1 MHz
VOUT
VIN
Figure 8. Insertion Loss
EN
HP4192A
Impedance
Analyzer
or Equivalent
V-
Figure 9. Source Drain Capacitance
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?71342.
Document Number: 71342
S-71241–Rev. E, 25-Jun-07
www.vishay.com
11
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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