NSC DM54LS42W Decimal decoder Datasheet

54LS42/DM54LS42/DM74LS42 BCD/Decimal Decoders
General Description
Features
These BCD-to-decimal decoders consist of eight inverters
and ten, four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding
by the NAND gates. Full decoding of input logic ensures
that all outputs remain off for all invalid (10–15) input conditions.
Y
Connection Diagram
Function Table
Y
Y
Y
Diode clamped inputs
Also for applications as 4-line-to-16-line decoders; 3line-to-8-line decoders
All outputs are high for invalid input conditions
Alternate Military/Aerospace device (54LS42) is available. Contact a National Semiconductor Sales Office/
Distributor for specifications.
Dual-In-Line Package
No.
TL/F/6365 – 1
Order Number 54LS42DMQB, 54LS42FMQB,
DM54LS42J, DM54LS42W, DM74LS42M or DM74LS42N
See NS Package Number J16A, M16A, N16E or W16A
BCD Inputs
Decimal Outputs
D
C
B
A
0
1
2
0
1
2
3
4
L
L
L
L
L
L
L
L
L
H
L
L
H
H
L
L
H
L
H
L
L
H
H
H
H
H
L
H
H
H
H H H H H H H H
H H H H H H H H
L H H H H H H H
H L H H H H H H
H H L H H H H H
3
5
6
7
8
9
L
L
L
H
H
H
H
H
L
L
L
H
H
L
L
H
L
H
L
H
H H
H H
H H
H H
H H
H H H L
H H H H
H H H H
H H H H
H H H H
H H H H
L H H H
H L H H
H H L H
H H H L
I
N
V
A
L
I
D
H
H
H
H
H
H
L
L
H
H
H
H
H
H
L
L
H
H
L
H
L
H
L
H
H H
H H
H H
H H
H H
H H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
4
H
H
H
H
H
H
5
H
H
H
H
H
H
6
7
H
H
H
H
H
H
8
H
H
H
H
H
H
9
H
H
H
H
H
H
H e High Level
L e Low Level
Logic Diagram
TL/F/6365 – 2
C1995 National Semiconductor Corporation
TL/F/6365
RRD-B30M105/Printed in U. S. A.
54LS42/DM54LS42/DM74LS42 BCD/Decimal Decoders
June 1989
Absolute Maximum Ratings (Note)
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
b 55§ C to a 125§ C
DM54LS and 54LS
DM74LS
0§ C to a 70§ C
Storage Temperature Range
b 65§ C to a 150§ C
Recommended Operating Conditions
Symbol
DM54LS42
Parameter
VCC
Supply Voltage
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
IOH
High Level Output Current
IOL
Low Level Output Current
TA
Free Air Operating Temperature
Electrical Characteristics
Symbol
DM74LS42
Units
Min
Nom
Max
Min
Nom
Max
4.5
5
5.5
4.75
5
5.25
V
0.7
0.8
V
b 0.4
b 0.4
mA
8
mA
70
§C
2
2
V
4
b 55
125
0
over recommended operating free air temperature range (unless otherwise noted)
Parameter
Min
Typ
(Note 1)
DM54
2.5
3.4
DM74
2.7
3.4
Conditions
Max
Units
b 1.5
V
VI
Input Clamp Voltage
VCC e Min, II e b18 mA
VOH
High Level Output
Voltage
VCC e Min, IOH e Max
VIL e Max, VIH e Min
Low Level Output
Voltage
VCC e Min, IOL e Max
VIL e Max, VIH e Min
DM54
0.25
0.4
DM74
0.35
0.5
IOL e 4 mA, VCC e Min
DM74
0.25
0.4
VOL
V
V
II
Input Current @ Max
Input Voltage
VCC e Max, VI e 7V
IIH
High Level Input Current
VCC e Max, VI e 2.7V
20
mA
IIL
Low Level Input Current
VCC e Max, VI e 0.4V
b 0.4
mA
IOS
Short Circuit
Output Current
VCC e Max
(Note 2)
Supply Current
VCC e Max (Note 3)
ICC
0.1
DM54
b 20
b 100
DM74
b 20
b 100
Note 1: All typicals are at VCC e 5V, TA e 25§ C.
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 3: ICC is measured with all outputs open and all inputs grounded.
2
7
13
mA
mA
mA
Switching Characteristics
at VCC e 5V and TA e 25§ C (See Section 1 for Test Waveforms and Output Load)
RL e 2 kX
Symbol
Parameter
From (Input)
To (Output)
CL e 15 pF
Min
Max
CL e 50 pF
Min
Units
Max
tPHL
Propagation Delay Time
High to Low Level Output
A, B, C, or D (2 Levels
of Logic) to Output
25
30
ns
tPHL
Propagation Delay Time
High to Low Level Output
A, B, C, or D (3 Levels
of Logic) to Output
30
35
ns
tPLH
Propagation Delay Time
Low to High Level Output
A, B, C, or D (2 Levels
of Logic) to Output
25
30
ns
tPLH
Propagation Delay Time
Low to High Level Output
A, B, C, or D (3 Levels
of Logic) to Output
30
35
ns
3
Physical Dimensions inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number 54LS42DMQB or DM54LS42J
NS Package Number J16A
4
Physical Dimensions inches (millimeters) (Continued)
16-Lead Small Outline Molded Package (M)
Order Number DM74LS42M
NS Package Number M16A
16-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS42N
NS Package Number N16E
5
54LS42/DM54LS42/DM74LS42 BCD/Decimal Decoders
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package (W)
Order Number 54LS42FMQB or DM54LS42W
NS Package Number W16A
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