NSC DM74173N Tri-state quad register Datasheet

54173/DM54173/DM74173
TRI-STATEÉ Quad D Registers
General Description
These four-bit registers contain D-type flip-flops with totempole TRI-STATE outputs, capable of driving highly capacitive or low-impedance loads. The high-impedance state and
increased high-logic-level drive provide these flip-flops with
the capability of driving the bus lines in a bus-organized system without need for interface or pull-up components.
Gated enable inputs are provided for controlling the entry of
data into the flip-flops. When both data-enable inputs are
low, data at the D inputs are loaded into their respective flipflops on the next positive transition of the buffered clock
input. Gate output control inputs are also provided. When
both are low, the normal logic states of the four outputs are
available for driving the loads or bus lines. The outputs are
disabled independently from the level of the clock by a high
logic level at either output control input. The outputs then
present a high impedance and neither load nor drive the bus
line. Detailed operation is given in the function table.
To minimize the possibility that two outputs will attempt to
take a common bus to opposite logic levels, the output control circuitry is designed so that the average output disable
times are shorter than the average output enable times.
Features
Y
Y
Y
Y
Y
Y
Y
Y
Connection Diagram
TRI-STATE outputs interface directly with system bus
Gated output control lines for enabling or disabling the
outputs
Fully independent clock elminates restrictions for operating in one of two modes:
Parallel load
Do nothing (hold)
For application as bus buffer registers
Typical propagation delay 18 ns
Typical frequency 30 MHz
Typical power dissipation 250 mW
Alternate Military/Aerospace device (54173) is available. Contact a National Semiconductor Sales Office/
Distributor for specifications.
Function Table
Dual-In-Line Package
Inputs
Data Enable
Clear
Clock
H
L
L
L
L
L
X
L
G1
G2
Data
D
X
X
H
X
L
L
X
X
X
H
L
L
X
X
X
X
L
H
u
u
u
u
Output
Q
L
Q0
Q0
Q0
L
H
When either M or N (or both) is (are) high the output is disabled to the
high-impedance state; however, sequential operation of the flip-flops is
not affected.
H e high level (steady state)
L e low level (steady state)
u e low-to-high level transition
X e don’t care (any input including transitions)
Q0 e the level of Q before the indicated steady state input conditions were
established
TL/F/6556 – 1
Order Number 54173DMQB, 54173FMQB,
DM54173J, DM54173W or DM74173N
See NS Package Number J16A, N16E or W16A
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/6556
RRD-B30M105/Printed in U. S. A.
54173/DM54173/DM74173 TRI-STATE Quad D Registers
June 1989
Absolute Maximum Ratings (Note)
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
7V
Input Voltage
5.5V
Operating Free Air Temperature Range
b 55§ C to a 125§ C
DM54 and 54
DM74
0§ C to a 70§ C
Storage Temperature Range
b 65§ C to a 150§ C
Recommended Operating Conditions
Symbol
DM54173
Parameter
DM74173
Units
Min
Nom
Max
Min
Nom
Max
4.5
5
5.5
4.75
5
5.25
V
VCC
Supply Voltage
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
0.8
0.8
V
IOH
High Level Output Current
b2
b 5.2
mA
IOL
Low Level Output Current
16
16
mA
fCLK
Clock Frequency (Note 4)
0
25
MHz
tW
Pulse Width
(Note 4)
Clock
20
20
Clear
20
20
Setup Time
(Note 4)
Enable
17
17
Data
10
10
tSU
tH
Hold Time
(Note 4)
2
2
25
0
Enable
2
2
Data
10
10
tREL
Clear Release Time (Note 4)
TA
Free Air Operating Temperature
10
V
ns
ns
ns
10
b 55
125
ns
0
70
§C
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
(Note 1)
Max
Units
b 1.5
V
VI
Input Clamp Voltage
VCC e Min, II e b12 mA
VOH
High Level Output
Voltage
VCC e Min, IOH e Max
VIL e Max, VIH e Min
VOL
Low Level Output
Voltage
VCC e Min, IOL e Max
VIH e Min, VIL e Max
II
Input Current @ Max
Input Voltage
VCC e Max, VI e 5.5V
IIH
High Level Input Current
VCC e Max, VI e 2.4V
40
mA
IIL
Low Level Input Current
b 1.6
mA
IOZH
Off-State Output Current with High
Level Output Voltage Applied
VCC e Max, VI e 0.4V
VCC e Max, VO e 2.4V
VIH e Min, VIL e Max
40
mA
IOZL
Off-State Output Current with Low
Level Output Voltage Applied
VCC e Max, VO e 0.4V
VIH e Min, VIL e Max
b 40
mA
IOS
Short Circuit
Output Current
VCC e Max
(Note 2)
Supply Current
VCC e Max (Note 3)
ICC
2.4
V
0.4
V
1
mA
DM54
b 30
b 70
DM74
b 30
b 70
50
72
mA
mA
Note 1: All typicals are at VCC e 5V, TA e 25§ C.
Note 2: Not more than one output should be shorted at a time.
Note 3: ICC is measured with all outputs open, CLEAR grounded after a momentary connection to 4.5V: N, G1, G2 and all DATA inputs grounded: and the CLOCK
input and M input at 4.5V.
Note 4: TA e 25§ C and VCC e 5V.
2
Switching Characteristics
Symbol
Parameter
at VCC e 5V and TA e 25§ C (See Section 1 for Test Waveforms and Output Load)
RL e 400X
From (Input)
To (Output)
CL e 5 pF
Min
Max
CL e 50 pF
Min
Units
Max
fMAX
Maximum Clock Frequency
tPLH
Propagation Delay Time
Low to High Level Output
Clock to
Output
25
25
ns
tPHL
Propagation Delay Time
High to Low Level Output
Clock to
Output
28
ns
tPHL
Propagation Delay Time
High to Low Level Output
Clear to
Output
27
ns
tPZH
Output Enable Time
to High Level Output
Output Control
to Q
7
30
ns
tPZL
Output Enable Time
to Low Level Output
Output Control
to Q
7
30
ns
tPHZ
Output Disable Time
from High Level Output
Output Control
to Q
3
14
ns
tPLZ
Output Disable Time
from Low Level Output
Output Control
to Q
3
20
ns
3
MHz
Logic Diagram
TL/F/6556 – 2
4
Physical Dimensions inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number 54173DMQB or DM54173J
NS Package Number J16A
16-Lead Molded Dual-In-Line Package (N)
Order Number DM74173N
NS Package Number N16E
5
54173/DM54173/DM74173 TRI-STATE Quad D Registers
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package (W)
Order Number 54173FMQB or DM54173W
NS Package Number W16A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
National Semiconductor
Corporation
1111 West Bardin Road
Arlington, TX 76017
Tel: 1(800) 272-9959
Fax: 1(800) 737-7018
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
National Semiconductor
Europe
Fax: (a49) 0-180-530 85 86
Email: cnjwge @ tevm2.nsc.com
Deutsch Tel: (a49) 0-180-530 85 85
English Tel: (a49) 0-180-532 78 32
Fran3ais Tel: (a49) 0-180-532 93 58
Italiano Tel: (a49) 0-180-534 16 80
National Semiconductor
Hong Kong Ltd.
13th Floor, Straight Block,
Ocean Centre, 5 Canton Rd.
Tsimshatsui, Kowloon
Hong Kong
Tel: (852) 2737-1600
Fax: (852) 2736-9960
National Semiconductor
Japan Ltd.
Tel: 81-043-299-2309
Fax: 81-043-299-2408
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
Similar pages