Fairchild DM74ALS5245 Octal 3-state transceiver Datasheet

Revised February 2000
DM74ALS5245
Octal 3-STATE Transceiver
General Description
Features
This octal bus transceiver is designed for asynchronous
two-way communication between data buses. The inputs
include hysteresis which provides improved noise rejection. Data is transmitted either from the A bus to the B bus
or from the B bus to the A bus depending on the logic level
of the direction control (DIR) input. The device can be disabled via the enable input (G) which causes the outputs to
enter the high impedance mode so the buses are effectively isolated.
■ Input Hysteresis
■ Low output noise generation
■ High input noise immunity
■ Advanced oxide-isolated, ion implanted Schottky TTL
process
■ Switching specification guaranteed over the full temperature and VCC range
■ PNP inputs to reduce input loading
Ordering Code:
Order Number
Package Number
DM74ALS5245WM
M20B
Package Description
DM74ALS5245SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS5245N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Control Inputs
Operation
DIR
G
L = LOW Logic Level
L
L
L
H
A Data to B Bus
H
X
High Impedance
H = HIGH Logic Level
© 2000 Fairchild Semiconductor Corporation
DS009175
B Data to A Bus
X = Don't Care (Either LOW or HIGH Logic Level)
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DM74ALS5245 Octal 3-STATE Transceiver
October 1986
DM74ALS5245
Absolute Maximum Ratings(Note 1)
Supply Voltage
7V
Input Voltage
Control Inputs
7V
I/O Ports
5.5V
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristic tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
0°C to +70°C
Operating Free-Air Temperature Range
−65°C to +150°C
Storage Temperature Range
Typical θJA
N Package
56.0°C/W
M Package
74.0°C/W
Recommended Operating Conditions
Symbol
Parameter
Min
Max
Units
4.5
5.5
V
LOW Level Input Voltage
0.8
V
IOH
HIGH Level Output Current
−15
mA
IOL
LOW Level Output Current
24
mA
TA
Free Air Operating Temperature Range
70
°C
VCC
Supply Voltage
VIH
HIGH Level Input Voltage
VIL
2
V
0
Electrical Characteristics
over recommended free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C.
Symbol
Parameter
Test Conditions
VIK
Input Clamp Voltage
VCC = Min, II = −18 mA
HYS
Hysteresis (VT+ − VT−)
VCC = Min
VOH
HIGH Level
VCC = 4.5V to 5.5V
IOH = −0.4 mA
Output Voltage
VCC = Min
IOH = −3 mA
LOW Level
VCC = Min
Output Voltage
II
Input Current at
VCC = Max
Maximum Input Voltage
Typ
Max
−1.5
0.2
IOH = Max
VOL
Min
Units
V
0.32
V
3.2
V
VCC − 2
2.4
2
IOL = 12 mA
0.25
0.4
IOL = 24 mA
0.35
0.5
I/O Ports, VI = 5.5V
100
Control Inputs, VI = 7V
100
V
µA
IIH
HIGH Level Input Current
VCC = Max, VI = 2.7V
20
IIL
LOW Level Input Current
VCC = Max, VI = 0.4V
−100
µA
IO
Output Drive Current
VCC = Max, VO = 2.25V
−112
mA
ICC
Supply Current
VCC = Max
VOLP
VOLV
VIHD
VILD
−30
Outputs HIGH
30
45
Outputs LOW
36
55
Outputs Disabled
38
58
Quiet Output Maximum
VCC = 5.0V, TA = 25°C
Dynamic VOL
(Figures 1, 2; (Note 2)(Note 3))
Quiet Output Minimum
VCC = 5.0V, TA = 25°C
Dynamic VOL
(Figures 1, 2; (Note 2)(Note 3))
Minimum High Level
VCC = 5.0V, TA = 25°C
Dynamic Input Voltage
(Note 2)(Note 4)
Maximum Low Level
VCC = 5.0V, TA = 25°C
Dynamic Input Voltage
(Note 2)(Note 4)
µA
mA
0.5
V
−0.2
V
1.6
V
1.0
V
Note 2: Plastic DIP package.
Note 3: n = number of device outputs; n−1 outputs switching, each driven 0V to 3V one output @ GND.
Note 4: n = number of device outputs; n outputs switching, n−1 inputs switching 0V to 3V. Input under test switching 3V to threshold (VILD); 0V to threshold
(VIHD); f = 1 MHz.
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2
over recommended operating free air temperature range
Symbol
tPLH
tPHL
Parameter
From (Input)
Conditions
Propagation Delay Time
VCC = 4.5V to 5.5V,
LOW-to-HIGH Level Output
R1 = R2 = 500Ω,
Propagation Delay Time
CL = 50 pF
HIGH-to-LOW Level Output
tPZH
Output Enable Time
to HIGH Level Output
tPZL
Output Enable Time
to LOW Level Output
tPHZ
Output Disable Time
from HIGH Level Output
tPLZ
Min
Max
Units
A or B to B or A
3
10
ns
A or B to B or A
3
10
ns
G to A or B
5
20
ns
G to A or B
5
20
ns
G to A or B
2
10
ns
G to A or B
4
15
ns
To (Output)
Output Disable Time
from LOW Level Output
3
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DM74ALS5245
Switching Characteristics
DM74ALS5245
ALS Noise Characteristics
VOLP/VOLV and VOHP/VOHV:
The setup of a noise characteristics measurement is critical
to the accuracy and repeatability of the tests. The following
is a brief description of the setup used to measure the
noise characteristics of ALS.
• Determine the quiet output pin that demonstrates the
greatest noise levels. The worst case pin will usually be
the furthest from the ground pin. Monitor the output voltages using a 50Ω coaxial cable plugged into a standard
SMB type connector on the test fixture. Do not use an
active FET probe.
• Measure VOLP and VOLV on the quiet output during the
HL transition. Measure VOHP and VOHV on the quiet output during the LH transition.
Equipment:
Word Generator
Printed Circuit Board Test Fixture
Dual Trace Oscilloscope
Procedure:
• Verify that the GND reference recorded on the oscilloscope has not drifted to ensure the accuracy and repeatability of the measurements.
1. Verify Test Fixture Loading: Standard Load 50 pF,
500Ω.
2. Deskew the word generator so that no two channels
have greater than 150 ps skew between them. This
requires that the oscilloscope be deskewed first. Swap
out the channels that have more than 150 ps of skew
until all channels being used are within 150 ps. It is
important to deskew the word generator channels
before testing. This will ensure that the outputs switch
simultaneously.
VILD and VIHD:
• Monitor one of the switching outputs using a 50Ω coaxial
cable plugged into a standard SMB type connector on
the test fixture. Do not use an active FET probe.
• First increase the input LOW voltage level, VIL, until the
output begins to oscillate. Oscillation is defined as noise
on the output LOW level that exceeds VIL limits, or on
output HIGH levels that exceed VIH limits. The input
LOW voltage level at which oscillation occurs is defined
as VILD.
3. Terminate all inputs and outputs to ensure proper loading of the outputs and that the input levels are at the
correct voltage.
4. Set VCC to 5.0V.
• Next decrease the input HIGH voltage level on the word
generator, VIH until the output begins to oscillate. Oscillation is defined as noise on the output LOW level that
exceeds V IL limits, or on output HIGH levels that exceed
VIH limits. The input HIGH voltage level at which oscillation occurs is defined as VIHD.
5. Set the word generator to toggle all but one output at a
frequency of 1 MHz. Greater frequencies will increase
DUT heating and affect the results of the measurement.
6. Set the word generator input levels at 0V LOW and 3V
HIGH. Verify levels with a digital volt meter.
• Verify that the GND reference recorded on the oscilloscope has not drifted to ensure the accuracy and repeatability of the measurements.
FIGURE 1. Quiet Output Noise Voltage Waveforms
Note 5: VOHV and VOHP are measured with respect to VOH reference. VOLV
and VOLP are measured with respect to ground reference.
Note 6: Input pulses have the following characteristics: f = 1 MHz, tr = 3 ns,
tf = 3 ns, skew < 150 ps.
FIGURE 2. Simultaneous Switching Test Circuit
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DM74ALS5245
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
5
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DM74ALS5245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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6
DM74ALS5245 Octal 3-STATE Transceiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
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to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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