Spec. No. : C350S3 Issued Date : 2005.01.12 Revised Date : Page No. : 1/3 CYStech Electronics Corp. NPN Digital Transistors (Built-in Resistors) DTC113ZS3 Features • Built-in bias resistors enable the configuration of an inverter circuit without connecting external input resistors (see equivalent circuit). • The bias resistors consist of thin-film resistors with complete isolation to allow negative biasing of the input. They also have the advantage of almost completely eliminating parasitic effects. • Only the on/off conditions need to be set for operation, making device design easy. • Complements the DTA113ZS3 Equivalent Circuit Outline SOT-323 DTC113ZS3 R1=1kΩ , R2=10 kΩ IN(B) : Base OUT(C) : Collector GND(E) : Emitter Absolute Maximum Ratings (Ta=25°C) Parameter Supply Voltage Input Voltage Output Current Power Dissipation Junction Temperature Storage Temperature DTC113ZS3 Symbol Limits Unit VCC VIN IO 50 -5~+10 100 100 200 150 -55~+150 V V mA mA mW °C °C IO(max.) Pd Tj Tstg CYStek Product Specification CYStech Electronics Corp. Spec. No. : C350S3 Issued Date : 2005.01.12 Revised Date : Page No. : 2/3 Electrical Characteristics (Ta=25°C) Parameter Input Voltage Output Voltage Input Current Output Current DC Current Gain Input Resistance Resistance Ratio Transition Frequency Symbol VI(off) VI(on) VO(on) II IO(off) GI R1 R2/R1 fT Min. 3 33 0.7 8 - Typ. 1 10 250 Max. 0.3 0.3 7.2 0.5 1.3 12 - Unit V V V mA µA kΩ MHz Test Conditions VCC=5V, IO=100µA VO=0.3V, IO=20mA IO/II=10mA/0.5mA VI=5V VCC=50V, VI=0V VO=5V, IO=5mA VCE=10V, IC=5mA, f=100MHz * * Transition frequency of the device DTC113ZS3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C350S3 Issued Date : 2005.01.12 Revised Date : Page No. : 3/3 SOT-323 Dimension 3 Marking: A Q A1 1 C Lp 2 TE 8Z detail Z bp e1 W B e E D A Z 3-Lead SOT-323 Plastic Surface Mounted Package CYStek Package Code: S3 θ He 0 v A Style: Pin 1.Base 2.Emitter 3.Collector 2 mm 1 scale *: Typical Inches Min. Max. 0.0315 0.0433 0.0000 0.0039 0.0118 0.0157 0.0039 0.0098 0.0709 0.0866 0.0453 0.0531 0.0512 - DIM A A1 bp C D E e Millimeters Min. Max. 0.80 1.10 0.00 0.10 0.30 0.40 0.10 0.25 1.80 2.20 1.15 1.35 1.3 - DIM e1 He Lp Q v w θ Inches Min. Max. 0.0256 0.0787 0.0886 0.0059 0.0177 0.0051 0.0091 0.0079 0.0079 - Millimeters Min. Max. 0.65 2.00 2.25 0.15 0.45 0.13 0.23 0.2 0.2 10° 0° Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead: 42 Alloy ; solder plating • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0 Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. DTC113ZS3 CYStek Product Specification