CYSTEKEC DTA124EN3 Pnp digital transistors (built-in resistors) Datasheet

CYStech Electronics Corp.
Spec. No. : C362N3
Issued Date : 2002.08.16
Revised Date :2015.05.28
Page No. : 1/6
PNP Digital Transistors (Built-in Resistors)
DTA124EN3
Features
• Built-in bias resistors enable the configuration of an inverter circuit without connecting external input
resistors (see equivalent circuit).
• The bias resistors consist of thin-film resistors with complete isolation to allow positive biasing of the
input. They also have the advantage of almost completely eliminating parasitic effects.
• Only the on/off conditions need to be set for operation, making device design easy.
• Complements the DTC124EN3
• Pb-free lead plating and halogen-free package
Equivalent Circuit
Outline
SOT-23
DTA124EN3
R1=22kΩ , R2=22 kΩ
IN(B) : Base
OUT(C) : Collector
GND(E) : Emitter
Ordering Information
Device
DTA124EN3-0-T1-G
Package
SOT-23
(Pb-free lead plating and halogen-free package)
Shipping
3000 pcs / Tape & Reel
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and
green compound products
Packing spec, T1 : 3000 pcs / tape & reel, 7” reel
Product rank, zero for no rank products
Product name
DTA124EN3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C362N3
Issued Date : 2002.08.16
Revised Date :2015.05.28
Page No. : 2/6
Absolute Maximum Ratings (Ta=25°C)
Parameter
Supply Voltage
Input Voltage
Symbol
VCC
VIN
IO
IO(Max)
Pd
Tj
Tstg
Output Current
Power Dissipation
Junction Temperature
Storage Temperature
Limits
-50
-40~+10
-30
-100
200
150
-55~+150
Unit
V
V
mA
mA
mW
°C
°C
Electrical Characteristics (Ta=25°C)
Parameter
Input Voltage
Output Voltage
Input Current
Output Current
DC Current Gain
Input Resistance
Resistance Ratio
Transition Frequency
Symbol
VI(off)
VI(on)
VO(on)
II
IO(off)
GI
R1
R2/R1
fT
Min.
-3
56
15.4
0.8
-
Typ.
-0.1
22
1
250
Max.
-0.5
-0.3
-0.36
-0.5
28.6
1.2
-
Unit
V
V
V
mA
μA
kΩ
MHz
Test Conditions
VCC=-5V, IO=-100μA
VO=-0.2V, IO=-5mA
IO/II=-10mA/-0.5mA
VI=-5V
VCC=-50V, VI=0V
VO=-5V, IO=-5mA
VCE=-10V, IC=-5mA, f=100MHz*
* Transition frequency of the device
Recommended Soldering Footprint
DTA124EN3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C362N3
Issued Date : 2002.08.16
Revised Date :2015.05.28
Page No. : 3/6
Typical Characteristics
DC Current Gain vs Output Current
Output Voltage vs Output Current
1000
1000
Output Voltage---Vo(on)(mV)
Current Gain---HFE
Vo=5V
100
10
1
Io/Ii=20
100
10
0.1
1
10
100
0.1
Input Voltage vs Output Current (ON Characteristics)
10
100
Output Current vs Input Voltage (OFF Characteristics)
100
10
Vo=0.3V
Vcc=5V
Output Current --- Io(mA)
Input Voltage --- Vi(on)(V)
1
Output Current ---Io(mA)
Output Current---Io(mA)
10
1
0.1
1
0.1
0.01
0.1
1
10
100
Output Current --- Io(mA)
0
1
2
Input Voltage --- Vi(off)(V)
3
Power Derating Curve
Power Dissipation---P D(mW)
250
200
150
100
50
0
0
50
100
150
200
Ambient Temperature --- TA(℃ )
DTA124EN3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C362N3
Issued Date : 2002.08.16
Revised Date :2015.05.28
Page No. : 4/6
Reel Dimension
Carrier Tape Dimension
DTA124EN3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C362N3
Issued Date : 2002.08.16
Revised Date :2015.05.28
Page No. : 5/6
Recommended wave soldering condition
Product
Pb-free devices
Peak Temperature
260 +0/-5 °C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
Ramp down rate
Time 25 °C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
10-30 seconds
20-40 seconds
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
DTA124EN3
CYStek Product Specification
Spec. No. : C362N3
Issued Date : 2002.08.16
Revised Date :2015.05.28
Page No. : 6/6
CYStech Electronics Corp.
SOT-23 Dimension
Marking:
6B
Product Code
Date Code: Year+Month
Year: 5→2015, 6→2016
Month: 1→1, 2→2,‧‧‧
9→9, A→10, B→11, C→12
3-Lead SOT-23 Plastic
Surface Mounted Package
CYStek Package Code: N3
Style : Pin 1.Base 2.Emitter 3.Collector
*:Typical
Inches
Min.
Max.
0.1102 0.1204
0.0472 0.0669
0.0335 0.0512
0.0118 0.0197
0.0669 0.0910
0.0000 0.0040
DIM
A
B
C
D
G
H
Millimeters
Min.
Max.
2.80
3.04
1.20
1.70
0.89
1.30
0.30
0.50
1.70
2.30
0.00
0.10
DIM
J
K
L
S
V
L1
Inches
Min.
Max.
0.0032 0.0079
0.0118 0.0266
0.0335 0.0453
0.0830 0.1161
0.0098 0.0256
0.0118 0.0197
Millimeters
Min.
Max.
0.08
0.20
0.30
0.67
0.85
1.15
2.10
2.95
0.25
0.65
0.30
0.50
Notes : 1.Controlling dimension : millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material :
• Lead :Pure tin plated.
• Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYSrek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
DTA124EN3
CYStek Product Specification
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