Etron EM584161BA-70E 256k x 16 low power sram Datasheet

EtronTech
EM584161
256K x 16 Low Power SRAM
Rev 2.0
Features
Pin Configuration
• Single power supply voltage of 1.65V to 1.95V
• Power down features using CE1# and CE2
48-Ball BGA (CSP), Top View
1
2
3
4
5
6
• Low power dissipation
• Data retention supply voltage: 0.9V to 1.95V
A
LB#
OE#
A0
A1
A2
CE2
• Direct TTL compatibility for all input and output
B
DQ8
UB#
A3
A4
CE1#
DQ0
C
DQ9
DQ10
A5
A6
DQ1
DQ2
D
GND
DQ11
A17
A7
DQ3
VDD
E
VDD
DQ12
NC
A16
DQ4
GN D
F
DQ14
DQ13
A14
A15
DQ5
DQ6
G
DQ15
NC
A12
A13
WE#
DQ7
H
NC
A8
A9
A10
A11
NC
• Wide operating temperature range: -40°C to 85°C
• Standby current @ VDD = 1.95 V
11/2003
ISB
Maximum
EM584161BA/BC-70/85
8 µA
EM584161BA-70E/85E
80 µA
Ordering Information
Part Number
Speed
ISB
Package
EM584161BC-70
70 ns
8 µA
6x8 BGA
EM584161BA-70
70 ns
8 µA
8x10 BGA
EM584161BA-70E
70 ns
80 µA
8x10 BGA
EM584161BC-85
85 ns
8 µA
6x8 BGA
EM584161BA-85
85 ns
8 µA
8x10 BGA
Symbol
Function
8x10 BGA
A0 - A17
DQ0 - DQ15
CE1#, CE2
OE#
WE#
LB#, UB#
GND
VDD
NC
Address Inputs
Data Inputs / Outputs
Chip Enable Inputs
Output Enable
Read / Write Control Input
Data Byte Control Inputs
Ground
Power Supply
No Connection
EM584161BA-85E
85 ns
80 µA
Overview
Pin Description
The EM584161 is a 4,194,304-bit SRAM organized as 262,144 words by 16 bits. It is designed with advanced
CMOS technology. This Device operates from a single 1.65V to 1.95V power supply. Advanced circuit
technology provides both high speed and low power. It is automatically placed in low-power mode when chip
enable (CE1#) is asserted high or (CE2) is asserted low. There are three control inputs. CE1# and CE2 are
used to select the device and for data retention control, and output enable (OE#) provides fast memory access.
Data byte control pin (LB#,UB#) provides lower and upper byte access. This device is well suited to various
microprocessor system applications where high speed, low power and battery backup are required. And, with a
guaranteed operating range from -40°C to 85°C, the EM584161 can be used in environments exhibiting
extreme temperature conditions.
Etron Technology, Inc.
No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C.
TEL: (886)-3-5782345
FAX: (886)-3-5778671
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.
EtronTech
EM584161
Block Diagram
A0
VDD
MEMORY
CELL ARRAY
2,048X128X16
(4,194,304)
GND
A17
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
SENSE AMP
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
COLUMN ADDRESS
DECODER
WE#
UB#
LB#
OE#
CE1#
CE2
POWER DOWN
CIRCUIT
2
Rev 2.0
Nov. 2003
EtronTech
EM584161
Operating Mode
Mode
CE1#
Read
L
Write
L
CE2
OE#
H
H
WE#
L
X
H
L
LB#
UB#
DQ0~DQ7
DQ8~DQ15
L
L
DOUT
DOUT
H
L
High-Z
DOUT
L
H
DOUT
High-Z
L
L
DIN
DIN
H
L
High-Z
DIN
L
H
DIN
High-Z
High-Z
High-Z
High-Z
High-Z
L
H
H
H
X
X
L
H
X
X
H
H
H
X
X
X
X
X
X
L
X
X
X
X
Output Deselect
Standby
Note: X = don't care. H=logic high. L=logic low.
Absolute Maximum Ratings
Supply voltage, VDD
-0.5 to +2.5V
Input voltages, VIN
-0.5 to +2.5V
Input and output voltages, VI/O
-0.5 to VDD
+0.5V
Operating temperature, TOPR
-40 to +85°C
Storage temperature, TSTRG
-65 to +150°C
Soldering Temperature (10s), TSOLDER
240°C
Power dissipation, PD
0.6 W
DC Recommended Operating Conditions (Ta=-40°C to 85°C)
Symbol
Parameter
Min.
Typ.
Max.
VDD
Power Supply Voltage
1.65
1.8
1.95
VIH
VIL
Input High Voltage
Input Low Voltage
VDR
Data Retention Supply Voltage
Note:
(1) Overshoot : 2.7V if pulse width ≤ 20ns
Unit
V
(1)
−
VDD+0.2
V
- 0.2
−
0.4
V
0.9
−
1.95
V
1.4
(2)
(2) Undershoot : -1.0V if pulse width ≤ 20ns
3
Rev 2.0
Nov. 2003
EtronTech
EM584161
DC Characteristics (Ta = -40°C to 85°C, VDD = 1.65V to 1.95V)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
IDD1
Operating current @ min
cycle time
CE1# = VIL and
CE2 = VIH and
IOUT = 0mA
−
−
15
mA
IDD2
Operating current @ max
cycle time (1µs)
Other Input = VIH /
VIL
−
−
2
mA
ISB
Standby current
CE1# ≥ VDD -0.2V, or
CE2 ≤ 0.2V, Others
inputs ≤ 0.2V or ≥
VDD -0.2V
−
−
8
µA
VOH
Output HIGH Voltage
IOH = -100 µA
VDD –
0.2V
−
−
V
VOL
Output LOW Voltage
IOL = 100 µA
−
−
0.3
V
Notes:
* Typical value are measured at Ta = 25°C.
** In standby mode with CE1# ≥ VDD - 0.2V, these limits are assured for the condition
CE2 ≥ VDD - 0.2V or CE2 ≤ 0.2V.
Capacitance (Ta = 25°C; f = 1 MHz)
Parameter
Input capacitance
Symbol
Min
Typ
Max
Unit
Test Conditions
CIN
−
−
10
pF
VIN = GND
COUT
10
pF
VOUT = GND
−
−
Notes: This parameter is periodically sampled and is not 100% tested.
Output capacitance
4
Rev 2.0
Nov. 2003
EtronTech
EM584161
AC Characteristics and Operating Conditions(Ta = -40°C to 85°C, VDD = 1.65V to 1.95V)
Read Cycle
EM584161
Symbol
-85
Parameter
-70
Unit
Min Max Min Max
tRC
Read cycle time
85
−
70
−
tAA
Address access time
−
85
−
70
tCO1
Chip Enable (CE1#) Access Time
−
85
−
70
tCO2
Chip Enable (CE2) Access Time
−
85
−
70
tOE
Output enable access time
−
45
−
35
tBA
Data Byte Control Access Time
−
45
−
35
tLZ
Chip Enable Low to Output in Low-Z
10
−
10
−
tOLZ
Output enable Low to Output in Low-Z
3
−
3
−
tBLZ
Data Byte Control Low to Output in Low-Z
5
−
5
−
tHZ
Chip Enable High to Output in High-Z
−
35
−
25
tOHZ
Output Enable High to Output in High-Z
−
35
−
25
tBHZ
Data Byte Control High to Output in High-Z
−
35
−
25
tOH
Output Data Hold Time
10
−
10
−
ns
Write Cycle
EM584161
Symbol
-85
Parameter
-70
Unit
Min Max Min Max
tWC
Write cycle time
85
−
70
−
tWP
Write pulse width
55
−
55
−
tCW
Chip Enable to end of write
70
−
60
−
tBW
Data Byte Control to end of Write
70
−
60
−
tAS
Address setup time
0
−
0
−
tWR
Write Recovery time
0
−
0
−
tWHZ
WE# Low to Output in High-Z
−
35
−
30
tOW
WE# High to Output in Low-Z
5
−
5
−
tDS
Data Setup Time
35
−
30
−
tDH
Data Hold Time
0
−
0
−
ns
AC Test Condition
• Output load : 30pF + one TTL gate
• Input pulse level : 0.2V, VDD-0.2V
• Timing measurements : 0.5 x VDD
• tR, tF : 5ns
5
Rev 2.0
Nov. 2003
EtronTech
EM584161
Read Cycle
(See Note 1)
t RC
Addr ess
t OH
t AA
t CO1
CE 1#
t CO2
CE2
t HZ
t OE
O E#
t OH Z
t BA
UB# , LB#
t BLZ
t BHZ
t OLZ
t LZ
D O UT
VALID DATA OU T
6
Rev 2.0
Nov. 2003
EtronTech
EM584161
Write Cycle1
(WE# Controlled)(See Note 4)
tWC
Address
t AS
tWP
tW R
W E#
t CW
CE1#
CE2
t CW
t BW
UB# , LB#
t W HZ
D OUT
t OW
(See Note2)
(See Note3)
t DS
D IN
(See Note 5)
t DH
VALID DATA IN
7
Rev 2.0
(See Note 5)
Nov. 2003
EtronTech
EM584161
Write Cycle 2
(CE1# Controlled)(See Note 4)
tW C
Addres s
t AS
tWP
tW R
W E#
t CW
CE1#
CE2
t CW
t BW
UB# , LB#
t BLZ
t W HZ
DOUT
t LZ
t DS
DIN
(See Note 5)
t DH
VALID DATA IN
8
Rev 2.0
Nov. 2003
EtronTech
EM584161
Write Cycle 3
(CE2 Controlled)(See Note 4)
tW C
Addres s
t AS
tWP
tW R
W E#
t CW
CE1#
CE2
t CW
t W HZ
DO UT
t LZ
t DS
DIN
(See Note 5)
t DH
VALID DATA IN
9
Rev 2.0
Nov. 2003
EtronTech
EM584161
Write Cycle4
(UB#, LB# Controlled)(See Note 4)
tW C
Addres s
t AS
tWP
tW R
W E#
t CW
CE1#
CE2
t CW
t BW
UB# , LB#
t BLZ
t W HZ
DO UT
t LZ
t DS
DIN
(See Note 5)
t DH
VALID DATA IN
Note:
1. WE# remains HIGH for the read cycle.
2. If CE1# goes LOW (or CE2 goes HIGH) with or after WE# goes LOW, the outputs will remain at high
impedance.
3. If CE1# goes HIGH (or CE2 goes LOW) coincident with or before WE# goes HIGH, the outputs will remain
at high impedance.
4. If OE# is HIGH during the write cycle, the outputs will remain at high impedance.
5. Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be
applied.
10
Rev 2.0
Nov. 2003
EtronTech
EM584161
Data Retention Characteristics (Ta = -40°C to 85°C)
Symbol
Parameter
VDR
Data Retention Supply
Voltage
IDR
Data Retention Current
CE1# ≥ VDD - 0.2V, CE2 ≤ 0.2V,
VIN ≥ VDD - 0.2V or VIN ≤ 0.2V
VDD = 0.9V, CE1# ≥ VDD - 0.2V,
CE2 ≤ 0.2V, VIN ≥ VDD - 0.2V or
VIN ≤ 0.2V
tSDR
Chip Deselect to Data Retention Mode Time
tRDR
Recovery Time
Min
Typ
Max
Unit
0.9
−
1.95
V
−
−
4.0
µA
0
−
−
ns
tRC
−
−
ns
CE1# Controlled Data Retention Mode
t SDR
Data Retention Mode
t RDR
V DD
1.65V
1.4V
V DR
Note 1
CE1#,
LB#/UB#
GND
CE2 Controlled Data Retention Mode
Data Reten tion Mode
V DD
1.6 5V
CE2
t RD R
t SDR
VD R
0.4 V
Note 2
GND
Note:
1. CE1# ≥ VDD – 0.2V or UB# = LB# ≥ VDD – 0.2V
2. CE2 ≤ 0.2V
11
Rev 2.0
Nov. 2003
EtronTech
EM584161
Package Diagrams
48-Ball (6mm x 8mm) BGA
Units in mm
BOTTOM VIEW
TOP VIEW
2
C
PIN 1 CORNER
0.25 S
C
A
0.30
PIN 1 CORNER
1
0.10 S
3
4
5
6
6
5
4
B
0.05(48X)
3
2
1
-B0.75
3.75
-A0.20(4X)
0.10
-C-
SEATING PLANE
12
Rev 2.0
Nov. 2003
EtronTech
EM584161
Package Diagrams
48-Ball (8mm x 10mm) BGA
Units in mm
BO TT OM VIEW
TOP VIEW
2
C
0.25 S
C
0.30
PIN 1 CO RNE R
1
0.10 S
3
4
5
6
6
5
4
PIN 1 CO RNE R
A
B
0.05(48X)
3
2
1
A
B
B
C
C
D
D
0.1
5.25
A
F
E
F
0.75
10 .0
E
G
G
H
H
-B0.75
3.75
8.0
D
0.10
0.20(4X)
D
0.25
0.52
0.05
0.02
-A -
0.10
0.02
0.05
SEATIN G PLANE
0.36
1.20 MAX
-C -
13
Rev 2.0
Nov. 2003
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