EN27LV020 / EN27LV020B EN27LV020 / EN27LV020B 2Megabit Low Voltage EPROM (256K x 8) FEATURES • High-Reliability CMOS Technology • Read Access Time: -90ns, -120ns, -150ns, -200ns • Latch-Up Immunity to 100mA • Single +3.3V Power Supply -Regulated power supply 3.0V - 3.6V (EN27LV020) from -1V to VCC + 1V • Two-Line Control ( OE & CE ) -Unregulated power supply 2.7V - 3.6V • Standard Product Identification Code (EN27LV020B for battery operated systems) • JEDEC Standard Pinout • 32-pin PDIP • Programming Voltage +12.75V • 32-pin PLCC • QuikRiteTM Programming Algorithm • 32-pin TSOP (Type 1) • Typical programming time 20µs • Commercial and Industrial Temperature Ranges • Low Power CMOS Operation • 1µA Standby (Typical) • 15mA Operation (Max.) • CMOS- and TTL-Compatible I/O GENERAL DESCRIPTION The EN27LV020 / EN27LV020B is a low-voltage, low-power 2-Megabit, 3.3V one-timeprogrammable (OTP) read-only memory (EPROM). Organized into 256K words with 8 bits per word, it features QuikRiteTM single-address location programming, typically at 20µs per byte. Any byte can be accessed in less than 90ns. The EN27LV020 / EN27LV020B has separate Output Enable ( OE ) and Chip Enable ( CE ) controls which eliminate bus contention issues. The EN27LV020 has a Vcc tolerance range of 3.0V to 3.6 V, making it suitable for use in systems that have regulated power supplies. The EN27LV020B has a Vcc tolerance range of 2.7 V to 3.6V, making it an ideal device for battery operated systems. FIGURE 1. PDIP Pin Name A0-A17 Function Addresses DQ0-DQ7 Outputs CE Chip Enable OE Output Enable PGM Program Strobe 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 A17 1 Preliminary Tel: 408-235-8680 Fax: 408-235-8685 EN27LV020 / EN27LV020B FIGURE 2. TSOP TSOP A17 EN27LV020/ EN27LV020B FIGURE 3. PLCC P L C C T o p V ie w A12 A16 Vcc A17 A1 5 Vpp PGM 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 2 Preliminary Tel: 408-235-8680 Fax: 408-235-8685 EN27LV020 / EN27LV020B FIGURE 4. BLOCK DIAGRAM CE PGM INPUT/ OUTPUT BUFFERS CONTROL LOGIC OE DQ0 - DQ7 8 Y-DECODER 1024 Y-SELECT A0 - A17 ADDRESS INPUTS X-DECODER Vcc 2M BIT CELL MATRIX 2048 Vpp Vss FUNCTIONAL DESCRIPTION THE QUIKRITETM PROGRAMMING OF THE EN27LV020 / EN27LV020B When the EN27LV020 / EN27LV020B is delivered, the chip has all 2M bits in the “ONE”, or HIGH state. “ZEROs” are loaded into the EN27LV020 / EN27LV020B through the procedure of programming. The programming mode is entered when 12.75 ± 0.25V is applied to the VPP pin, OE is at VIH , and CE and PGM are at VIL. For programming, the data to be programmed is applied with 8 bits in parallel to the data pins. TM The QUIKRITE programming flowchart in Figure 5 shows Eon’s interactive programming algorithm. The interactive algorithm reduces programming time by using 20 µs to 100 µs programming pulses and giving each address only as many pulses as is necessary in order to reliably program the data. After each pulse is applied to a given address, the data in that address is verified. If the data is not verified, additional pulses are given until it is verified or until the maximum number of pulses is reached. This process is repeated while sequencing through each address of the EN27LV020 / EN27LV020B. This part of the programming algorithm is done at VCC = 6.25V to assure that each EPROM bit is programmed to a sufficiently high threshold voltage. This ensures that all bits have sufficient margin. After the final address is completed, the entire EPROM memory is read at VCC = VPP = 5.25 ± 0.25V to verify the entire memory. EN27LV020 / EN27LV020B can be programmed using the same programming algorithm as the 5V Read EPROM EN27C020. 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 3 Preliminary Tel: 408-235-8680 Fax: 408-235-8685 EN27LV020 / EN27LV020B PROGRAM INHIBIT MODE Programming of multiple EN27LV020 / EN27LV020B in parallel with different data is also easily accomplished by using the Program Inhibit Mode. Except for CE , all like inputs of the parallel EN27LV020 / EN27LV020B may be common. A TTL low-level program pulse applied to an EN27LV020 / EN27LV020B CE input with VPP = 12.75 ± 0.25V, PGM LOW, and OE HIGH will program that EN27LV020 / EN27LV020B. A high-level CE input inhibits the other EN27LV020 / EN27LV020B from being programmed. PROGRAM VERIFY MODE Verification should be performed on the programmed bits to determining that they were correctly programmed. The verification should be performed with OE and CE at VIL, PGM at VIH, and VPP at its programming voltage. AUTO PRODUCT IDENTIFICATION The Auto Product Identification mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the EN27LV020 / EN27LV020B. To activate this mode, the programming equipment must force 12.0 V ± 0.5V on address line A9 of the EN27LV020 / EN27LV020B. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH, when A1 = VIH. All other address lines must be held at VIL during Auto Product Identification mode. Byte 0 (A0 = VIL) represents the manufacturer code, and byte 1 (A0 = VIH), the device code. For the EN27LV020 / EN27LV020B these two identifiers bytes are given in the Mode Select Table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (DQ7) defined as the parity bit. When A1 = VIL, the EN27LV020 / EN27LV020B will read out the binary code of 7F, continuation code, to signify the unavailability of manufacturer ID codes. 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 4 Preliminary Tel: 408-235-8680 Fax: 408-235-8685 EN27LV020 / EN27LV020B READ MODE The EN27LV020 / EN27LV020B has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable ( CE ) is the power control and should be used for device selection. Output Enable ( OE ) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE). Data is available at the outputs (tOE) after the falling edge of OE , assuming the CE has been LOW and addresses have been stable for at least tACC - tOE. STANDBY MODE The EN27LV020 / EN27LV020B has CMOS standby mode which reduces the maximum VCC current to 10µA. It is placed in CMOS standby when CE is at VCC ± 0.3 V. The EN27LV020 / EN27LV020B also has a TTL-standby mode which reduces the maximum VCC current to 0.6 mA. It is placed in TTL-standby when CE is at VIH. When in standby mode, the outputs are in a high-impedance state, independent of the OE input. TWO-LINE OUTPUT CONTROL FUNCTION To accommodate multiple memory connections, a two-line control function is provided to allow for: 1. Low memory power dissipation, 2. Assurance that output bus contention will not occur. It is recommended that CE be decoded and used as the primary device-selection function, while OE be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device. SYSTEM CONSIDERATIONS During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1µF ceramic capacitor (high frequency, low inherent inductance) should be used on each device between VCC and VSS to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7µF bulk electrolytic capacitor should be used between VCC and VSS for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array. 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 5 Preliminary Tel: 408-235-8680 Fax: 408-235-8685 EN27LV020 / EN27LV020B MODE SELECT TABLE Mode CE Read VIL Output Disable VIL Standby (TTL) VIH Standby (CMOS) VCC ± 0.3V Program (4) VIL Program Verify VIL Program Inhibit VIH Manufacturer Code Device Code (3) (3) VIL VIL OE VIL PGM (2) X A0 X A1 X X VIH X X X X X X X X X X VIH VIL X VIL X VIH X X X X X VIL X VIH VH VIL VIL X VIH VPP VCC Output DOUT X VCC High Z X VCC High Z X X VCC High Z X X VPP DIN X VPP DOUT X VPP High Z VCC 1C VCC 02 VIH A9 (1) (1) VH NOTES: 1) VH = 12.0V ± 0.5V 2) X = Either VIH or VIL 3) For Manufacturer Code and Device Code, A1 = VIH When A1 = VIL, both codes will read 7F 4) See DC Programming Characteristics for VPP voltage during programming EON’S STANDARD PRODUCT IDENTIFICATION CODE Hex Data Pins Code Manufacturer Device Type Continuation A0 0 1 0 1 A1 1 1 0 0 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 DQ7 0 0 0 0 DQ6 0 0 1 1 DQ5 0 0 1 1 DQ4 1 0 1 1 6 Preliminary DQ3 1 0 1 1 DQ2 1 0 1 1 DQ1 0 1 1 1 DQ0 0 0 1 1 1C 02 7F 7F Tel: 408-235-8680 Fax: 408-235-8685 EN27LV020 / EN27LV020B FIGURE 5. QUIKRITETM PROGRAMMING FLOW CHART 20 NOTE 1 NOTE 1: Either 100µs or 20µs pulse. 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 7 Preliminary Tel: 408-235-8680 Fax: 408-235-8685 EN27LV020 / EN27LV020B ABSOLUTE MAXIMUM RATINGS Storage Temperature -65ÝC to +125ÝC Ambient Temperature with Power Applied -40ÝC to +85ÝC Voltage with Respect to VSS All pins except A9, VPP, VCC A9, VPP VCC -0.6V to VCC + 0.5V -0.6V to +13.5V -0.6V to +7.0V OPERATING RANGES Commercial (C) Case Temperature(Tc) 0ÝC to +70ÝC Industrial (I) Case Temperature(Tc) -40ÝC to +85ÝC +3.0V to +3.6V Supply READ Voltages +2.7V to +3.6V (for battery operated systems) (Functionality is guaranteed between these limits) Stresses above those shown above may cause permanent damage to the device. This is a stress rating only and operation above these specifications for extended periods may affect device reliability. Operation outside the "OPERATING RANGES" shown above voids any and all warranty provisions. DC CHARACTERISTICS FOR READ OPERATION Symbol Parameter Min. VOH Output High Voltage 2.4 VOL Output Low Voltage VIH Input High Voltage VIL Input Low Voltage ILI Max. Unit Conditions V IOH = -2.0mA 0.45 V IOL = 2.0mA 2.0 VCC +0.5 V -0.3 0.8 V Input Leakage Current -5 5 µA VIN = 0 to 3.6V ILO Output Leakage Current -10 10 µA VOUT = 0 to 3.6V ICC3 VCC Power -Down Current 10 µA CE = VCC ± 0.3V ICC2 VCC Standby Current 0.6 mA CE = VIH ICC1 VCC Active Current 15 mA CE = VIL, f=5MHz, IOUT = 0mA IPP1 VPP Supply Current Read µA 100 CE = OE = VIL, VPP = 3.6V CAPACITANCE Symbol CIN COUT CVPP Parameter Input Capacitance Output Capacitance VPP Capacitance 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 Typ. 8 8 18 Max. 12 12 25 Unit pF pF pF Conditions VIN = 0V VOUT = 0V VPP = 0V 8 Preliminary Tel: 408-235-8680 Fax: 408-235-8685 EN27LV020 / EN27LV020B AC CHARACTERISTICS FOR READ OPERATION EN27LV020 / EN27LV020B Condition -90 Min Max -120 -120 Min Max -150 -150 Min Max -200 -200 Mi Max n Symbol Parameter tACC (3) Address to Output Delay CE = OE = VIL 90 120 150 200 tCE (2) CE to Output Delay OE = VIL 90 120 150 200 tOE (2, 3) OE to Output Delay OE = VIL 45 45 50 50 tDF (4, 5) OE or CE High to Output Float, whichever occurred first 40 40 40 40 tOH Output Hold from Address, CE or OE , whichever occurred first 0 0 0 0 Note: Please contact Marketing Department for other speed requirements. FIGURE 6. AC WAVEFORMS FOR READ OPERATION ADDRESS ADDRESS VALID CE tCE tOE OE tDF tACC OUTPUT 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 tOH HIGH Z OUTPUT VALID 9 Preliminary Tel: 408-235-8680 Fax: 408-235-8685 Unit ns ns ns ns ns EN27LV020 / EN27LV020B FIGURE 7: TEST WAVEFORMS AND MEASUREMENTS Output Test Load Input Test Waveform and Measurement Level DC PROGRAMMING CHARACTERISTICS Test Conditions VIN = VIL, VIH Parameter Input Load Current VIL Input Low Level -0.5 0.8 V VIH Input High Level 0.7 VCC VCC + 0.5 V VOL Output Low Voltage IOL = 2.0 mA 0.45 V VOH Output High Voltage IOH = - 400 µA Iccp VCC Supply Current IPP2 VPP Supply Current VID A9 Product Identification Voltage Vcc Quikrite Supply Voltage Vpp Quikrite Programming Voltage 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 Min. Limits Max 5.0 Symbol ILI 2.4 10 Preliminary µA V 40 CE = PGM = VIL, Units mA 10 mA 11.5 12.5 V 6.0 6.5 V 12.5 13.0 V Tel: 408-235-8680 Fax: 408-235-8685 EN27LV020 / EN27LV020B FIGURE 8. PROGRAMMING WAVEFORMS READ (VERIFY) PROGRAM VIH ADDRESS ADDRESS STABLE VIL tAS tOE VIH DATA tAH DATA OUT VALID DATA IN VIL tDS tDH 6.5V VCC tDFP 5.0V tVCS 13.0V VPP 5.0V tVPS tPRT VIH CE VIL tCES VIH PGM VIL tPW tOES VIH OE VIL 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 11 Preliminary Tel: 408-235-8680 Fax: 408-235-8685 EN27LV020 / EN27LV020B SWITCHING PROGRAMMING CHARACTERISTICS (TΑ = + 25 ° C ± 5 ° C) PARAMETER SYMBOL STANDARD PARAMETER DESCRIPTION tAS tOES tDS tAH tDH tDFP tVPS tPW Address Setup Time tVCS Min. 2 Max Units µs OE Setup Time 2 µs Data Setup Time 2 µs Address Hold Time 0 µs Data Hold Time 2 Output Enable to Output Float Delay 0 VPP Setup Time 2 PGM Program Pulse Width 20 Vcc Setup Time 2 µs tCES CE Setup Time 2 µs tOE Data Valid from OE µs 130 ns 105 µs µs ns 150 ORDERING INFORMATION EN27LV020 / EN27LV020B 90 P I TEMPERATURE RANGE (Blank) = Commercial ( 0ÝC to +70ÝC) I = Industrial ( -40ÝC to +85ÝC) PACKAGE P = 32 Plastic DIP J = 32 Plastic PLCC T = 32 Plastic TSOP SPEED 90 = 90ns 120 = 120ns 150 = 150ns 200 = 200ns BASE PART NUMBER EN = EON Silicon Devices 27 = EPROM LV = Low Voltage CMOS 020 = 256K x 8 3.0V to 3.6V Vcc Tolerance 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 12 Preliminary Tel: 408-235-8680 Fax: 408-235-8685 EN27LV020 / EN27LV020B 020B = 256K x 8 2.7V to 3.6V Vcc Tolerance 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 13 Preliminary Tel: 408-235-8680 Fax: 408-235-8685