www.fairchildsemi.com FAN1851A Ground Fault Interrupter Features Description • Improved performance over industry equivalents – Tight fault current range (Typ ±100µA) – Temperature compensated fault current characteristics – No external trimming required • Direct interface to SCR • Supply voltage derived from AC line—26V shunt • Adjustable sensitivity • Grounded neutral fault detection • Meets UL943 standards • 450µA quiescent current • Ideal for 120V or 220V systems • Package options: 8L DIP and 8L SOIC The FAN1851A is a controller for AC outlet ground fault interrupters. These devices detect hazardous grounding conditions (example: a pool of water or an electrical equipment connected to opposite phases of the AC line) in consumer and industrial environments. The output of the IC triggers an external SCR, which in turn opens a relay circuit breaker to prevent a harmful or lethal shock. Full advantage of the U.S. UL943 timing specification is taken to ensure maximum immunity to false triggering due to line noise. A special feature in the circuitry rapidly resets the integrating timing capacitor in the event that noise pulses introduce unwanted charging currents. Also, a flip-flop is included that ensures firing of even a slow circuit breaker relay on either of the two half-cycles of the line voltage when external full wave rectification is used. The application circuit can be configured to detect both normal faults (hot wire to ground) and grounded neutral faults. Block Diagram Timing Capacitor +VS Sensitivity Set Resistor Sense Amplifier Output ITH I2 D3 I I1 = TH for IF > 0 3ITH for IF = 0 Q2 SCR Trigger IF Latch Q3 Q1 D1 Q5 +VS A1 Q4 D2 IF 10V Inverting Input Ground Non-Inverting Input REV. 2.0.1 6/17/05 FAN1851A PRODUCT SPECIFICATION Pin Assignments SCR Trigger 1 8 +VS – Input 2 7 CT + Input 3 6 RSET Ground 4 5 Amp Out Functional Description The voltage at the supply pin is clamped to +26V by the internal shunt regulator D3. This shunt regulator also generates an artificial ground voltage for the noninverting input of A1 (shown as a +10V source). A1, Q1, and Q2 together act as a current mirror for fault current signals (which are derived from an external transformer). When a fault signal is present, the mirrored current charges the external timing capacitor until its voltage exceeds the latch trigger threshold (typically 17.5V). When this threshold is exceeded, the latch engages and Q3 turns off, allowing I2 to drive the SCR connected to the "SCR Trigger" pin. Extra Circuitry in the feedback path of A1 works with the switched current source I1 to remove any charge on CT induced by noise in the transformer. If no fault current is present, then I1 discharges CT with a current equal to 3 ITH, where ITH is the value of current set by the external RSET resistor. If fault signals are present at the input of A1 (which is held at virtual ground, +10V), one of the two current mirrors in the feedback path of A1 (Q4 and Q5) will become active, depending on which half-cycle the fault occurs. This action will raise the voltage at VS, switching I1 to a value equal to ITH, and reducing the discharge rate of CT to better allow fault currents to charge it. Notice that ITH discharges CT during both half-cycles of the line, while IF only charges CT during the half-cycle in which IF exits the "- Input" pin (since Q1 will only carry fault current in one direction). Thus, during one half-cycle, IF-ITH charges CT, while during the other half-cycle ITH discharges it. Definition of Terms Normal Fault: Grounded Neutral Fault: An unintentional electrical path, RB, between the load terminal of the hot line and the ground, as shown by the dashed lines in Figure1. An unintentional electrical path between the load terminal of the neutral line and the ground, as shown by the dashed lines in Figure 2. Hot GFI Line Hot Hot RLOAD RB Line Hot GFI Neutral Neutral Neutral Neutral RG Figure 1. Normal Fault 2 RLOAD RIN RG Figure 2. Grounded Neutral Fault REV. 2.0.1 6/17/05 PRODUCT SPECIFICATION FAN1851A Normal Fault Plus Grounded Neutral Fault: The combination of the normal fault and the grounded neutral fault, as shown by the dashed lines in Figure 3. Hot Hot GFI Line RLOAD RB Neutral Neutral RN RG Figure 3. Normal Fault Plus Grounded Neutral Fault Absolute Maximum Ratings Parameter Conditions Max Units Supply Current 19 mA Power Dissipation 570 mW 70 °C 300 °C Max Units 125 °C Operating Temperature Min -40 Lead Soldering Temperature, 60 seconds Thermal Characteristics Parameter Conditions Maximum Junction Temperature Min Maximum PD TA < 50°C 468 mW Thermal Resistance, θJA DIP 85 °C/W SOIC 150 REV. 2.0.1 6/17/05 3 FAN1851A PRODUCT SPECIFICATION DC Electrical Characteristics (TA = +25°C, ISHUNT = 5 mA) Parameters Test Conditions Min Typ Max Units Power Supply Shunt Regulator Voltage Pin 8, Average Value 22 26 30 V Latch Trigger Voltage Pin 7 15 17.5 20 V Sensitivity Set Voltage Pin 8 to Pin 6 6 7 8.2 V Output Drive Current Pin 1 With Fault 0.5 1 2.4 mA Output Saturation Voltage Pin 1 Without Fault 100 240 mV Output Saturation Resistance Pin 1 Without Fault 100 Ω Output External Current Sinking Capability1 Pin 1 Without Fault, VPIN1 Held to 0.3V 2 5 mA Noise Integration Sink Current Ratio Pin 7, Ratio of Discharge Currents Between No Fault and Fault Conditions 2.0 2.8 3.6 µA/µA Note: 1. This external applied current is in addition to the internal “output drive current” source. AC Electrical Characteristics (TA = +25°C, ISHUNT = 5 mA) Parameters Normal Fault Current Normal Fault Trip Sensitivity2 Time1 Normal Fault With Grounded Neutral Fault Trip Time 1 Conditions Min Typ Max Units See Figure 9 4.75 5 5.25 mA 500Ω Fault, see Figure 10 18 mS 500Ω Normal Fault, 18 mS 2Ω Neutral, see Figure 10 (Note 1) Notes: 1. Average of ten trials. 2. Required UL System sensitivity tolerance is 4mA to 6mA. 4 REV. 2.0.1 6/17/05 PRODUCT SPECIFICATION FAN1851A Typical Performance Characteristics (TA = +25°C) Fault Current (mA) Circuit of Figure 10 100 UL943 Normal Fault 10 0 0.01 0.1 1 100 Fault Current on Line [mA(rms)] 1000 RSET = 7V IF (rms)* x (0.91) Sense Transformer 1000:1 10 1 100K 10 1M 10M RSET (Ω) Trip Time (Seconds) Figure 4. Average Trip Time vs. Fault Current Figure 5. Normal Fault Current Threshold vs. RSET 1200 10 Pin 1 Saturation Voltage (V) Output Drive Current @ Pin 1 (μA) 1400 1000 800 31V 5 mA 8 600 1 1 mA 400 A VPIN1 200 4 0 0 5 10 15 20 25 30 35 Output Voltage @ VPIN1(V) Figure 6. Output Drive Current vs. Output Voltage REV. 2.0.1 6/17/05 1 5 mA 31V 8 0.1 IL 1 1 mA V 4 0.01 0.1 1 10 100 External Load Current (mA) Figure 7. Pin 1 Saturation Voltage vs. External Load Current, IL 5 FAN1851A PRODUCT SPECIFICATION Application Information A typical ground fault interrupter circuit is shown in Figure 10. It is designed to operate on 120 VAC line voltage with 5mA normal fault sensitivity. A full-wave rectifier bridge and a 15kΩ/2W resistor are used to supply the DC power required by the IC. A 1 µF capacitor at the "+VS" pin is used to filter the ripple of the supply voltage and is also connected across the SCR to allow firing of the SCR on either half-cycle. When a fault causes the SCR to trigger, the circuit breaker is energized and line voltage is removed from the load. At this time no fault current flows and the CT discharge current increases from ITH to 3ITH (see Block Diagram). This quickly resets both the timing capacitor and the output latch. The circuit breaker can be reset and the line voltage again supplied to the load, assuming the fault has been removed. A 1000:1 sense transformer is used to detect the normal fault. The fault current, which is basically the difference in current between the hot and neutral lines, is stepped down by 1000 and fed into the input pin of the operational amplifier through a 10µF capacitor. The 0.0033µF capacitor between the "- Input" pin and the "+ Input" pin and the 200pF capacitor between "+ Input" and "Ground" pins are added to obtain better noise immunity. The normal fault sensitivity is determined by the timing capacitor discharging current, ITH. ITH can be calculated by: The correct value for RSET can also be determined from the characteristic curve that plots equation (3). Note that this is an approximate calculation; the exact value of RSET depends on the specific sense transformer used and FAN1851A tolerances. Inasmuch as UL943 specifies a sensitivity “window” of 4mA to 6mA, a provision should be made to adjust RSET with a potentiometer. Independent of setting sensitivity, the desired integration time can be obtained through proper selection of the timing capacitor, CT. Due to the large number of variables involved, proper selection of CT is best done empirically. The following design example should only be used as a guideline. Assume the goal is to meet UL943 timing requirements. Also assume that worst case timing occurs during GFI start-up (S1 closure) with both a heavy normal fault and a 2Ω grounded neutral fault present. This situation is shown in Figure 8. S1 Hot Line Hot GFI Neutral Neutral (0.8)I RN 0.4 RB 500 I I TH 7V = ------------- ÷ 2 R SET (1) RB 500 At the decision point, the average fault current just equals the threshold current, ITH. I F ( rms ) I TH = ------------------- × 0.91 2 Figure 8. Example (2) Where IF(rms) is the rms input fault current to the operational amplifier and the factor of 2 is due to the fact that IF charges the timing capacitor only during one half-cycle, while ITH discharges the capacitor continuously. The factor 0.91 converts the rms value to an average value. Combining equations (1) and (2) we have: 7V R SET = -----------------------------------I F ( rms ) × 0.91 (3) For example, to obtain 5mA(rms) sensitivity for the circuit in Figure 7 we have: 7V R SET = ------------------------------ = 1.5MΩ 5 mA × 0.91 -----------------------------1000 6 (0.2)I (4) UL943 specifies ≤ 25ms average trip time under these conditions. Calculation of CT based upon charging currents due to normal fault only is as follows: 1. Start with a ≤ 25ms specification. Subtract 3ms GFI turn-on time (15kΩ and 1µF). Subtract 8ms potential loss of one half-cycle due to fault current sense of half-cycles only. 2. Subtract 4ms time required to open a sluggish circuit breaker. 3. This gives a total ≤ 10ms maximum integration time that could be allowed. 4. To generate 8ms value of integration time that accommodates component tolerances and other variables: I×T C T = ----------V (5) REV. 2.0.1 6/17/05 PRODUCT SPECIFICATION FAN1851A In practice, the actual value of CT will have to be modified to include the effects of the neutral loop upon the net charging current. The effect of neutral loop induced currents is difficult to quantify, but typically they sum with normal fault currents, thus allowing a larger value of CT. For UL943 requirements, 0.015µF has been found to be the best compromise between timing and noise. where: T = integration time V = threshold voltage I = average fault current into CT 120 V AC ( rms ) I = ⎛ ------------------------------------- ⎞ ⎝ ⎠ RB RN ⎞ ⎛ ---------------------⎝ RG + RN⎠ heavy fault current generated (swamps ITH) 1 turn × ⎛ -------------------------⎞ ⎝ 1000 turns⎠ current division of input sense transformer × For those GFI standards not requiring grounded neutral detection, a still larger value capacity can be used and better noise immunity obtained. The larger capacitor can be accommodated because RN and RG are not present, allowing the full fault current, I, to enter the GFI. portion of fault current shunted around GFI ⎛ 1---⎞ ⎝ 2⎠ CT charging on halfcycles only × ( 0.91 ) (6) rms to average conversion In Figure 10, grounded neutral detection is accomplished by feeding the neutral coil with 120Hz energy continuously and allowing some of the energy to couple into the sense transformer during conditions of neutral fault. Transformers may be obtained from Magnetic Metals, Inc., (http://www.magmet.com). therefore: 0.4 1 1 ⎛ 120 ---------⎞ × ⎛ ---------------------⎞ × ⎛ ------------⎞ × ⎛ ---⎞ × ( 0.91 ) ⎝ 500⎠ ⎝ 1.6 + 0.4⎠ ⎝ 1000⎠ ⎝ 2⎠ C T = ------------------------------------------------------------------------------------------------------------------ × 0.008 17.5 C T = 0.01 µF REV. 2.0.1 6/17/05 (7) 7 FAN1851A PRODUCT SPECIFICATION Application Circuits FAN1851A 7 1 CT 0.002 5 ISHUNT 8 A Timing Cap -In SCR Trigger +In Op Amp Output RSET +VS GND 2 100K 0.047 μF 3 6 800 Hz 4 1K 300 mV 1.5M 31V Figure 9. Normal Fault Sensitivity Test Circuit Gnd/Neutral Coil Sense Coil 200:1 1000:1 Hot Load MOV Line Neutral High μ Coil Circuit Breaker 1.0 μF Tant 0.01/400V FAN1851A 7 Timing Cap –In 15K/2W 0.0033 1 CT 0.015 SCR 0.01/400V 2 5 8 +In SCR Trigger Op Amp Output RSET +VS GND 3 6 200 pF 4 0.01 10 μF Tant RSET* *Adjust RSET for desired sensitivity. Figure 10. 120 Hz Neutral Transformer Application 8 REV. 2.0.1 6/17/05 FAN1851A PRODUCT SPECIFICATION Mechanical Dimensions #5 1.524 ±0.10 0.060 ±0.004 #4 0.018 ±0.004 #8 2.54 0.100 9.60 MAX 0.378 #1 9.20 ±0.20 0.362 ±0.008 ( 6.40 ±0.20 0.252 ±0.008 0.46 ±0.10 0.79 ) 0.031 8-Lead Plastic DIP Package 5.08 MAX 0.200 7.62 0.300 3.40 ±0.20 0.134 ±0.008 3.30 ±0.30 0.130 ±0.012 0.33 0.013 MIN +0.10 0.25 –0.05 +0.004 0~15° 9 Dimensions in Millimeters 0.010 –0.002 REV. 2.0.1 6/17/05 FAN1851A PRODUCT SPECIFICATION Mechanical Dimensions (continued) 8-Lead Plastic SOIC Package Inches Symbol Millimeters Min. Max. Min. Max. A A1 B C D .053 .004 .013 .008 .189 .069 .010 1.35 0.10 0.33 0.20 4.80 1.75 0.25 E e H h L N α ccc .150 .158 .050 BSC 3.81 4.01 1.27 BSC .228 .010 .016 5.79 0.25 0.40 .020 .010 .197 .244 .020 .050 8 0.51 0.25 5.00 6.20 0.50 1.27 8 0° 8° 0° 8° — .004 — 0.10 8 Notes: Notes 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm). 3. "L" is the length of terminal for soldering to a substrate. 4. Terminal numbers are shown for reference only. 5 2 2 5. "C" dimension does not include solder finish thickness. 6. Symbol "N" is the maximum number of terminals. 3 6 5 E 1 H 4 h x 45° D C A1 A SEATING PLANE e B 10 –C– LEAD COPLANARITY α L ccc C REV. 2.0.1 6/17/05 FAN1851A PRODUCT SPECIFICATION Ordering Information Part Number Package Pb-Free Operating Temperature Range Packing Method FAN1851AN 8-lead Plastic DIP Yes -40°C to +70°C Rail FAN1851AMX 8-lead Plastic SOIC Yes -40°C to +70°C Tape and Reel DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com REV. 2.0.1 6/17/05 © 2005 Fairchild Semiconductor Corporation