FDC6333C 30V N & P-Channel PowerTrench MOSFETs General Description Features These N & P-Channel MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. • Q1 2.5 A, 30V. RDS(ON) = 95 mΩ @ VGS = 10 V RDS(ON) = 150 mΩ @ VGS = 4.5 V • Q2 –2.0 A, 30V. RDS(ON) = 150 mΩ @ VGS = –10 V RDS(ON) = 220 mΩ @ VGS = –4.5 V These devices have been designed to offer exceptional power dissipation in a very small footprint for applications where the bigger more expensive SO-8 and TSSOP-8 packages are impractical. • Low gate charge • High performance trench technology for extremely low RDS(ON). Applications • SuperSOT –6 package: small footprint (72% smaller than • DC/DC converter • Load switch • LCD display inverter SO-8); low profile (1mm thick). D2 Q2(P) S1 D1 G2 SuperSOT TM -6 Pin 1 4 3 5 2 S2 G1 1 6 Q1(N) SuperSOT™-6 Absolute Maximum Ratings Symbol o TA=25 C unless otherwise noted Q1 Q2 Units VDSS Drain-Source Voltage Parameter 30 –30 V VGSS Gate-Source Voltage ±16 ±25 V ID Drain Current 2.5 –2.0 A 8 –8 – Continuous (Note 1a) – Pulsed Power Dissipation for Single Operation PD TJ, TSTG (Note 1a) 0.96 (Note 1b) 0.9 (Note 1c) 0.7 W –55 to +150 °C (Note 1a) 130 °C/W (Note 1) 60 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity .333 FDC6333C 7’’ 8mm 3000 units 2001 Fairchild Semiconductor Corporation FDC6333C Rev C (W) FDC6333C October 2001 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain–Source Breakdown Voltage ∆BVDSS ∆TJ Breakdown Voltage Temperature Coefficient IDSS Zero Gate Voltage Drain Current IGSSF Gate–Body Leakage, Forward IGSSR Gate–Body Leakage, Reverse On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) ID(on) gFS VGS = 0 V, ID = 250 µA VGS = 0 V, ID = –250 µA ID = 250 µA,Ref. to 25°C ID = –250 µA,Ref. to 25°C VDS = 24 V, VGS = 0 V VDS = –24 V, VGS = 0 V VGS = 16 V, VDS = 0 V VGS = 25 V, VDS = 0 V VGS = –16 V, VDS = 0 V VGS = –25 V, VDS = 0 V Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 30 –30 V 27 –22 mV/°C 1 –1 100 100 –100 –100 µA V nA nA (Note 2) Q1 VDS = VGS, ID = 250 µA 1 1.8 3 Q2 VDS = VGS, ID = –250 µA –1 –1.8 –3 Gate Threshold Voltage Temperature Coefficient Q1 ID = 250 µA,Ref. To 25°C Q2 ID = –250 µA,Ref. to 25°C Static Drain–Source On–Resistance Q1 VGS = 10 V, ID = 2.5 A VGS = 4.5 V, ID = 2.0 A VGS = 10 V, ID = 2.5 A,TJ=125°C Q2 VGS = –10 V, ID = –2.0 A VGS =– 4.5 V, ID = –1.7 A VGS = 10 V, ID= –2.0 A,TJ=125°C Q1 VGS = 10 V, Gate Threshold Voltage On–State Drain Current Forward Transconductance VDS = 5 V mV/°C 4 –4 73 90 106 95 142 149 95 150 148 mΩ 130 220 216 8 A Q2 VGS = –10 V, VDS = –5 V Q1 VDS = 5 V ID = 2.5 A 7 Q2 VDS = –5 V ID = –2.0A 3 Q1 VDS=15 V, V GS= 0 V, f=1.0MHz 282 Q2 VDS=–15 V, V GS= 0 V, f=1.0MHz 185 Q1 VDS=15 V, V GS= 0 V, f=1.0MHz 49 Q2 VDS=–15 V, V GS= 0 V, f=1.0MHz 56 VDS=15 V, V GS= 0 V, f=1.0MHz 20 Q2 VDS=–15 V, V GS= 0 V, f=1.0MHz 26 Q1 Q2 For Q1: VDS =15 V, VGS= 10 V, 4.5 9 4.5 9 –8 S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance Q1 Switching Characteristics td(on) tr Turn–On Delay Time Turn–On Rise Time tf Qg Qgs Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Q1 Q1 Q2 Gate–Drain Charge pF For Q2: VDS =–15 V, VGS= –10 V, I DS= 1 A RGEN = 6 Ω I DS= –1 A RGEN = 6 Ω 6 12 ns 23 34 ns 11 20 1.5 3 Q2 2 4 Q1 Q2 Q1 Q1 Q2 For Q1: VDS =15 V, VGS= 10 V, For Q2: VDS =–15 V, VGS= –10 V, I DS= 2.5 A RGEN = 6 Ω I DS= –2.0 A ns 13 19 Q1 Q2 Qgd pF (Note 2) Q2 td(off) pF 4.7 4.1 0.9 6.6 5.7 ns nC nC 0.8 0.6 nC 0.4 FDC6333C Rev C (W) FDC6333C Electrical Characteristics Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Drain–Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward Voltage Q1 0.8 Q2 –0.8 Q1 VGS = 0 V, IS = 0.8 A (Note 2) 0.8 1.2 Q2 VGS = 0 V, IS = 0.8 A (Note 2) 0.8 –1.2 A V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 130 °C/W when mounted on a 0.125 2 in pad of 2 oz. copper. b) 140°/W when mounted 2 on a .004 in pad of 2 oz copper c) 180°/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDC6333C Rev C (W) FDC6333C Electrical Characteristics FDC6333C Typical Characteristics: N-Channel 10 2 VGS = 10V VGS = 3.0V 6.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 4.5V 3.5V I D, DRAIN CURRENT (A) 8 6 3.0V 4 2 0 1.8 1.6 3.5V 1.4 4.0V 4.5V 1.2 6.0V 10V 1 0.8 0 1 2 3 0 2 4 6 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. 0.25 ID = 2.5A VGS = 10V RDS(ON) , ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 10 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 1.4 1.2 1 0.8 ID = 1.25A 0.2 0.15 TA = 125 oC 0.1 TA = 25oC 0.05 0.6 -50 -25 0 25 50 75 100 125 2 150 4 o 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation withTemperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 10 VGS = 0V o TA =-55 C 8 25o C I S, REVERSE DRAIN CURRENT (A) VDS =5V I D, DRAIN CURRENT (A) 8 125o C 6 4 2 0 10 TA = 125oC 1 25 oC 0.1 -55o C 0.01 0.001 0.0001 1.5 2 2.5 3 3.5 VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 4 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6333C Rev C (W) FDC6333C Typical Characteristics: N-Channel (continued) 400 VDS = 5V ID = 2.5A f = 1MHz VGS = 0 V 10V 8 15V CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 10 6 4 2 300 C ISS 200 100 COSS CRSS 0 0 0 1 2 3 4 5 0 5 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 15 20 25 30 Figure 8. Capacitance Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) 5 RDS(ON) LIMIT ID, DRAIN CURRENT (A) 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 10 1 VGS = 10V SINGLE PULSE R θJA = 180oC/W 0.1 10µs 100µs 1ms 10ms 100ms 1s DC TA = 25oC 0.01 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. 100 SINGLE PULSE RθJA = 180°C/W TA = 25°C 4 3 2 1 0 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 10. Single Pulse Maximum Power Dissipation. FDC6333C Rev C (W) FDC6333C Typical Characteristics: P-Channel 10 -6.0V 8 -ID, DRAIN CURRENT (A) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 3 VGS = -10V -4.5V 6 -4.0V 4 -3.5V 2 VGS = -3.5V 2.5 2 -4.0V -4.5V -5.0V 1.5 -6.0V -10V 1 0.5 0 0 1 2 3 4 0 5 2 4 Figure 11. On-Region Characteristics. 10 0.4 I D = -2A VGS =-10V RDS(ON), ON-RESISTANCE (OHM) R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 8 Figure 12. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 1.4 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 125 ID = -1A 0.3 TA = 125 oC 0.2 TA = 25o C 0.1 0 150 2 TJ , JUNCTION TEMPERATURE (oC) Figure 13. On-Resistance Variation withTemperature. 4 6 8 -VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 14. On-Resistance Variation with Gate-to-Source Voltage. 10 5 VGS = 0V 25oC o TA = -55 C -I S, REVERSE DRAIN CURRENT (A) VDS = -5V -ID, DRAIN CURRENT (A) 6 -ID, DRAIN CURRENT (A) -VDS, DRAIN-SOURCE VOLTAGE (V) 4 125oC 3 2 1 0 1 TA = 125oC 0.1 25o C 0.01 -55oC 0.001 0.0001 1.5 2.5 3.5 -V GS, GATE TO SOURCE VOLTAGE (V) Figure 15. Transfer Characteristics. 4.5 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 16. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6333C Rev C (W) FDC6333C Typical Characteristics: P-Channel (continued) 300 ID = -2.0A f = 1MHz VGS = 0 V -10V VDS = -5V 250 8 -15V CAPACITANCE (pF) -VGS, GATE-SOURCE VOLTAGE (V) 10 6 4 CISS 200 150 COSS 100 2 50 CRSS 0 0 0 1 2 3 4 5 0 5 Qg , GATE CHARGE (nC) Figure 17. Gate Charge Characteristics. 15 20 25 30 Figure 18. Capacitance Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) 5 RDS(ON) LIMIT 10 1 VGS = 10V SINGLE PULSE R θJA = 180oC/W 0.1 10µs 100µs 1ms 10ms 100ms 1s DC TA = 25oC 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) SINGLE PULSE RθJA = 180°C/W TA = 25°C 4 3 2 1 0 0.01 0.01 100 0.1 1 10 100 1000 t1, TIME (sec) Figure 19. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE ID, DRAIN CURRENT (A) 10 -V DS, DRAIN TO SOURCE VOLTAGE (V) Figure 20. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) + RθJA RθJA = 180°C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.01 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 21. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDC6333C Rev C (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4