November 1997 FDC653N N-Channel Enhancement Mode Field Effect Transistor General Description Features This N-Channel enhancement mode power field effect transistors is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMICA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. SuperSOTTM-6 SOT-23 SuperSOTTM-8 S D D 3 .65 5 A, 30 V. RDS(ON) = 0.035 Ω @ VGS = 10 V RDS(ON) = 0.055 Ω @ VGS = 4.5 V. Proprietary SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. SOIC-16 SOT-223 SO-8 1 6 2 5 3 4 G SuperSOT TM pin 1 -6 Absolute Maximum Ratings D D T A = 25°C unless otherwise note Symbol Parameter FDC653N Units VDSS Drain-Source Voltage 30 V VGSS Gate-Source Voltage - Continuous ±20 V ID Drain Current - Continuous (Note 1a) 5 A PD Maximum Power Dissipation (Note 1a) 1.6 - Pulsed 15 (Note 1b) TJ,TSTG Operating and Storage Temperature Range W 0.8 -55 to 150 °C THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W © 1997 Fairchild Semiconductor Corporation FDC653N Rev.C ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 o C 30 IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V V mV /oC 31 o 1 µA 10 µA IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V -100 nA TJ = 55 C ON CHARACTERISTICS (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA ∆VGS(th)/∆TJ Gate Threshold VoltageTemp.Coefficient ID = 250 µA, Referenced to 25 o C 1 RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 5 A 1.7 2 V mV /oC -4.2 o TJ = 125 C VGS = 4.5 V, ID = 4.2 A 0.027 0.035 0.042 0.056 0.046 0.055 8 Ω ID(on) On-State Drain Current VGS = 10 V, VDS = 5 V gFS Forward Transconductance VDS = 10 V, ID= 5 A 6.2 A S DYNAMIC CHARACTERISTICS Ciss Input Capacitance VDS = 15 V, VGS = 0 V, 350 pF Coss Output Capacitance f = 1.0 MHz 220 pF Crss Reverse Transfer Capacitance 80 pF SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time VDD = 10 V, ID = 1 A, 7.5 15 ns tr Turn - On Rise Time VGS = 4.5 V, RGEN = 6 Ω 12 25 ns tD(off) Turn - Off Delay Time 13 25 ns tf Turn - Off Fall Time 6 15 ns 17 nC Qg Total Gate Charge VDS = 15 V, ID = 5 A, 12 Qgs Gate-Source Charge VGS = 10 V 2.1 nC Qgd Gate-Drain Charge 2.6 nC DRAIN-SOURCE DIODE CHARACTERISTICS IS Continuous Source Diode Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A (Note 2) TJ = 125oC 1.3 A 0.75 1.2 V 0.6 1 Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 78oC/W when mounted on a minimum on a 1 in2 pad of 2oz Cu in FR-4 board. b. 156oC/W when mounted on a minimum pad of 2oz Cu in FR-4 board. 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. FDC653N Rev.C Typical Electrical Characteristics VGS = 10V 3.5 6.0 R DS(ON) , NORMALIZED 5.0 4.5 12 4.0 9 3.5 6 3 0 3.0 DRAIN-SOURCE ON-RESISTANCE I D , DRAIN-SOURCE CURRENT (A) 15 2.5 4.0 2 0.5 1 1.5 4.5 5.0 1.5 6.0 10 1 0.5 0 VGS =3.5V 3 2 0 3 6 9 I D , DRAIN CURRENT (A) VDS , DRAIN-SOURCE VOLTAGE (V) 1.8 0.18 1.6 R DS(ON) , ON-RESISTANCE (OHM) I D = 5.0A V GS = 10V 1.4 1.2 1 0.8 0.6 -50 I D =2A 0.15 0.12 0.09 TA = 125°C 0.06 TA = 25°C 0.03 0 -25 0 25 50 75 100 T , JUNCTION TEMPERATURE (°C) 125 150 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10 J Figure 3. On-Resistance Variation with Temperature. Figure 4. On Resistance Variation with Gate-To- Source Voltage. 15 V DS = 5V I S , REVERSE DRAIN CURRENT (A) 15 I D , DRAIN CURRENT (A) RDS(ON) , NORMALIZED 15 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. Figure 1. On-Region Characteristics. DRAIN-SOURCE ON-RESISTANCE 12 12 9 TA = -55°C 6 25°C 125°C 3 0 1.5 VGS =0V 1 2.5 3 3.5 VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 4 4.5 25°C 0.1 0.01 -55°C 0.001 0.0001 2 TA= 125°C 0 0.2 0.4 0.6 0.8 1 1.2 V SD , BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC653N Rev.B Typical Electrical And Thermal Characteristics 1000 ID = 5.0A V DS = 5V 8 10V 15V 6 500 CAPACITANCE (pF) VGS , GATE-SOURCE VOLTAGE (V) 10 4 Ciss Coss 200 100 2 0 0 2 4 6 8 10 12 50 0.1 14 0.3 Q g , GATE CHARGE (nC) V DS 30 S( IT 100 10 30 us POWER (W) 1s DC 0.3 VGS = 10V SINGLE PULSE RθJA = See Note 1b TA = 25°C 0.01 0.1 0.2 0.5 SINGLE PULSE RθJA =See note 1b TA = 25°C 4 1m s 10m s 100 ms 3 2 1 1 2 5 10 30 0 0.01 50 0.1 1 10 100 300 SINGLE PULSE TIME (SEC) V DS , DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE I D , DRAIN CURRENT (A) RD LIM 1 0.03 3 5 ) ON 3 0.1 1 , DRAIN TO SOURCE VOLTAGE (V) Figure 8. Capacitance Characteristics. Figure 7. Gate Charge Characteristics. 10 Crss f = 1 MHz V GS = 0V 0.5 D = 0.5 0.2 0.2 0.1 0.05 0.02 0.01 0.0001 RθJA (t) = r(t) * R θJA R θJA = See Note 1b 0.1 P(pk) 0.05 t1 0.02 0.01 Single Pulse t2 TJ - T = P * R JA(t) θ Duty Cycle, D = t 1/ t 2 A 0.001 0.01 0.1 1 10 100 300 t 1, TIME (sec) Figure 11. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal response will change depending on the circuit board design. FDC653N Rev.B