FDMC86261P P-Channel PowerTrench® MOSFET -150 V, -9 A, 160 mΩ Features General Description Max rDS(on) = 160 mΩ at VGS = -10 V, ID = -2.4 A Very low RDS-on mid voltage P channel silicon technology optimised for low Qg This P-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced PowerTrench® technology. This very high density process is especially tailored to minimize on-state resistance and optimized for superior switching performance. This product is optimised for fast switching applications as well as load switch applications Applications Max rDS(on) = 185 mΩ at VGS = -6 V, ID = -2.2 A Active Clamp Switch 100% UIL Tested Load Switch RoHS Compliant Bottom Top Pin 1 S S S S D S D S D G D G D D D D MLP 3.3x3.3 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous TC = 25 °C -Continuous TA = 25 °C ID TJ, TSTG ±25 V (Note 1a) -2.7 A -20 Single Pulse Avalanche Energy PD Units V -9 -Pulsed EAS Ratings -150 (Note 3) Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C 121 40 (Note 1a) Operating and Storage Junction Temperature Range 2.3 -55 to + 150 mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA Thermal Resistance, Junction to Ambient 3.1 (Note 1a) 53 °C/W Package Marking and Ordering Information Device Marking FDMC86261P Device FDMC86261P ©2013 Fairchild Semiconductor Corporation FDMC86261P Rev.C1 Package Power 33 1 Reel Size 13’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMC86261P P-Channel PowerTrench® MOSFET November 2013 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = -120 V, VGS = 0 V -1 μA IGSS Gate to Source Leakage Current VGS = ±25 V, VDS = 0 V ±100 nA -4 V -150 V -132 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C VGS = -10 V, ID = -2.4 A 130 160 rDS(on) Static Drain to Source On Resistance VGS = -6 V, ID = -2.2 A 141 185 VGS = -10 V, ID = -2.4 A,TJ = 125 °C 218 269 gFS Forward Transconductance -2 -3 6 VDS = -10 V, ID = -2.4 A mV/°C 9 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = -75 V, VGS = 0 V, f = 1 MHz 0.1 1021 1360 87 120 pF pF 4.7 10 pF 1.7 3.4 Ω Switching Characteristics td(on) Turn-On Delay Time 11 20 ns tr Rise Time 2.4 10 ns td(off) Turn-Off Delay Time tf Fall Time Qg(TOT) Total Gate Charge VGS = 0 V to -10 V Qg(TOT) Total Gate Charge VGS = 0 V to -6 V Qgs Total Gate Charge Qgd Gate to Drain “Miller” Charge VDD = -75 V, ID = -2.4 A, VGS = -10 V, RGEN = 6 Ω VDD = -75 V, ID = -2.4 A 18 33 ns 9.2 20 ns 17 24 nC 11 16 nC 4.2 nC 3.7 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = -2.4 A (Note 2) -0.81 -1.3 V VGS = 0 V, IS = -1.9 A (Note 2) -0.80 -1.2 V IF = -2.4 A, di/dt = 100 A/μs 81 130 ns 197 315 nC NOTES: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. b) 125 °C/W when mounted on a minimum pad of 2 oz copper a) 53 °C/W when mounted on a 1 in2 pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Starting TJ = 25 °C; P-ch: L = 3 mH, IAS = -9 A, VDD = -150 V, VGS = -10 V. 100% test at L = 0.1 mH, IAS = -28 A. ©2013 Fairchild Semiconductor Corporation FDMC86261P Rev.C1 2 www.fairchildsemi.com FDMC86261P P-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 4 VGS = -10 V VGS = -5.5 V VGS = -6 V -ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 20 15 VGS = -5 V 10 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 5 VGS = -4.5 V 0 0 1 2 3 4 VGS = -4.5 V 3 VGS = -5 V 2 VGS = -5.5 V 1 0 0 5 5 Figure 1. On Region Characteristics 15 20 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 500 ID = -2.4 A VGS = -10V 2.0 rDS(on), DRAIN TO 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -75 SOURCE ON-RESISTANCE (mΩ) 2.2 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 10 -ID, DRAIN CURRENT (A) -VDS, DRAIN TO SOURCE VOLTAGE (V) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 400 ID = -2.4 A 300 TJ = 125 oC 200 TJ = 25 oC 100 0 -50 4 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 5 6 7 8 9 10 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 4. On-Resistance vs Gate to Source Voltage Figure 3. Normalized On Resistance vs Junction Temperature 100 -IS, REVERSE DRAIN CURRENT (A) 20 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX -ID, DRAIN CURRENT (A) VGS = -10V VGS = -6 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 15 VDS = -10 V TJ = 150 oC 10 TJ = 25 oC 5 TJ = -55 oC 0 2 3 4 5 VGS = 0 V 10 TJ = 150 oC 1 TJ = 25 oC 0.1 0.01 TJ = -55 oC 0.001 0.0 6 0.2 0.4 0.6 0.8 1.0 -VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2013 Fairchild Semiconductor Corporation FDMC86261P Rev.C1 3 1.2 www.fairchildsemi.com FDMC86261P P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 10000 ID = -2.4 A VDD = -75 V 8 CAPACITANCE (pF) -VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = -100 V VDD = -50 V 6 4 Ciss 1000 Coss 100 Crss 10 2 f = 1 MHz VGS = 0 V 0 0 4 8 12 16 1 0.1 20 1 Figure 7. Gate Charge Characteristics 12 o -ID, DRAIN CURRENT (A) -IAS, AVALANCHE CURRENT (A) 100 Figure 8. Capacitance vs Drain to Source Voltage 50 TJ = 25 oC 10 TJ = 100 oC TJ = 125 oC 1 0.001 0.01 0.1 1 RθJC = 3.1 C/W 9 VGS = -6 V 3 0 25 10 20 50 75 100 125 150 o TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability Figure 10. Maximum Continuous Drain Current vs Case Temperature 30 P(PK), PEAK TRANSIENT POWER (W) 1000 10 100 μs 1 0.1 VGS = -10 V Limited by Package 6 tAV, TIME IN AVALANCHE (ms) -ID, DRAIN CURRENT (A) 10 -VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 1 ms THIS AREA IS LIMITED BY rDS(on) 10 ms SINGLE PULSE TJ = MAX RATED 100 ms RθJA = 125 oC/W o 0.01 TA = 25 C 0.005 0.1 1s CURVE BENT TO MEASURED DATA 1 10 10 s DC 100 500 -VDS, DRAIN to SOURCE VOLTAGE (V) TA = 25 oC 100 10 1 0.5 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 12. Single Pulse Maximum Power Dissipation Figure 11. Forward Bias Safe Operating Area ©2013 Fairchild Semiconductor Corporation FDMC86261P Rev.C1 SINGLE PULSE RθJA = 125 oC/W 4 www.fairchildsemi.com FDMC86261P P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: 0.01 0.001 -4 10 ZθJA(t) = r(t) x RθJA RθJA = 125 oC/W Peak TJ = PDM x ZθJA(t) + TA Duty Cycle, D = t1 / t2 SINGLE PULSE -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve ©2013 Fairchild Semiconductor Corporation FDMC86261P Rev.C1 5 www.fairchildsemi.com FDMC86261P P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 3.30+0.10 0.10 C A (3.40) 2.37 B 2X 8 5 0.45(4X) 2.152 (1.70) 3.30+0.10 (0.402) KEEP OUT AREA (0.648) PIN#1 QUADRANT 0.70(4X) 0.10 C TOP VIEW 0.65 2X 1 4 0.42(8X) 1.95 0.8 MAX 0.10 C RECOMMENDED LAND PATTERN (0.20) 0.05 0.00 0.08 C SIDE VIEW SEATING PLANE 2.27+0.05 PIN #1 IDENT 1 (0.79) A. DOES NOT CONFORM TO JEDEC REGISTRATION MO-229 B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. LAND PATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY 4 0.50+0.05 (4X) (0.35) (1.15) R0.15 2.00+0.05 0.30+0.05 (3X) 8 5 0.65 E. DRAWING FILE NAME : MKT-MLP08Srev2 F. FAIRCHILD SEMICONDUCTOR 0.35+0.05 (8X) 1.95 0.10 0.05 C A B C BOTTOM VIEW ©2013 Fairchild Semiconductor Corporation FDMC86261P Rev.C1 6 www.fairchildsemi.com FDMC86261P P-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. 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Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I66 ©2013 Fairchild Semiconductor Corporation FDMC86261P Rev.C1 7 www.fairchildsemi.com FDMC86261P P-Channel PowerTrench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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