FAIRCHILD FDN340

FDN340P
Single P-Channel, Logic Level, PowerTrench MOSFET
General Description
Features
This P-Channel Logic Level MOSFET is produced
using Fairchild Semiconductor advanced Power Trench
process that has been especially tailored to minimize
the on-state resistance and yet maintain low gate
charge for superior switching performance.
–2 A, 20 V.
RDS(ON) = 0.07 Ω @ V GS = –4.5 V
RDS(ON) = 0.11 Ω @ V GS = –2.5 V.
RDS(ON) = 0.210 Ω @ V GS = –1.8 V.
• Low gate charge (8nC typical).
These devices are well suited for portable electronics
applications: Load switching and power management,
battery charging circuits, and DC/DC conversion.
• High performance trench technology for extremely
low RDS(ON) .
• High power version of industry Standard SOT-23
package. Identical pin-out to SOT-23 with 30%
higher power handling capability.
D
34
D
0
S
TM
SuperSOT -3
G
G
Absolute Maximum Ratings
Symbol
T A=25oC unless otherwise noted
Parameter
V DSS
Drain-Source Voltage
V GSS
Gate-Source Voltage
ID
Drain Current
– Continuous
(Note 1a)
– Pulsed
TJ , TSTG
Ratings
Units
–20
V
±8
V
–2
A
–10
Power Dissipation for Single Operation
PD
S
(Note 1a)
0.5
(Note 1b)
0.46
Operating and Storage Junction Temperature Range
-55 to +150
°C
250
°C/W
75
°C/W
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJ C
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
340
FDN340P
7’’
8mm
3000 units
1999 Fairchild Semiconductor Corporation
FDN340P Rev C (W)
FDN340P
December 1999
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
–15
mV/°C
Off Characteristics
V GS = 0 V, ID = –250 µA
BV DSS
∆BV DSS
∆TJ
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
IDSS
Zero Gate Voltage Drain Current
IGSSF
Gate–Body Leakage, Forward
V GS = 8 V,
V DS = 0 V
100
nA
IGSSR
Gate–Body Leakage, Reverse
V GS = –8 V
V DS = 0 V
–100
nA
–1.5
V
On Characteristics
V GS(th)
∆V GS(th)
∆TJ
RDS(on)
–20
ID = –250 µA,Referenced to 25°C
V DS = –16 V,
V
V GS = 0 V
TJ =55°C
–1
µA
–10
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V DS = V GS , ID = –250 µA
ID = –250 µA,Referenced to 25°C
–0.4
–0.9
2.7
mV/°C
V GS = –4.5 V,
ID = –2 A
0.052
0.07
0.075
0.12
V GS = –2.5 V,
TJ =125°C
ID = –1.7A,
0.078
0.11
V GS = –1.8 V,
ID = –1.2 A,
Ω
0.21
ID(on)
On–State Drain Current
V GS = –4.5 V,
V DS = –5 V
gFS
Forward Transconductance
V DS = –4.5 V,
ID = –2 A
–5
8
A
S
V DS = –10 V,
f = 1.0 MHz
V GS = 0 V,
600
pF
175
pF
80
pF
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
(Note 2)
6
12
ns
9
18
ns
Turn–Off Delay Time
31
50
ns
tf
Turn–Off Fall Time
26
42
ns
Qg
Total Gate Charge
8
11
nC
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
V DD = –5 V,
V GS = –4.5 V,
V DS = –10V,
V GS = –4.5 V
ID = –0.5 A,
RGEN = 6 Ω
ID = –2 A,
1.3
nC
2.2
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
V SD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
V GS = 0 V, IS = –0.42 A
Voltage
(Note )
–0.7
–0.42
A
–1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while Rθ CA is determined by the user's board design.
a. 250°C/W when mounted on a
0.02in2 pad of 2 oz copper
b. 270°C/W when mounted on a
.001 in2 pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDN340P Rev C (W)
FDN340P
Electrical Characteristics
FDN340P
Typical Characteristics
2
-3.5V
V GS = -4.5V
-3.0V
8
RDS(on), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
- I D , DRAIN-SOURCE CURRENT (A)
10
-2.5V
6
-2.0V
4
2
1.8
V GS = -2.5 V
1.6
1.4
-3.0V
-3.5V
1.2
-4.0V
1
-4.5V
0
0
0
1
1
-VDS , DRAIN-SOURCE VOLTAGE (V)
2
0.8
2
0
2
-I
Figure 1. On-Region Characteristics.
D
4
6
, DRAIN CURRENT (A)
0.2
I D= -1A
V GS = -4.5V
1
R DS(ON) , ON-RESISTANCE (OHM)
DRAIN-SOURCE ON-RESISTANCE
I D = -2A
R DS(ON) , NORMALIZED
10
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
2
1
1
1
1
-50
-25
0
25
50
75
100
125
0.16
0.12
TA= 125°C
0.08
25°C
0.04
0
150
1
T ,JJUNCTION TEMPERATURE (°C)
Figure 3. On-Resistance Variation
withTemperature.
2
3
4
VGS , GATE TO SOURCE VOLTAGE (V)
5
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
VD S = - 5 V
T J= -55°C
-I S , REVERSE DRAIN CURRENT (A)
10
- ID , DRAIN CURRENT (A)
8
125°C
8
25°C
6
4
2
VGS= 0V
1
TJ = 125°C
0.1
1
2
2
3
-V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 5. Transfer Characteristics.
3
-55°C
0.01
0.001
0.0001
0
25°C
0
0.2
-V
0.4
0.6
0.8
1
, BODY DIODE FORWARD VOLTAGE (V)
SD
1.2
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDN340P Rev C (W)
FDN340P
Typical Characteristics
2000
I D = -2A
VDS= -5V
-10V
-15V
4
1000
CAPACITANCE (pF)
-VGS , GATE-SOURCE VOLTAGE (V)
5
3
2
1
0
200
Coss
f = 1 MHz
V GS = 0 V
100
0
2
4
6
Q G , GATE CHARGE (nC)
8
50
0.1
10
Figure 7. Gate Charge Characteristics.
0.2
Crss
0.5
1
2
5
-V DS, DRAIN TO SOURCE VOLTAGE (V)
10
20
Figure 8. Capacitance Characteristics.
50
30
1m
s
IT
LIM
N)
S(O
D
R
3
1
1s
10s
DC
0.3
VGS = -4.5V
SINGLE PULSE
R θJA = 270°C/W
TA = 25°C
0.1
0.03
0.01
0.1
0.2
SINGLE PULSE
RθJA = 270° C/W
TA = 25°C
40
10m
s
POWER (W)
10
-ID, DRAIN CURRENT (A)
Ciss
500
10
0m
s
30
20
10
0.5
1
2
5
10
-VDS , DRAIN-SOURCE VOLTAGE (V)
20
50
0
0.001
Figure 9. Maximum Safe Operating Area.
0.01
0.1
1
10
SINGLE PULSE TIME (SEC)
100
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
0.5
D = 0.5
0.2
0.1
0.05
0.02
0.01
0.2
R θ JA (t) = r(t) * Rθ JA
R θJA = 270 °C/W
0.1
0.05
0.02
0.01
P(pk)
t1
Single Pulse
t2
0.005
TJ - T A = P * R θ JA (t)
0.002
Duty Cycle, D = t1 /t2
0.001
0.0001
0.001
0.01
0.1
t1 , TIME (sec)
1
10
100
300
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDN340P Rev C (W)
SuperSOTTM-3 Tape and Reel Data and Package Dimensions
SSOT-3 Packaging
Configuration: Figure 1.0
Customize Label
Packaging Description:
SSOT-3 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
3,000 units per 7" or 177cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 10,000 units per 13"
or 330cm diameter reel. This and some other options are
described in the Packaging Information table.
Antistatic Cover Tape
These full reels are individually labeled and placed inside
a standard intermediate made of recyclable corrugated
brown paper with a Fairchild logo printing. One pizza box
contains eight reels maximum. And these intermediate
boxes are placed inside a labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Human Readable Embossed
Label
Carrier Tape
3P
3P
3P
3P
SSOT-3 Std Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Standard
(no flow code)
TNR
D87Z
SSOT-3 Std Unit Orientation
TNR
3,000
10,000
7" Dia
13"
187x107x183 343x343x64
Max qty per Box
24,000
30,000
Weight per unit (gm)
0.0097
0.0097
Weight per Reel (kg)
0.1230
0.4150
343mm x 342mm x 64mm
Intermediate box for D87Z Option
Human Readable Label
Note/Comments
Human Readable Label sample
Human Readable
Label
187mm x 107mm x 183mm
Intermediate Box for Standard Option
SSOT-3 Tape Leader and Trailer
Configuration: Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
300mm minimum or
75 empty pockets
Leader Tape
500mm minimum or
125 empty pockets
August 1999, Rev. C
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
SSOT-3 Embossed Carrier Tape
Configuration: Figure 3.0
P0
P2
D0
D1
T
E1
W
F
E2
Wc
B0
Tc
A0
P1
K0
User Direction of Feed
Dimensions are in millimeter
Pkg type
A0
B0
SSOT-3
(8mm)
3.15
+/-0.10
2.77
+/-0.10
W
8.0
+/-0.3
D0
D1
E1
E2
1.55
+/-0.05
1.125
+/-0.125
1.75
+/-0.10
F
6.25
min
3.50
+/-0.05
P1
P0
4.0
+/-0.1
4.0
+/-0.1
K0
T
1.30
+/-0.10
0.228
+/-0.013
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
Wc
0.06
+/-02
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
B0
5.2
+/-0.3
Tc
0.5mm
maximum
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
A0
Component Rotation
Sketch C (Top View)
Component lateral movement
Sketch B (Top View)
SSOT-3 Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7" Diameter Option
B Min
Dim C
See detail AA
W3
13" Diameter Option
Dim D
min
W2 max Measured at Hub
DETAIL AA
Dimensions are in inches and millimeters
Tape Size
Reel
Option
Dim A
Dim B
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 – 0.429
7.9 – 10.9
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
4.00
100
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 – 0.429
7.9 – 10.9
8mm
7" Dia
7.00
177.8
8mm
13" Dia
13.00
330
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
July 1999, Rev. C
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
SuperSOT-3 (FS PKG Code 32)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in:
inches [mil limeters]
Part Weight per unit (gram): 0.0097
September 1998, Rev. A
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The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench 
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST
FASTr™
GTO™
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
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NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
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RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. E