Fairchild FDS8958B Dual n & p-channel powertrenchâ® mosfet q1-n-channel: 30 v, 6.4 a, 26 mî© q2-p-channel: -30 v, -4.5 a, 51 mî© Datasheet

FDS8958B
Dual N & P-Channel PowerTrench® MOSFET
Q1-N-Channel: 30 V, 6.4 A, 26 mΩ Q2-P-Channel: -30 V, -4.5 A, 51 mΩ
Features
General Description
Q1: N-Channel
These dual N- and P-Channel enhancement mode power field
effect transistors are produced using Fairchild Semiconductor's
advanced PowerTrench® process that has been especially
tailored to minimize on-state resistance and yet maintain
superior switching performance.
„ Max rDS(on) = 26 mΩ at VGS = 10 V, ID = 6.4 A
„ Max rDS(on) = 39 mΩ at VGS = 4.5 V, ID = 5.2 A
Q2: P-Channel
These devices are well suited for low voltage and battery
powered applications where low in-line power loss and fast
switching are required.
„ Max rDS(on) = 51 mΩ at VGS = -10 V, ID = -4.5 A
„ Max rDS(on) = 80 mΩ at VGS = -4.5 V, ID = -3.3 A
„ HBM ESD protection level > 3.5 kV (Note 3)
Application
„ DC-DC Conversion
„ RoHS Compliant
„ BLU and motor drive inverter
D2
D2
Q2
D1
D1
G2
D2
5
4
G2
D2
6
3
S2
D1
7
2
G1
D1
8
1
S1
Q1
S2
G1
S1
Pin 1
SO-8
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current
ID
Q1
30
- Continuous
TA = 25 °C
- Pulsed
Q2
-30
Units
V
±20
±25
V
6.4
-4.5
30
-30
Power Dissipation for Dual Operation
PD
A
2.0
Power Dissipation for Single Operation
EAS
Single Pulse Avalanche Energy
TJ, TSTG
Operating and Storage Junction Temperature Range
TA = 25 °C
(Note 1a)
1.6
TA = 25 °C
(Note 1b)
0.9
(Note 4)
18
W
5
-55 to +150
mJ
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
(Note 1)
40
(Note 1a)
78
°C/W
Package Marking and Ordering Information
Device Marking
FDS8958B
Device
FDS8958B
©2008 Fairchild Semiconductor Corporation
FDS8958B Rev.B
Package
SO-8
1
Reel Size
13 ”
Tape Width
12 mm
Quantity
2500 units
www.fairchildsemi.com
FDS8958B Dual N & P-Channel PowerTrench® MOSFET
December 2008
Symbol
Parameter
Test Conditions
Type
Min
30
-30
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 µA, VGS = 0 V
ID = -250 µA, VGS = 0 V
Q1
Q2
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, referenced to 25 °C
ID = -250 µA, referenced to 25 °C
Q1
Q2
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
VDS = -24 V, VGS = 0 V
Q1
Q2
1
-1
µA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
VGS = ±25 V, VDS = 0 V
Q1
Q2
±100
±10
nA
µA
3.0
-3.0
V
V
24
-21
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 µA
VGS = VDS, ID = -250 µA
Q1
Q2
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 µA, referenced to 25 °C
ID = -250 µA, referenced to 25 °C
Q1
Q2
-6
5
VGS = 10 V, ID = 6.4 A
VGS = 4.5 V, ID = 5.2 A
VGS = 10 V, ID = 6.4A, TJ = 125 °C
Q1
21
29
31
26
39
39
VGS = -10 V, ID = -4.5 A
VGS = -4.5 V, ID = -3.3 A
VGS = -10 V, ID = -4.5 A, TJ = 125 °C
Q2
38
60
53
51
80
72
VDD = 5 V, ID = 6.4 A
VDD = -5 V, ID = -4.5 A
Q1
Q2
20
10
Q1
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
405
570
540
760
pF
Q1
Q2
75
115
100
155
pF
Q1
Q2
55
100
80
150
pF
Q1
Q2
2.4
4.4
Q1
Q2
4.3
6.0
10
12
ns
Q1
Q2
2.0
6.0
10
12
ns
Q2
VDD = -15 V, ID = -4.5 A,
VGS = -10 V, RGEN = 6 Ω
Q1
Q2
12
17
22
30
ns
Q1
Q2
2.0
7.0
10
14
ns
Q1
Q2
8.3
14
12
19
nC
Q1
Q2
4.1
7.0
5.8
9.6
nC
Q1
Q2
1.3
1.9
nC
Q1
Q2
1.7
3.6
nC
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
1.0
-1.0
2.0
-1.9
mV/°C
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
Q2
VDS = -15 V, VGS = 0 V, f = 1 MHZ
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg(TOT)
Total Gate Charge
VGS = 10 V
VGS = -10 V
Qg(TOT)
Total Gate Charge
VGS = 4.5 V
VGS = -4.5 V
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
©2008 Fairchild Semiconductor Corporation
FDS8958B Rev.B
Q1
VDD = 15 V, ID = 6.4 A,
VGS = 10 V, RGEN = 6 Ω
Q1
VDD = 15 V,
ID = 6.4 A
Q2
VDD = -15 V,
ID = -4.5 A
2
www.fairchildsemi.com
FDS8958B Dual N & P-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Q1
Q2
0.8
-0.8
1.2
-1.2
V
Q1
Q2
17
20
30
36
ns
Q1
Q2
6
8
12
16
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 1.3 A
VGS = 0 V, IS = -1.3 A
(Note 2)
(Note 2)
Q1
IF = 6.4 A, di/dt = 100 A/µs
Q2
IF = -4.5 A, di/dt = 100 A/µs
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a) 78 °C/W when
mounted on a 1 in2
pad of 2 oz copper
b) 135 °C/W when
mounted on a
minimun pad
2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
4. UIL condition: Starting TJ = 25 °C, L = 1 mH, IAS = 6 A, VDD = 27 V, VGS = 10 V . (Q1)
Starting TJ = 25 °C, L = 1 mH, IAS = -4 A, VDD = -27 V, VGS = -10 V. (Q2)
©2008 Fairchild Semiconductor Corporation
FDS8958B Rev.B
3
www.fairchildsemi.com
FDS8958B Dual N & P-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
3.0
30
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 10 V
VGS = 6 V
24
VGS = 4.5 V
VGS = 4 V
18
12
VGS = 3.5 V
6
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
0
0
0.5
1.0
1.5
2.0
2.5
VGS = 3.5 V
VGS = 4 V
2.5
VGS = 4.5 V
2.0
1.5
VGS = 6 V
1.0
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
0.5
0
3.0
6
Figure 1. On Region Characteristics
18
24
30
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.8
75
ID = 6.4 A
VGS = 10 V
1.6
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
0.6
0.4
-75
-50
-25
0
25
50
75
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
12
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
60
ID = 3.2 A
45
TJ = 125 oC
30
TJ = 25 oC
15
100 125 150
2
TJ, JUNCTION TEMPERATURE (oC)
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure 4. On-Resistance vs Gate to
Source Voltage
30
IS, REVERSE DRAIN CURRENT (A)
30
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
25
ID, DRAIN CURRENT (A)
VGS = 10 V
VDS = 5 V
20
15
10
TJ = 125 oC
TJ = 25 oC
5
VGS = 0 V
10
TJ = 125 oC
1
TJ = 25 oC
0.1
TJ = -55 oC
TJ = -55 oC
0
1
2
3
4
5
0.01
0.2
6
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
©2008 Fairchild Semiconductor Corporation
FDS8958B Rev.B
0.4
0.6
0.8
1.0
1.2
1.4
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
4
www.fairchildsemi.com
FDS8958B Dual N & P-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
1000
ID = 6.4 A
Ciss
8
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
VDD = 10 V
6
VDD = 15 V
4
VDD = 20 V
Coss
100
Crss
2
f = 1 MHz
VGS = 0 V
10
0.1
0
0
2
4
6
8
10
1
Qg, GATE CHARGE (nC)
30
Figure 8. Capacitance vs Drain
to Source Voltage
Figure 7. Gate Charge Characteristics
100
9
8
7
6
5
THIS AREA IS
LIMITED BY rDS(on)
4
TJ
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
= 25 oC
3
2
TJ = 125 oC
10
0.1 ms
1 ms
1
10 ms
0.1
100 ms
SINGLE PULSE
TJ = MAX RATED
1s
RθJA = 135 oC/W
10 s
DC
TA = 25 oC
1
0.001
0.01
0.1
1
10
0.01
0.01
100
tAV, TIME IN AVALANCHE (ms)
0.1
1
10
100
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Unclamped Inductive
Switching Capability
Figure 10. Forward Bias Safe
Operating Area
P(PK), PEAK TRANSIENT POWER (W)
500
VGS = 10 V
100
SINGLE PULSE
o
RθJA = 135 C/W
o
TA = 25 C
10
1
0.5
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
©2008 Fairchild Semiconductor Corporation
FDS8958B Rev.B
5
www.fairchildsemi.com
FDS8958B Dual N & P-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
o
RθJA = 135 C/W
0.001
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Junction-to-Ambient Transient Thermal Response Curve
©2008 Fairchild Semiconductor Corporation
FDS8958B Rev.B
6
www.fairchildsemi.com
FDS8958B Dual N & P-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
30
-ID, DRAIN CURRENT (A)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
4.5
VGS = -10 V
VGS = -6 V
24
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
18
VGS = -4.5 V
12
VGS = -4 V
6
VGS = -3.5 V
0
0.0
0.5
1.0
1.5
2.0
2.5
VGS = -3.5 V
4.0
VGS = -4 V
3.5
VGS = -4.5 V
3.0
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5%MAX
2.5
2.0
VGS = -6 V
1.5
1.0
VGS = -10 V
0.5
0
3.0
6
1.6
24
30
200
ID = -4.5 A
VGS = -10 V
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
0.6
-75
-50
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
18
Figure 16. Normalized on-Resistance vs Drain
Current and Gate Voltage
Figure 15. On- Region Characteristics
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
160
ID = -2.3 A
120
80
TJ = 125 oC
40
TJ = 25 oC
0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
2
4
6
8
10
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 18. On-Resistance vs Gate to
Source Voltage
Figure 17. Normalized On-Resistance
vs Junction Temperature
30
-IS , REVERSE DRAIN CURRENT (A)
30
-ID , DRAIN CURRENT (A)
12
-ID, DRAIN CURRENT (A)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
25
TJ = -55 oC
VDS = -5 V
20
TJ = 25 oC
TJ = 125 oC
15
10
5
2
3
4
5
6
TJ = 25 oC
0.1
TJ = -55 oC
0.4
0.6
0.8
1.0
1.2
1.4
1.6
-VSD, BODY DIODE FORWARD VOLTAGE (V)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 20. Source to Drain Diode
Forward Voltage vs Source Current
Figure 19. Transfer Characteristics
©2008 Fairchild Semiconductor Corporation
FDS8958B Rev.B
TJ = 125 oC
0.01
0.2
0
1
VGS = 0 V
10
7
www.fairchildsemi.com
FDS8958B Dual N & P-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 P-Channel) TJ = 25 °C unless otherwise noted
-VGS, GATE TO SOURCE VOLTAGE (V)
10
2000
ID = -4.5 A
1000
8
CAPACITANCE (pF)
VDD = -10 V
6
VDD = -15 V
4
VDD = -20 V
Ciss
Coss
100
2
Crss
f = 1 MHz
VGS = 0 V
0
0
3
6
9
12
30
0.1
15
1
Qg, GATE CHARGE (nC)
10
4
TJ
-Ig, GATE LEAKAGE CURRENT(A)
-IAS, AVALANCHE CURRENT (A)
-2
8
7
6
5
= 25 oC
3
2
TJ = 125 oC
VGS = 0V
-3
10
-4
10
-5
10
TJ = 125oC
-6
10
-7
10
TJ = 25oC
-8
10
-9
1
0.01
10
0.1
1
10
0
5
tAV, TIME IN AVALANCHE (ms)
10
15
20
25
30
35
-VGS, GATE TO SOURCE VOLTAGE(V)
Figure 23. Unclamped Inductive
Switching Capability
Figure 24. Ig vs Vgs
100
200
P(PK), PEAK TRANSIENT POWER (W)
-ID, DRAIN CURRENT (A)
30
Figure 22. Capacitance vs Drain
to Source Voltage
Figure 21. Gate Charge Characteristics
10
10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
THIS AREA IS
LIMITED BY rDS(on)
0.1 ms
1 ms
1
10 ms
0.1
100 ms
SINGLE PULSE
TJ = MAX RATED
1s
RθJA = 135 oC/W
10 s
DC
TA = 25 oC
0.01
0.01
0.1
1
10
100
SINGLE PULSE
RθJA = 135 oC/W
TA = 25 oC
10
1
0.5
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (sec)
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 25. Forward Bias Safe
Operating Area
©2008 Fairchild Semiconductor Corporation
FDS8958B Rev.B
VGS = -10 V
100
Figure 26. Single Pulse Maximum Power
Dissipation
8
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FDS8958B Dual N & P-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 P-Channel) TJ = 25 °C unless otherwise noted
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
0.01
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
o
RθJA = 135 C/W
0.002
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 27. Junction-to-Ambient Transient Thermal Response Curve
©2008 Fairchild Semiconductor Corporation
FDS8958B Rev.B
9
www.fairchildsemi.com
FDS8958B Dual N & P-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 P-Channel) TJ = 25 °C unless otherwise noted
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications may
change in any manner without notice.
Preliminary
First Production
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Rev. I37
©2008 Fairchild Semiconductor Corporation
FDS8958B Rev.B
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FDS8958B Dual N & P-Channel PowerTrench® MOSFET
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