FQS4410 May 2000 QFET TM FQS4410 Single N-Channel, Logic Level, Power MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as DC/DC converters, high efficiency switching for power management in portable and battery operated products. • • • • • • Absolute Maximum Ratings Symbol VDSS ID 10A, 30V, RDS(on) = 0.0135Ω @VGS = 10 V Low gate charge ( typical 21 nC) Low Crss ( typical 145 pF) Fast switching Improved dv/dt capability 175°C maximum junction temperature rating 8 4 7 3 6 2 5 1 TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 70°C) IDM Drain Current VGSS Gate-Source Voltage Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) dv/dt PD TJ, TSTG - Pulsed (Note 1) (Note 3) Linear Derating Factor Operating and Storage Temperature Range FQS4410 30 Units V 10 A 8 A 50 A ± 20 7.0 2.5 0.02 -55 to +175 V V/ns W W/°C °C Thermal Characteristics Symbol RθJA Parameter Thermal Resistance, Junction-to-Ambient ©2000 Fairchild Semiconductor International Typ -- Max 50 Units °C/W Rev. A, May 2000 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Unit s 30 -- -- V -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C VDS = 30 V, VGS = 0 V -- 0.03 -- -- 1 µA VDS = 24 V, TC = 125°C -- -- 10 µA IDSS Zero Gate Voltage Drain Current IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA 1.0 -- 2.5 V --- --- 0.0135 0.02 Ω 16 -- S On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 10 A VGS = 4.5 V, ID = 5 A Forward Transconductance VDS = 10 V, ID = 5 A -- VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 980 1280 pF -- 590 770 pF -- 145 190 pF gFS (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 15 V, ID = 5 A, RG = 50 Ω (Note 4, 5) VDS = 24 V, ID = 10 A, VGS = 5 V (Note 4, 5) -- 30 70 ns -- 165 340 ns -- 65 140 ns -- 110 230 ns -- 21 28 nC -- 4.2 -- nC -- 12 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 2.3 A ISM -- -- 50 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 2.3 A Drain-Source Diode Forward Voltage -- -- 1.1 V trr Reverse Recovery Time -- 45 -- ns Qrr Reverse Recovery Charge -- 45 -- nC VGS = 0 V, IS = 24 A, dIF / dt = 100 A/µs (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 3mH, IAS = 10A, VDD = 15V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 10A, di/dt ≤ 300A/us, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2000 Fairchild Semiconductor International Rev. A, May 2000 FQS4410 Electrical Characteristics VGS 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V 10 1 1 10 ID, Drain Current [A] I D, Drain Current [A] Top : 150℃ 25℃ 0 10 ※ Note : 1. 250μs Pulse Test 2. TC = 25℃ ※ Note 1. VDS = 10V 2. 250μs Pulse Test -55℃ -1 0 10 10 -1 10 10 0 2.0 2.5 3.0 3.5 4.0 VGS, Gate-Source Voltage [V] V DS , Drain-Source Voltage [V] Figure 2. Transfer Characteristics Figure 1. Output Characteristics 30 VGS = 4.5V I DR , Reverse Drain Current [A] R DS(ON) [mΩ ], Drain-Source On-Resistance 40 VGS = 10V 20 10 ※ Note : TJ = 25℃ 0 0 10 20 30 40 50 10 1 10 0 150℃ 10 0.2 0.4 0.6 0.8 1.0 1.2 VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs. Drain Current Figure 4. Source-Drain Diode Forward Voltage 12 3000 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd Coss 2000 Ciss ※ Note ; 1. VGS = 0 V 2. f = 1 MHz 1500 Crss 500 VDS = 15V 10 V GS , Gate-Source Voltage [V] 2500 1000 ※ Note : 1. VGS = 0V 2. 250μs Pulse Test 25℃ -1 ID, Drain Current [A] Capacitance [pF] FQS4410 Typical Characteristics VDS = 24V 8 6 4 2 ※ Note : ID = 10A 0 0 -1 10 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance vs. Drain-Source Voltage ©2000 Fairchild Semiconductor International 0 5 10 15 20 25 30 35 40 QG, Total Gate Charge [nC] Figure 6. Gate Charge vs. Gate-Source Voltage Rev. A, May 2000 FQS4410 Typical Characteristics (Continued) 2.5 1.2 R DS(ON) , (Normalized) 1.0 ※ Note : 1. VGS = 0 V 2. ID = 250 μA 0.9 0.8 -100 -50 0 50 100 150 Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.0 1.1 1.5 1.0 0.5 0.0 -100 200 ※ Note : 1. VGS = 10 V 2. ID = 10 A -50 0 50 100 150 200 o o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage vs. Temperature Figure 8. On-Resistance vs. Temperature 12 Operation in This Area is Limited by R DS(on) 2 10 10 ID , Drain Current [A] ID , Drain Current [A] 100 µ s 1 ms 1 10 10 ms 100 ms DC 0 10 ※ Notes : 6 4 2 o 1. TC = 25 C -1 10 8 o 2. TJ = 150 C 3. Single Pulse -1 0 10 0 25 1 10 10 50 2 10 1 100 125 150 Figure 10. Maximum Drain Current vs. Case Temperature D = 0 .5 0 .2 ※ Note s : 1 . Z θ J A( t ) = 5 0 ℃ /W M a x . 2 . D u t y F a c t o r , D = t 1 /t 2 3 . T J M - T A = P D M * Z θ J A( t ) 0 .1 0 .0 5 0 .0 2 10 0 0 .0 1 θ JA (t), T h e rm a l R e s p o n s e Figure 9. Maximum Safe Operating Area 10 75 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] Z s in g le p u ls e 10 -1 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 t 1 , S q u a r e W a v e P u ls e D u r a tio n [ s e c ] Figure 11. Thermal Response ©2000 Fairchild Semiconductor International Rev. A, May 2000 FQS4410 Gate Charge Test Circuit & Waveform 12V VGS Same Type as DUT 50KΩ Qg 200nF 5V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms RL VDS VDS 90% VDD RG ( 0.5 rated VDS ) Vin DUT 5V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD L VDS VDD ID BVDSS IAS RG 10V ID (t) DUT VDS (t) VDD tp ©2000 Fairchild Semiconductor International Time Rev. A, May 2000 FQS4410 Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ IS L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • IS controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop ©2000 Fairchild Semiconductor International Rev. A, May 2000 8-SOP MIN #5 1.80 MAX 0.071 +0.10 0.15 -0.05 +0.004 0.006 -0.002 MAX0.10 MAX0.004 6.00 ±0.30 0.236 ±0.012 3.95 ±0.20 0.156 ±0.008 5.72 0.225 0.41 ±0.10 0.016 ±0.004 #4 1.27 0.050 #8 5.13 MAX 0.202 #1 4.92 ±0.20 0.194 ±0.008 ( 0.56 ) 0.022 1.55 ±0.20 0.061 ±0.008 0.1~0.25 0.004~0.001 0~ 8° FQS4410 Package Dimensions 0.50 ±0.20 0.020 ±0.008 ©2000 Fairchild Semiconductor International Rev. A, May 2000 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOS™ EnSigna™ FACT™ FACT Quiet Series™ FAST® FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ POP™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2000 Fairchild Semiconductor International Rev. F1