Fairchild FSTD3306 2-bit low-power bus switch with level shifting Datasheet

FSTD3306
2-Bit Low-Power Bus Switch with Level Shifting
Features
Description
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The FSTD3306 is a 2-bit ultra high-speed CMOS FET
bus switch with enhanced level-shifting circuitry and
TTL-compatible active LOW control inputs. The low on
resistance of the switch allows inputs to be connected to
outputs with minimal propagation delay and without
generating additional ground bounce noise. The device
is organized as a 2-bit switch with independent busenable ( BE ) controls. When BE is LOW, the switch is
ON and Port A is connected to Port B. When BE is
HIGH, the switch is OPEN and a high-impedance state
exists between the two ports. Reduced voltage drive to
the gate of the FET switch permits nominal level shifting
of 5V to 3V through the switch. Control inputs tolerate
voltages up to 5.5V independent of VCC.
Typical 3Ω switch resistance at 5.0V VCC, VIN = 0V
Level shift facilitates 5V to 3.3V interfacing
Minimal propagation delay through the switch
Power down high impedance input/output
Zero bounce in flow-through mode
TTL compatible active LOW control inputs
Control inputs are over-voltage tolerant
Ordering Information
Part Number
Top
Mark
Package
Operating
PbTemperature Packing Method
Free
Range
FSTD3306MTCX FD3306 8-Lead Thin Shrink Small Outline Package
(TSSOP), JEDEC MO-153, 4.4mm Wide
Yes
-40 to +85°C
Tape & Reel
FSTD3306MTC
Yes
-40 to +85°C
Tube
Yes
-40 to +85°C
5000 units on Reel
FD3306 8-Lead Thin Shrink Small Outline Package
(TSSOP), JEDEC MO-153, 4.4mm Wide
FSTD3306L8X
TD
8-Lead MicroPak™
Logic Diagram
Figure 1.
© 2001 Fairchild Semiconductor Corporation
FSTD3306 Rev. 1.2.2 • 8/9/06
Logical Connections for the FSTD3306
www.fairchildsemi.com
FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting
August 2006
VCC
BE1
1
1A
2
1B
3
8
4
7
BE2
6
2B
5
2A
GND
Figure 2.
TSSOP Pin Outs (Top View)
Figure 3.
Pin Definitions
Pin
Description
A
Bus A switch I/O
B
Bus B switch I/O
BE
Bus enable input
MicroPak Pin Outs (Top View)
FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting
Connections Diagram
Function Table
Bus Enable Input ( BE )
Function
LOW Logic Level
B connected to A
HIGH Logic Level
Disconnected
© 2001 Fairchild Semiconductor Corporation
FSTD3306 Rev. 1.2.2 • 8/9/06
www.fairchildsemi.com
2
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables
are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table defines the
conditions for actual device operation.
Symbol
Parameter
VCC
Supply Voltage
VS
DC Switch Voltage
Condition
(1)
VIN
DC Output Voltage
IIK
DC Input Diode Current
IOUT
DC Output Sink Current
ICC/IGND
DC VCC or Ground Current
TSTG
Storage Temperature Range
Min.
Max
Unit
- 0.5
+ 7.0
V
- 0.5
+ 7.0
V
- 0.5
+ 7.0
V
VIN < 0V
Typ.
- 50
mA
128
mA
± 100
mA
- 65
+150
°C
TJ
Junction Temperature
under Bias
+ 150
°C
TL
Junction Lead Temperature
(Soldering, 10 Seconds)
+ 260
°C
PD
Power Dissipation
at +85°C
250
mW
Notes:
1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are
observed.
Recommended Operating Conditions(2)
Symbol
Parameter
VCC
Supply Voltage
VIN
VIN
Condition
Min.
Typ.
Max
Unit
4.5
5.5
V
Control Input Voltage
0.0
5.5
V
Switch Input Voltage
0.0
5.5
V
VOUT
Switch Output Voltage
0.0
5.5
V
TA
Operating Temperature
- 40
+ 85
°C
tr, tf
Input Rise and Fall Time
ΘJA
Thermal Resistance
Control Input
0
5
ns/V
Switch I/O
0
DC
ns/V
250
FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting
Absolute Maximum Ratings
°C/W
Notes:
2. Unused logic inputs must be held HIGH or LOW. They may not float.
© 2001 Fairchild Semiconductor Corporation
FSTD3306 Rev. 1.2.2 • 8/9/06
www.fairchildsemi.com
3
Ambient temperature (TA) is -40°C to +85° unless otherwise specified.
Symbol
VIK
Parameters
Conditions
HIGH-Level Input Voltage
4.5-5.5
VIL
LOW-Level Input Voltage
4.5-5.5
IIN
IOFF
RON
ICC
Typ.
Max.
-1.2
VIH
VOH
Min.
4.5
IIN = - 18 mA
Clamp Diode Voltage
VCC (V)
2.0
Unit
V
V
0.8
(3)
4.5-5.5
V
V
HIGH-Level Output Voltage
VIN = VCC
Input Leakage Current
0 ≤ VIN ≤ 5.5V
5.5
±1.0
µA
Power OFF Leakage
Current
0 ≤ A, B ≤ VCC
5.5
±1.0
µA
VIN = 0V, IIN = 64mA
4.5
3
7
Ω
VIN = 0V, IIN = 30mA
4.5
3
7
Ω
VIN = 2.4V, IIN = 15mA
4.5
15
50
Ω
VIN = VCC or GND, IOUT = 0
5.5
1.1
1.5
mA
10
µA
2.5
mA
(4)
Switch On Resistance
BE 1 = BE 2 = GND
Quiescent Supply Current
VIN = VCC or GND, IOUT = 0
5.5
BE 1 = BE 2 = VCC
ΔICC
VIN = 3.4V, IO = 0,
one control input only,
(5)
Increase in ICC per Input
5.5
1
other BE = VCC
Notes:
3. For typical DC characteristics, see Figures 7-9.
4. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is
determined by the lower of the voltages on the two (A or B) pins.
5. Increase per TTL-driven input (VIN = 3.4V, control input only). A and B pins do not contribute to ICC.
FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting
DC Electrical Characteristics
AC Electrical Characteristics
Ambient temperature (TA) is -40°C to +85° and CL = 50pF, RU = RD = 500Ω unless otherwise specified.
Symbol
Parameter
Conditions
tPHL, tPLH
Propagation Delay Bus-to-Bus
tPZL, tPZH
tPLZ, tPHZ
(6)
VCC (V)
Min.
Typ.
Max.
Unit
0.25
ns
VI = OPEN
4.5 - 5.5
Output Enable Time
VI = 7V for tPZL,
VI = 0V for tPZH
4.5 - 5.5
1.0
3.5
5.8
ns
Output Disable Time
VI = 7V for tPLZ,
VI = 0V for tPHZ
4.5 - 5.5
0.8
3.5
4.8
ns
Notes:
6. This parameter is guaranteed. The bus switch contributes no propagation delay other than the RC delay of the
typical on resistance of the switch and the 50pF load capacitance when driven by an ideal voltage source (zero
output impedance). The specified limit is calculated on this basis.
Capacitance
Symbol
CIN
Parameter
Control Pin Input Capacitance
Conditions
Typ.
VCC = 0V
2.5
pF
pF
pF
CI/O (OFF)
Port OFF Capacitance
VCC = 5.0V = BE
6
CI/O (ON)
Port ON Capacitance
VCC = 5.0V, BE = 0V
12
© 2001 Fairchild Semiconductor Corporation
FSTD3306 Rev. 1.2.2 • 8/9/06
Unit
www.fairchildsemi.com
4
Figure 4.
AC Test Circuit. Input driven by 50Ω source-terminated in 50Ω.
CL includes load and stray capacitance. Input PRR = 1.0 MHz; TW = 500ns.
© 2001 Fairchild Semiconductor Corporation
FSTD3306 Rev. 1.2.2 • 8/9/06
Figure 5.
AC Waveform
Figure 6.
AC Waveform
FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting
AC Loading and Waveforms
www.fairchildsemi.com
5
Figure 7.
Typical High-Level Output Voltage vs. Supply Voltage (TA = -40°C, VIN = VCC)
Figure 8.
Typical High-Level Output Voltage vs. Supply Voltage (TA = 25°C, VIN = VCC)
Figure 9.
Typical High-Level Output Voltage vs. Supply Voltage (TA = 85°C, VIN = VCC)
© 2001 Fairchild Semiconductor Corporation
FSTD3306 Rev. 1.2.2 • 8/9/06
FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting
DC Characteristics
www.fairchildsemi.com
6
Tape Format MicroPak
Package
Designator
Tape Section
Number Cavities
Cavity Status
Cover Tape
Status
L8X
Leader (Start End)
Carrier
Trailer (Hub End)
125 (typ.)
5000
75 (typ.)
Empty
Filled
Empty
Sealed
Sealed
Sealed
Tape Dimensions
Dimensions are in millimeters unless otherwise noted.
© 2001 Fairchild Semiconductor Corporation
FSTD3306 Rev. 1.2.2 • 8/9/06
FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting
Tape and Reel Specifications
www.fairchildsemi.com
7
Tape
Size
A
B
C
D
N
W1
W2
W23
8mm
7.0
(177.8)
0.059
(1.50)
0.512
(13.00)
0.795
(20.20)
2.165
(55.00)
.0331 +0.059 / -0.000
(8.40 +1.50 / -0.00)
0.567
(14.40)
W1 +0.078 / -0.039
(W1 +2.00 / -1.00)
© 2001 Fairchild Semiconductor Corporation
FSTD3306 Rev. 1.2.2 • 8/9/06
FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting
Reel Dimensions
www.fairchildsemi.com
8
FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 10.
© 2001 Fairchild Semiconductor Corporation
FSTD3306 Rev. 1.2.2 • 8/9/06
8-Lead MicroPak, 1.6mm-wide Package
www.fairchildsemi.com
9
FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 11.
8-Lead Thin Shrink Small Outline (TSSOP), JEDEC MO-153, 4.4mm-wide Package
© 2001 Fairchild Semiconductor Corporation
FSTD3306 Rev. 1.2.2 • 8/9/06
www.fairchildsemi.com
10
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an
exhaustive list of all such trademarks.
As used herein:
1.
Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2.
A critical component in any component of a life support,
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative or In
Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without
notice.
Definition
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will
be published at a later date. Fairchild Semiconductor reserves the
right to make changes at any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at any time
without notice to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed
for reference information only.
Rev. I20
© 2001 Fairchild Semiconductor Corporation
FSTD3306 Rev. 1.2.2 • 8/9/06
www.fairchildsemi.com
11
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