Intersil FSYC9160R1 Radiation hardened, segr resistant p-channel power mosfet Datasheet

FSYC9160D,
FSYC9160R
Radiation Hardened, SEGR Resistant
P-Channel Power MOSFETs
July 1998
Features
Description
• 47A, -100V, rDS(ON) = 0.053Ω
The Discrete Products Operation of Intersil has developed a
series of Radiation Hardened MOSFETs specifically
designed for commercial and military space applications.
Enhanced Power MOSFET immunity to Single Event Effects
(SEE), Single Event Gate Rupture (SEGR) in particular, is
combined with 100K RADS of total dose hardness to provide
devices which are ideally suited to harsh space environments. The dose rate and neutron tolerance necessary for
military applications have not been sacrificed.
• Total Dose
- Meets Pre-RAD Specifications to 100K RAD (Si)
• Single Event
- Safe Operating Area Curve for Single Event Effects
- SEE Immunity for LET of 36MeV/mg/cm2 with
VDS up to 80% of Rated Breakdown and
VGS of 10V Off-Bias
The Intersil portfolio of SEGR resistant radiation hardened
MOSFETs includes N-Channel and P-Channel devices in a
variety of voltage, current and on-resistance ratings.
Numerous packaging options are also available.
• Dose Rate
- Typically Survives 3E9 RAD (Si)/s at 80% BVDSS
- Typically Survives 2E12 if Current Limited to IDM
This MOSFET is an enhancement-mode silicon-gate power
field-effect transistor of the Vertical DMOS (VDMOS) structure. It is specially designed and processed to be radiation
tolerant. The MOSFET is well suited for applications
exposed to radiation environments such as switching regulation, switching converters, motor drives, relay drivers and
drivers for high-power bipolar switching transistors requiring
high speed and low gate drive power. This type can be
operated directly from integrated circuits.
• Photo Current
- 10.0nA Per-RAD(Si)/s Typically
• Neutron
- Maintain Pre-RAD Specifications
for 3E13 Neutrons/cm2
- Usable to 3E14 Neutrons/cm2
Ordering Information
RAD LEVEL
SCREENING LEVEL
PART NUMBER/BRAND
10K
Commercial
FSYC9160D1
10K
TXV
FSYC9160D3
100K
Commercial
FSYC9160R1
100K
TXV
FSYC9160R3
100K
Space
FSYC9160R4
Reliability screening is available as either commercial, TXV
equivalent of MIL-S-19500, or Space equivalent of
MIL-S-19500. Contact Intersil for any desired deviations
from the data sheet.
Symbol
D
Formerly available as type TA17766.
G
S
Packaging
SMD-2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
File Number
4552
FSYC9160D, FSYC9160R
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current
TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation
TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulsed Avalanche Current, L = 100µH, (See Test Figure). . . . . . . . . . . . . . . . . IAS
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS
Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
(Distance >0.063in (1.6mm) from Case, 10s Max)
FSYC9160D, FSYC9160R
-100
-100
UNITS
V
V
47
30
141
±20
A
A
A
V
208
83
1.67
141
47
141
-55 to 150
300
W
W
W/ oC
A
A
A
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
SYMBOL
BVDSS
VGS(TH)
IDSS
Gate to Source Leakage Current
IGSS
Drain to Source On-State Voltage
VDS(ON)
Drain to Source On Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
rDS(ON)12
td(ON)
TEST CONDITIONS
ID = 1mA, VGS = 0V
VGS = VDS,
ID = 1mA
VDS = -80V,
VGS = 0V
VGS = ±20V
VGS = -12V, ID = 47A
ID = 30A,
VGS = -12V
VDD = -50V, ID = 47A,
RL = 1.1Ω, VGS = -12V,
RGS = 2.35Ω
MAX
UNITS
-
-
V
-
-
-7.0
V
-2.0
-
-6.0
V
-1.0
-
-
V
-
-
25
µA
-
-
250
µA
-
-
100
nA
-
-
200
nA
-
-
-2.74
V
-
0.034
0.053
Ω
-
-
0.083
Ω
-
-
50
ns
-
75
ns
td(OFF)
-
-
100
ns
tf
-
-
50
ns
Qg(TOT)
VGS = 0V to -20V
Qg(12)
VGS = 0V to -12V
Threshold Gate Charge
Qg(TH)
VGS = 0V to -2V
Gate Charge Drain
TC = 25oC
TC = 125oC
TYP
-
tr
Gate Charge at 12V
Gate Charge Source
TC = -55oC
TC = 25oC
TC = 125oC
TC = 25oC
TC = 125oC
TC = 25oC
TC = 125oC
MIN
-100
VDD = -50V,
ID = 47A
Qgs
-
410
nC
220
250
nC
-
-
17
nC
-
48
66
nC
-
85
120
nC
V(PLATEAU)
ID = 47A, VDS = -15V
-
-7
-
V
Input Capacitance
CISS
-
5600
-
pF
Output Capacitance
COSS
VDS = -25V, VGS = 0V,
f = 1MHz
-
1550
-
pF
Reverse Transfer Capacitance
CRSS
-
560
-
pF
Thermal Resistance Junction to Case
RθJC
-
-
0.6
oC/W
Plateau Voltage
Qgd
-
2
FSYC9160D, FSYC9160R
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Forward Voltage
VSD
Reverse Recovery Time
TEST CONDITIONS
ISD = 47A
trr
TYP
MAX
UNITS
-0.6
-
-1.8
V
-
-
200
ns
MIN
MAX
UNITS
V
ISD = 47A, dISD/dt = 100A/µs
Electrical Specifications up to 100K RAD
TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
Drain to Source Breakdown Volts
MIN
TEST CONDITIONS
(Note 3)
BVDSS
VGS = 0, ID = 1mA
-100
-
Gate to Source Threshold Volts
(Note 3)
VGS(TH)
VGS = VDS, ID = 1mA
-2.0
-6.0
V
Gate to Body Leakage
(Notes 2, 3)
IGSS
VGS = ±20V, VDS = 0V
-
100
nA
Zero Gate Leakage
(Note 3)
IDSS
VGS = 0, VDS = -80V
-
25
µA
Drain to Source On-State Volts
(Notes 1, 3)
VDS(ON)
VGS = -12V, ID = 47A
-
-2.74
V
Drain to Source On Resistance
(Notes 1, 3)
rDS(ON)12
VGS = -12V, ID = 30A
-
0.053
Ω
NOTES:
1. Pulse test, 300µs Max.
2. Absolute value.
3. Insitu Gamma bias must be sampled for both VGS = -12V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS .
Single Event Effects (SEB, SEGR) Note 4
ENVIRONMENT (NOTE 5)
TEST
SYMBOL
Single Event Effects Safe Operating
Area
SEESOA
ION
SPECIES
TYPICAL LET
(MeV/mg/cm)
TYPICAL
RANGE (µ)
APPLIED
VGS BIAS
(V)
(NOTE 6)
MAXIMUM
VDS BIAS
(V)
Ni
26
43
20
-100
Br
37
36
10
-100
Br
37
36
15
-80
Br
37
36
20
-50
NOTES:
4. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN.
5. Fluence = 1E5 ions/cm2 (typical), T = 25oC.
6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).
Typical Performance Curves
Unless Otherwise Specified
1E-3
-120
LIMITING INDUCTANCE (HENRY)
LET = 26MeV/mg/cm2, RANGE = 43µ
LET = 37MeV/mg/cm2, RANGE = 36µ
FLUENCE = 1E5 IONS/cm2 (TYPICAL)
-100
VDS (V)
-80
-60
-40
-20
TEMP = 25oC
0
0
5
10
15
20
1E-4
ILM = 10A
30A
1E-5
100A
300A
1E-6
1E-7
-10
25
VGS (V)
-30
-100
-300
DRAIN SUPPLY (V)
FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA
FIGURE 2. DRAIN INDUCTANCE REQUIRED TO LIMIT
GAMMA DOT CURRENT TO IAS
3
-1000
FSYC9160D, FSYC9160R
Typical Performance Curves
Unless Otherwise Specified
(Continued)
500
TC = 25oC
ID , DRAIN CURRENT (A)
ID , DRAIN (A)
60
40
20
0
-50
0
50
100
100
100µs
1ms
10
10ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
1
-1
150
TC , CASE TEMPERATURE (oC)
-100
-10
-300
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
2.5
PULSE DURATION = 250ms, VGS = -12V, ID = 30A
2.0
QGS
NORMALIZED rDS(ON)
QG
-12V
QGD
VG
1.5
1.0
0.5
0.0
-80
CHARGE
BASIC GATE CHARGE WAVEFORM
-40
0
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 5. BASIC GATE CHARGE WAVEFORM
FIGURE 6. NORMALIZED rDS(ON) vs JUNCTION TEMPERATURE
THERMAL RESPONSE (ZθJC)
NORMALIZED
10
1
0.5
0.1
0.2
0.1
0.05
0.02
0.01
PDM
SINGLE PULSE
0.01
0.001
10-5
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (s)
FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE
4
t1
t2
100
101
FSYC9160D, FSYC9160R
Typical Performance Curves
Unless Otherwise Specified
(Continued)
IAS , AVALANCHE CURRENT (A)
300
100
STARTING TJ = 25oC
STARTING TJ = 150oC
10
IF R = 0
tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD)
IF R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
1
0.01
0.1
1
10
tAV, TIME IN AVALANCHE (ms)
FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING
Test Circuits and Waveforms
ELECTRONIC SWITCH OPENS
WHEN IAS IS REACHED
VDS
L
BVDSS
+
CURRENT I
TRANSFORMER AS
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
tP
VDS
IAS
VDD
+
50Ω
tP
VDD
50V-150V
DUT
50Ω
VGS ≤ 20V
tAV
FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 10. UNCLAMPED ENERGY WAVEFORMS
tON
VDD
tOFF
td(ON)
td(OFF)
tr
RL
VDS
tf
90%
90%
VDS
0V
10%
DUT
VGS = -12V
10%
90%
RGS
50%
VGS
50%
PULSE WIDTH
10%
FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT
FIGURE 12. RESISTIVE SWITCHING WAVEFORMS
5
FSYC9160D, FSYC9160R
Screening Information
Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table).
Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MAX
UNITS
Gate to Source Leakage Current
IGSS
VGS = ±20V
±20 (Note 7)
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 80% Rated Value
±25 (Note 7)
µA
Drain to Source On Resistance
rDS(ON)
TC = 25oC at Rated ID
±20% (Note 8)
Ω
Gate Threshold Voltage
VGS(TH)
ID = 1.0mA
±20% (Note 8)
V
NOTES:
7. Or 100% of Initial Reading (whichever is greater).
8. Of Initial Reading.
Screening Information
TEST
JANTXV EQUIVALENT
JANS EQUIVALENT
Gate Stress
VGS = -30V, t = 250µs
VGS = -30V, t = 250µs
Pind
Optional
Required
Pre Burn-In Tests (Note 9)
MIL-S-19500 Group A,
Subgroup 2 (All Static Tests at 25oC)
MIL-S-19500 Group A,
Subgroup 2 (All Static Tests at 25oC)
Steady State Gate
Bias (Gate Stress)
MIL-STD-750, Method 1042, Condition B
VGS = 80% of Rated Value,
TA = 150oC, Time = 48 hours
MIL-STD-750, Method 1042, Condition B
VGS = 80% of Rated Value,
TA = 150oC, Time = 48 hours
Interim Electrical Tests (Note 9)
All Delta Parameters Listed in the Delta Tests
and Limits Table
All Delta Parameters Listed in the Delta Tests
and Limits Table
Steady State Reverse
Bias (Drain Stress)
MIL-STD-750, Method 1042, Condition A
VDS = 80% of Rated Value,
TA = 150oC, Time = 160 hours
MIL-STD-750, Method 1042, Condition A
VDS = 80% of Rated Value,
TA = 150oC, Time = 240 hours
PDA
10%
5%
Final Electrical Tests (Note 9)
MIL-S-19500, Group A, Subgroup 2
MIL-S-19500, Group A,
Subgroups 2 and 3
NOTE:
9. Test limits are identical pre and post burn-in.
Additional Screening Tests
PARAMETER
MAX
UNITS
VDS = -80V, t = 10ms
5.5
A
IAS
VGS(PEAK) = -15V, L = 0.1mH
141
A
Thermal Response
∆VSD
tH = 10ms; VH = -25V; IH = 4A
55
mV
Thermal Impedance
∆VSD
tH = 500ms; VH = -20V; IH = 4A
(HEATSINK REQUIRED)
115
mV
Safe Operating Area
Unclamped Inductive Switching
SYMBOL
SOA
TEST CONDITIONS
6
FSYC9160D, FSYC9160R
Rad Hard Data Packages - Intersil Power Transistors
C. Preconditioning - Attributes Data Sheet
E. Preconditioning Attributes Data Sheet
Hi-Rel Lot Traveler
HTRB - Hi Temp Gate Stress Post Reverse
Bias Data and Delta Data
HTRB - Hi Temp Drain Stress Post Reverse
Bias Delta Data
D. Group A
- Attributes Data Sheet
F. Group A
- Attributes Data Sheet
E. Group B
- Attributes Data Sheet
G. Group B
- Attributes Data Sheet
- Attributes Data Sheet
H. Group C
- Attributes Data Sheet
- Attributes Data Sheet
I. Group D
- Attributes Data Sheet
TXV Equivalent
1. Rad Hard TXV Equivalent - Standard Data Package
A. Certificate of Compliance
B. Assembly Flow Chart
F. Group C
G. Group D
2. Rad Hard Max. “S” Equivalent - Optional Data Package
2. Rad Hard TXV Equivalent - Optional Data Package
A. Certificate of Compliance
A. Certificate of Compliance
B. Assembly Flow Chart
B. Serialization Records
C. Preconditioning - Attributes Data Sheet
- Precondition Lot Traveler
- Pre and Post Burn-In Read and Record
Data
C. Assembly Flow Chart
D. Group A
- Attributes Data Sheet
- Group A Lot Traveler
E. Group B
- Attributes Data Sheet
- Group B Lot Traveler
- Pre and Post Read and Record Data for
Intermittent Operating Life (Subgroup B3)
- Bond Strength Data (Subgroup B3)
- Pre and Post High Temperature Operating
Life Read and Record Data (Subgroup B6)
F. Group C
G. Group D
D. SEM Photos and Report
E. Preconditioning - Attributes Data Sheet
- Hi-Rel Lot Traveler
- HTRB - Hi Temp Gate Stress Post
Reverse Bias Data and Delta Data
- HTRB - Hi Temp Drain Stress Post
Reverse Bias Delta Data
- X-Ray and X-Ray Report
- Attributes Data Sheet
- Group C Lot Traveler
- Pre and Post Read and Record Data for
Intermittent Operating Life (Subgroup C6)
- Bond Strength Data (Subgroup C6)
- Attributes Data Sheet
- Group D Lot Traveler
- Pre and Post RAD Read and Record Data
F. Group A
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Subgroups A2, A3, A4, A5 and A7 Data
G. Group B
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Subgroups B1, B3, B4, B5 and B6 Data
H. Group C
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Subgroups C1, C2, C3 and C6 Data
I. Group D
Class S - Equivalents
1. Rad Hard “S” Equivalent - Standard Data Package
A. Certificate of Compliance
B. Serialization Records
C. Assembly Flow Chart
D. SEM Photos and Report
7
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Pre and Post Radiation Data
FSYC9160D, FSYC9160R
SMD-2
3 PAD CERAMIC LEADLESS CHIP CARRIER
INCHES
E
D
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.129
0.139
3.27
3.53
-
b
0.135
0.145
3.43
3.68
-
D
0.520
0.530
13.20
13.46
-
D1
0.435
0.445
11.05
11.30
-
D2
0.115
0.125
2.92
3.17
-
E
0.685
0.695
17.40
17.65
-
E1
0.470
0.480
11.94
12.19
-
E2
0.152
0.162
3.86
4.11
-
NOTES:
1. No current JEDEC outline for this package.
2. Controlling dimension: INCH.
3. Revision 2 dated 6-98.
A
E2
E1
2
D1
D2
3
1
b
1 - GATE
2 - SOURCE
3 - DRAIN
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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8
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