Impala GRM42-6X5R475K10 150ma sot-23 ultra low noise cmos rf-ldo regulator Datasheet

Impala Linear Corporation
ILC7082
150mA SOT-23 Ultra Low Noise
CMOS RF-LDO™ Regulator
General Description
Features
The ILC7082 is a 150mA low dropout (LDO) voltage regulator designed to provide a high performance solution to
low power systems. The device offers a typical combination of low dropout and low quiescent current expected
of CMOS parts, while uniquely providing the low noise and
high ripple rejection characteristics usually only associated
with bipolar LDO regulators.
The device has been optimized to meet the needs of modern wireless communications design; Low noise, low
dropout, small size, high peak current, high noise immunity.
The ILC7082 is designed to make use of low cost ceramic
capacitors while outperforming other devices that require
tantalum capacitors.
•
•
•
•
Ultra low 1mV dropout per 1mA load
1% output voltage accuracy
Only 30mVRMS noise
Uses low ESR ceramic output capacitor to minimize
noise and output ripple
• Only 100µA ground current at 100mA load
• Ripple rejection up to 85dB at 1kHz, 60dB at 1MHz
• Excellent line and load transient response
• Over current / over temperature protection
• Guaranteed to 150mA output current
• Industry standard five lead SOT-23 package
• Fixed 2.8V, 3.0V, 3.3V, 3.6V, 4.7V, 5.0V and adjustable
output voltage options
• Metal mask option available for custom voltages between
2.5V and 10V
Applications
•
•
•
•
Cellular phones
Wireless communicators
PDAs / palmtops / organizers
Battery powered portable electronics
TYPICAL CIRCUIT
VOUT
5
COUT
SOT-23-5
4
ILC7082
1
2
Ordering Information (TA = -40°C to +85°C)
CNOISE
3
VIN
ILC7082AIM5-xx
150mA, fixed voltage
ILC7082AIM5-ADJ
150mA, adjustable voltage
ILC7082AIK-xx 150mA
Fixed voltage (SOIC-8)
ON
CIN
Impala Linear Corporation
ILC7082 1.3
OFF
(408) 574-3939
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April 1999
1
150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
PIN DESCRIPTION ILC7082-XX (fixed voltage version)
Pin Number
1
2
3
4
Pin Name
VIN
GND
ON/OFF
CNOISE
5
VOUT
Pin Description
Connect Directly to Supply
Ground pin
By Applying less than 0.4V to this pin the device will be turned off
Optional Noise bypass capacitor may be connected between this pin
and the GND (pin 2). Do not connect CNOISE directly to the main
power ground plane.
Output voltage. Connect COUT between this pin and the GND (pin 2).
PIN DESCRIPTION ILC7082-AIK-xx (SOIC fixed voltage version)
Pin Number
1
2
3
4
5
6
7
8
Pin Name
GND
ON/OFF
VIN
N/C
N/C
VOUT
N/C
N/C
Pin Description
Connect Directly to Supply
Ground pin. Local ground for CNOISE and COUT.
Connect directly to supply
No connection
No connection
Output Voltage. Connect COUT between this pin and GND (pin 2)
No Connection
No Connection
PIN DESCRIPTION ILC7082-ADJ (adjutable voltage version)
Pin Number
1
2
3
4
Pin Name
VIN
GND
ON/OFF
VADJ
5
VOUT
Pin Description
Connect Directly to Supply
Ground pin. Local ground for CNOISE and COUT.
By Applying less than 0.4V to this pin the device will be turned off
Voltage feedback pin to set the adjustable output voltage. Do not
connect a capacitor to this pin.
Output voltage. Connect COUT between this pin and the GND (pin 2).
PIN PACKAGE CONFIGURATIONS
Fixed Voltage option
Impala Linear Corporation
ILC7082 1.3
(408) 574-3939
Adjustable Voltage option
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April 1999
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150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
ABSOLUTE MAXIMUM RATINGS (NOTE 1)
Parameter
Input voltage
On/Off Input voltage
Output Current
Output voltage
Package Power Dissipation
(SOT-23-5)
Maximum Junction Temp
Range
Symbol
VIN
VON/OFF
IOUT
Ratings
-0.3 to +13.5
-0.3 to VIN
Short circuit protected
VOUT
-0.3 to VIN+0.3
250 (Internally Limited)
PD
-40~+150
TJ(max)
TSTG
Storage Temperature
Operating Ambient
Temperature
TA
Package Thermal Resistance
θJA
Units
V
MA
V
MW
O
C
O
C
O
C
O
C/W
-40~+125
-40 to +85
333
ELECTRICAL CHARACTERISTICS ILC7082AIM5
Unless otherwise specified. all limits are at TA = 25°C, VIN = VOUT(NOM)+1V, IOUT = 1mA, COUT = 1µF, VON/OFF = 2V
Boldface limits apply over the operating temperature range. (Note 2)
Parameter
Input voltage
Range
Output Voltage
Symbol
VIN
VOUT
Feedback
Voltage
(ADJ Version)
Line regulation
Dropout
Voltage
"
(Note 3)"
Impala Linear Corporation
ILC7082 1.3
Conditions
IOUT = 1mA
<
<
1mA IOUT 100mA
<
<
1mA IOUT 100mA
<
<
1mA IOUT 150mA
<
<
1mA IOUT 150mA
VADJ
!VOUT
(VOUT* !VOUT)
<
Min
2
Typ
Max
13
Units
V
-1
-1.5
-2.5
-2.5
-3.5
1.215
1.202
VOUT (NOM)
VOUT (NOM)
+1
+1.5
+2.5
+2.5
+3.5
1.265
1.278
%VOUT
(NOM)
0.014
0.032
1
2
25
35
75
100
150
200
225
300
%/V
<
VOUT(NOM)+1V VIN 12V
VOUT (NOM)
0.007
IOUT = 0mA (Note 4)
0.1
IOUT = 10mA
10
IOUT = 50mA
50
IOUT = 100mA
100
IOUT = 150mA
150
VIN- VOUT
(408) 574-3939
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V
mV
April 1999
3
150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
ELECTRICAL CHARACTERISTICS ILC7082AIM5 (continued)
Unless otherwise specified. all limits are at TA = 25°C, VIN = VOUT(NOM)+1V, IOUT = 1mA, COUT = 1µF, VON/OFF = 2V
Boldface limits apply over the operating temperature range. (Note 2)
Parameter
Symbol
Conditions
IOUT = 0mA
Min
IOUT = 1mA
Ground Pin
Current
100
<
<
100
<
<
100
1mA IOUT 150mA
<
<
115
ION/OFF
VON/OFF = 0V
0.1
VON/OFF
High = Regulator On
Low = Regulator Off
VON/OFF = 0.6V, REGULATOR OFF
VON/OFF = 2V, REFULATOR ON
1.5
IOUT(peak)
VOUT > 0.95V OUT (NOM),
tpw=2ms
400
eN
BW = 300Hz to 50kHz, CIN = 1µF
CNOISE = 0.01µF, COUT = 2.2 µF,
IOUT = 10MA
IGND
1mA IOUT 100mA
1mA IOUT 150mA
Shutdown (OFF)
Current
ON/OFF Input
Voltage
ON/OFF Pin
Input Current
(Note 5)
Peak Output
Current (Note 4)
Output Noise
Voltage (RMS)
Ripple Rejection
Dynamic Line
Regulation
IIN (on/off)
"
!VOUT/!
VIN
"
"
!VOUT
(line)
Dynamic Load
Regulation
Short Circuit
Current
Typ
95
COUT = 4.7µF,
IOUT = 100MA
freq = 1kHz
freq = 10kHz
freq = 1mHz
Max
200
220
220
240
220
240
240
260
260
280
2
Units
µA
µA
13
0.06
0.3
1
µA
500
MA
30
µVRMS
85
70
60
14
dB
mV
40
mV
600
mA
VIN: VOUT (NOM) + 1V to
VOUT (NOM) + 2V,
tr/tf = 2ms; IOUT = 150MA
!V
OUT(load)
IOUT: 1mA to 150mA; tr < 5µS
I SC
VOUT = 0V
Note 1: Absolute maximum ratings indicate limits which when exceeded may result in damage to the component. Electrical specifications do not apply
when operating the device outside of its rated operating conditions.
Note 2: Specified Min/Max limits are production tested or guaranteed through correlation based on statistical control methods. Measurements are taken at
constant junction temperature as close to ambient as possible using low duty pulse testing.
Note 3: Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the nominal value measured with
an IV differential.
Note 4: Guaranteed by design
Note5 : The device’s shutdown pin includes a 2MΩ internal pulldown resistor connected to ground.
Impala Linear Corporation
ILC7082 1.3
(408) 574-3939
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April 1999
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150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
ELECTRICAL CHARACTERISTICS ILC7082AIM5 (continued)
OPERATION
The ILC7082 LDO design is based on an advanced circuit
configuration for which patent protection has been applied.
Typically it is very difficult to drive a capacitive output with
an amplifier. The output capacitance produces a pole in the
feedback path, which upsets the carefully tailored dominant
pole of the internal amplifier. Traditionally the pole of the
output capacitor has been “eliminated” by reducing the output impedance of the regulator such that the pole of the
output capacitor is moved well beyond the gain bandwidth
product of the regulator. In practice, this is difficult to do and
still maintain high frequency operation. Typically the output
impedance of the regulator is not simply resistive, such that
the reactive output impedance interacts with the reactive
impedance of the load resistance and capacitance. In addition, it is necessary to place the dominant pole of the circuit
at a sufficiently low frequency such that the gain of the regulator has fallen below unity before any of the complex
interactions between the output and the load occur. The
ILC7082 does not try to eliminate the output pole, but incorporates it into the stability scheme. The load and output
capacitor forms a pole, which rolls off the gain of the regulator below unity. In order to do this the output impedance
of the regulator must be high, looking like a current source.
The output stage of the regulator becomes a transconductance amplifier, which converts a voltage to a current with a
substantial output impedance. The circuit which drives the
transconductance amplifier is the error amplifier, which
compares the regulator output to the band gap reference
and produces an error voltage as the input to the transconductance amplifier. The error amplifier has a dominant pole
at low frequency and a “zero” which cancels out the effects
of the pole. The zero allows the regulator to have gain out
to the frequency where the output pole continues to reduce
the gain to unity. The configuration of the poles and zero are
shown in figure 1. Instead of powering the critical circuits
from the unregulated input voltage, the CMOS RF LDO
powers the internal circuits such as the bandgap, the error
amplifier and most of the transconductance amplifier from
the boot strapped regulated output voltage of the regulator.
This technique offers extremely high ripple rejection and
excellent line transient response.
A block diagram of the regulator circuit used in the ILC7082
is shown in figure 2 (following page), which shows the inputto-output isolation and the cascaded sequence of amplifiers
that implement the pole-zero scheme outlined above.
Impala Linear Corporation
ILC7082 1.3
(408) 574-3939
Figure 1: ILC7082 RF LDO frequency response
VIN
INTERNAL VDD
CNOISE
BANDGAP
REFERENCE
VREFD
TRANSCONDUCTANCE
AMPLIFIER
ERROR
AMPLIFIER
VOUT
FEEDBACK
GND
ON/OFF
Figure 2: ILC7082 RF LDO regulator block diagram
The ILC7082 is designed in a CMOS process with some
minor additions, which allow the circuit to be used at input
voltages up to 13V. The resulting circuit exceeds the frequency response of traditional bipolar circuits. The ILC7082
is very tolerant of output load conditions with the inclusion
of both short circuit and thermal overload protection. The
device has a very low dropout voltage, typically a linear
response of 1mV per milliamp of load current, and none of
the quasi-saturation characteristics of a bipolar output
devices. All the good features of the frequency response
and regulation are valid right to the point where the regulator goes out of regulation in a 4 millivolt transition region.
Because there is no base drive, the regulator is capable of
providing high current surges while remaining in regulation.
This is shown in the high peak current of 500mA which
allows for the ILC7082 to be used in systems that require
short burst mode operation.
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150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
ELECTRICAL CHARACTERISTICS ILC7082AIM5 (continued)
Shutdown (ON/OFF) Operation
The ILC7082 output can be turned off by applying 0.4V or
less to the device’s ON/OFF pin (pin 3). In shutdown mode,
the ILC7082 draws less than 1mA quiescent current. The
output of the ILC7081 is enabled by applying 1.5V to 13V at
the ON/OFF pin. In applications were the ILC7082 output
will always remain enabled, the ON/OFF pin may be connected to VIN (pin 1). The ILC7082’s shutdown circuitry
includes hysteresis, as such the device will operate properly even if a slow moving signal is applied to the ON/OFF pin.
The device’s shutdown pin includes a 2MW internal pull
down resistor connected to ground.
Short Circuit Protection
The ILC7082 output can withstand momentary short circuit
to ground. Moreover, the regulator can deliver very high output peak current due to its 1A instantaneous short circuit
current capability.
Thermal Protection
The ILC7082 also includes a thermal protection circuit
which shuts down the regulator when die temperature
exceeds 170°C due to overheating. In thermal shutdown,
once the die temperature cools to below 160°C, the regulator is enabled. If the die temperature is excessive due to
high package power dissipation, the regulator’s thermal circuit will continue to pulse the regulator on and off. This is
called thermal cycling.
Excessively high die temperature may occur due to high differential voltage across the regulator or high load current or
high ambient temperature or a combination of all three.
Thermal protection protects the regulator from such fault
conditions and is a necessary requirement in today’s
designs. In normal operation, the die temperature should be
limited to under 150°C.
Adjustable Output Voltage
Figure 5 shows how an adjustable output voltage can be
easily achieved using ILC7082-Adj. The output voltage,
VOUT is given by the following equation:
VOUT = 1.24V x (R1/R2 + 1)
R1
VOUT
Note that an external capacitor should not be connected to the adjustable feedback pin (pin 4). Connecting
an external capacitor to pin 4 may cause regulator
instability and lead to oscillations.
Maximum Output Current
The maximum output current available from the ILC7082 is
limited by the maximum package power dissipation as well
as the device’s internal current limit. For a given ambient
temperature, TA, the maximum package power dissipation
is given by:
PD(MAX) = (TJ(MAX) - TA) / θJA
where TJ(MAX) = 150°C is the maximum junction temperature
and θJA = 333°C/W is the package thermal resistance. For
example at TA = 85°C ambient temperature, the maximum
package power dissipation is;
PD(MAX) = 195mW.
The maximum output current can be calculated from the following equation:
IOUT(MAX) < PD(MAX) / (VIN - VOUT)
For example at VIN = 6V, VOUT = 5V and TA = 85°C, the maximum output current is IOUT(MAX) < 195mA. At higher output
current, the die temperature will rise and cause the thermal
protection circuit to be enabled.
APPLICATION HINTS
Figure 4 shows the typical application circuit for the ILC7082.
VOUT
5 SOT23-5 4
R2
VIN
CIN
ILC7082-ADJ
1
CNOISE
ILC7082
COUT
5 SOT23-5 4 VADJ
COUT
VIN
For best results, a resistor value of 470kW or less may be
used for R2. The output voltage can be programmed from
2.5V to 12V.
2
CIN
1
2
3
ON
OFF
3
Figure 4: Basic application circuit for fixed
output voltage versions
ON
OFF
Fig. 3: Application circuit for adjustable output voltage
Impala Linear Corporation
ILC7082 1.3
(408) 574-3939
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April 1999
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150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
Input Capacitor
An input capacitor CIN of value 1µF or larger should be connected from VIN to the main ground plane. This will help to
filter supply noise from entering the LDO. The input capacitor should be connected as close to the LDO regulator input
pin as is practical. Using a high-value input capacitor will
offer superior line transient response as well as better power supply ripple rejection. A ceramic or tantalum capacitor
may be used at the input of the LDO regulator.
Note that there is a parasitic diode from the LDO regulator
output to the input. If the input voltage swings below the regulator’s output voltage by a couple of hundred milivolts then
the regulator may be damaged. This condition must be
avoided. In many applications a large value input capacitor,
CIN, will hold VIN higher than VOUT and decay slower than VOUT
when the LDO is powered off.
Output Capacitor Selection
Impala strongly recommends the use of low ESR (equivalent series resistance) ceramic capacitors for COUT and
CNOISE The ILC7082 is stable with low ESR capacitor (as low
as zero Ω). The value of the output capacitor should be 1µF
or higher. Either ceramic chip or a tantalum capacitor may
be used at the output.
Use of ceramic chip capacitors offer significant advantages
over tantalum capacitors. A ceramic capacitor is typically
cheaper than a tantalum capacitor, it usually has a smaller
footprint, lower height, and lighter weight than a tantalum
capacitor. Furthermore, unlike tantalum capacitors which are
polarized and can be damaged if connected incorrectly,
ceramic capacitors are non-polarized. Low value ceramic
chip capacitors with X5R or X7R dielectric are available in
the 100pF to 4.7mF range. Beware of using ceramic capacitors with Y5V dielectric since their ESR increases significantly at cold temperatures. Figure 12 shows a list of recommended ceramic capacitors for use at the output of ILC7082.
Note: If a tantalum output capacitor is used then for stable
operation Impala recommends a low ESR tantalum capacitor with maximum rated ESR at or below 0.4W. Low ESR
tantalum capacitors, such as the TPS series from AVX
Corporation (www.avxcorp.com) or the T495 series from
Kemet (www.kemet.com) may be used.
In applications where a high output surge current can be expected, use a high value but low ESR output capacitor for superior
load transient response. The ILC7082 is stable with no load.
Noise Bypass Capacitor
In low noise applications, the self noise of the ILC7082 can
be decreased further by connecting a capacitor from the
noise bypass pin (pin 4) to ground (pin 2). The noise bypass
pin is a high impedance node as such care should be taken
in printed circuit board layout to avoid noise pick-up from
external sources. Moreover, the noise bypass capacitor
should have low leakage.
Impala Linear Corporation
ILC7082 1.3
(408) 574-3939
Noise bypass capacitors with a value as low as 470pF may
be used. However, for optimum performance, use a 0.01mF
or larger, ceramic chip capacitor. Note that the turn on and
turn off response of the ILC7082 is inversely proportional to
the value of the noise bypass capacitor. For fast turn on and
turn off, use a small value noise bypass capacitor. In applications were exceptionally low output noise is not required,
consider omitting the noise bypass capacitor altogether.
The Effects of ESR (Equivalent Series Resistance)
The ESR of a capacitor is a measure of the resistance due
to the leads and the internal connections of the component.
Typically measured in mΩ (milli-ohms) it can increase to
ohms in some cases.
Wherever there is a combination of resistance and current,
voltages will be present. The control functions of LDOs use
two voltages in order to maintain the output precisely; VOUT
and VREF.
With reference to the block diagram in figure 4, VOUT is fed
back to the error amplifier and is used as the supply voltage
for the internal components of the ILC7082. So any change
in VOUT will cause the error amplifier to try to compensate to
maintain VOUT at the set level and noise on VOUT will be
reflected into the supply of each internal components of the
ILC7082. So any change in VOUT will cause the error amplifier to try to compensate to maintain VOUT at the set level and
noise on VOUT will be reflected into the supply of each internal circuit. The reference voltage, VREF, is influenced by the
CNOISE pin. Noise into this pin will add to the reference voltage and be fed through the circuit. These factors will not
cause a problem if some simple steps are taken. Figure 5
shows where these added ESR resistances are present in
the typical LDO circuit.
VOUT
IOUT
R*
IC
RC
COUT
5 SOT-23-5 4
CNOISE
ILC7082
VIN
1
R*
CIN
2
RF LDOTM
Regulator
3
ON
OFF
Figure 5: ESR present in COUT and CNOISE
With this in mind low ESR components will offer better performance where the LDO may be subjected to large load
transients current. ESR is less of a problem with CIN as the
voltage fluctuations at the input will be filtered by the LDO.
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150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
However, being aware of these current flows, there is also
another potential source of induced voltage noise from the
resistance inherent in the PCB trace. Figure 6 shows where
the additive resistance of the PCB can manifest itself. Again
these resistances may be very small, but a summation of
several currents can develop detectable voltage ripple and
will be amplified by the LDO. Particularly the accumulation
of current flows in the ground plane can develop significant
voltages unless care is taken. With a degree of care, the
ILC7082 will yield outstanding performance.
Printed Circuit Board Layout Guidelines
As was mentioned in the previous section, to take full
advantage of any high performance LDO regulator requires
paying careful attention to grounding and printed circuit
board (PCB) layout.
VOUT IOUT
COUT
ESR
I1
RPCB
ESR
RPCB
5
SOT-23-5
4
CNOISE
ILC7082
VIN
1
CIN
RPCB
2
Figure 7: Effects of poor circuit layout
Figure 8 shows an optimum schematic. In this schematic,
high output surge current has little effect on the ground current and noise bypass current return of the LDO regulator.
Note that the key difference here is that COUT and CNOISE are
directly connected to the LDO regulator’s ground pin. The
LDO is then separately connected to the main ground plane
and returned to a single point system ground.
The layout of the LDO and its external components are also
based on some simple rules to minimize EMI and output
voltage ripple.
3
RPCB
ON
OFF
Figure 6: Inherent PCB resistance
Figure 7 shows the effects of poor grounding and PCB layout magnified by the ESR and PCB resistances and the
accumulation of current flows.
Note thatparticularly during high output load current, the
LDO regulator’s ground pin and the ground return for COUT
and CNOISE are not at the same potential as the system
ground. This is due to high frequency impedance caused by
PCB’s trace inductance and DC resistance. The current
loop between COUT, CNOISE and the LDO regulator’s ground
pin will degrade performance of the LDO.
Impala Linear Corporation
ILC7082 1.3
(408) 574-3939
www.impalalinear.com
April 1999
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150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
Figure 8: Recommended application circuit schematic.
Figure 9: Recommended application circuit layout ( not drawn to scale)
Note, ground plane is bottom layer of PCB and connects to top layer ground
connections through vias.
Evaluation Board Parts List For Printed Circuit Board Shown Above
Pin Number
U1
J1
Cin
Cnoise
Cout
Pin Name
ILC7082AIM5-30
69190-405
GRM40 Y5V 105Z16
ECU-V1H103KBV
GRM42-6X5R475K10
Manufacturer
Impala Linear
Berg
muRata
Panasonic
muRata
GROUNDING RECOMMENDATIONS
1. Connect CIN between VIN of the ILC7082 and the
“GROUND PLANE”.
2. Keep the ground side of COUT and CNOISE connected to the
“LOCAL GROUND” and not directly to the “GROUND PLANE”.
3. On multilayer boards use component side copper for
grounding around the ILC7082 and connect back to a
“GROUND PLANE” using vias.
4. If using a DC-DC converter in your design, use a star
grounding system with separate traces for the power
ground and the control signals. The star should radiate from
where the power supply enters the PCB.
Impala Linear Corporation
ILC7082 1.3
(408) 574-3939
Description
150mA RF LDOTM regulator
Connector, four position header
Ceramic capacitor, 1µF,16V,SMT (size 0805)
Ceramic capacitor, 0.01µF,16V,SMT (size 0603)
Ceramic capacitor, 4.7µF16V,SMT (size 1206)
LAYOUT CONSIDERATIONS
1. Place all RF LDO related components; ILC7082, input
capacitor CIN, noise bypass capacitor CNOISE and output
capacitor COUT as close together as possible.
2. Keep the output capacitor COUT as close to the ILC7082
as possible with very short traces to the VOUT and GND pins.
3. The traces for the related components; ILC7082, input
capacitor CIN, noise bypass capacitor CNOISE and output
capacitor COUT can be run with minimum trace widths close
to the LDO.
4. Maintain a separate “LOCAL GROUND” remote from the
“GROUND PLANE” to ensure a quiet ground near the LDO.
Figure 9 shows how this circuit can be translated into a
PCB layout.
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April 1999
9
150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
Recommended Ceramic Output Capacitors
Capacitor Vendor
COUT
Capacitor Size
IOUT
Dielectric
Part Number
1µF
“
“
“
“
“
0805
0805
0805
1206
1206
1206
0-150 mA
“
“
“
“
“
X5R
X7R
X7R
X7R
X7R
X5R
C2012X5R1A105KT
GRM40X7R105K010
LMK212BJ105KG
GRM42-6X7R105K016
EMK316BJ105KL
TMK316BJ105KL
TDK
MuRata
Taiyo-Yuden
MuRata
Taiyo-Yuden
Taiyo-Yuden
2.2µF
“
0805
0805
1206
0-150 mA
“
“
X5R
X5R
X5R
GRM40X5R225K 6.3
C2012X5R0J225KT
EMK316BJ225ML
MuRata
TDK
Taiyo-Yuden
4.7µF
“
1206
1206
0-150 mA
“
X5R
X7R
GRM42-6X7R475K010
LMK316BJ475ML
MuRata
Taiyo-Yuden
Impala Linear Corporation
ILC7082 1.3
(408) 574-3939
www.impalalinear.com
April 1999
10
150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified TA T=25°C, VIN =VOUT(NOM), + 1V, ON/OFF pin tied to VIN
Output Voltage vs Temperature
3.015
Dropout Characteristics
3.4
V OUT = 3.0V
CO UT = 1µF (Ceramic)
3.01
VO UT = 3.3V
COUT = 1µF (Ceramic)
IOUT = 0mA
IOUT = 10mA
IOUT = 50mA
Output voltage (V)
3.3
VOU T (V)
3.005
3
3.2
2.995
IOUT = 100mA
IOUT = 150mA
3.1
2.99
2.985
3
-50
0
50
100
3
150
3.2
3.4
3.6
VIN (V)
Temperature (°C)
Temperature (°C)
Dropout Voltage vs Temperature
Dropout Voltage vs I OU T
250
IO UT = 150mA
VOU T = 3.0V
VOU T = 3.0V
200
Dropout voltage (mV)
Dropout voltage (mV)
250
IO UT = 100mA
150
100
IOUT = 50mA
50
TA = 85°C
200
TA = 25°C
150
100
TA = –40°C
50
IOUT = 0mA
0
–40
25
0
85
0
Temperature (°C)
Ground Current vs Input Voltage
6
VIN (V)
V OUT = 3.0 V
IOUT = 10mA
COUT = 1µF (Ceramic)
IOU T = 50mA
125
IOU T = 150mA
150
5
VIN: tr/tf < 1 µs
VO UT = 3.0V
COUT = 2.2 µF (Ceramic)
IO UT = 100 mA
IOUT = 0mA
100
V OUT (V)
4
IOUT = 100mA
75
50
3.01
3.00
2.99
2.98
2
4
6
8
10
12
14
5µs/div
VIN (V)
Impala Linear Corporation
ILC7082 1.3
100
Line Transient Response
150
I GN D (µA)
50
Output Current (mA)
(408) 574-3939
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April 1999
11
150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified TA T=25°C, VIN =VOUT(NOM), + 1V, ON/OFF pin tied to VIN
Load Transient Response
VOU T (V)
3.15
3.10
Short Circuit Current
V OUT = 3.0V
CO UT = 1 µF || 0.47 µF (Ceramic)
1.5
3.05
I SC (A)
3.00
IOUT (mA)
2.95
0.5
100
0
1
5
VOU T = 2.8V
IO U T = 10mA
CO U T = 1µF
Without C NO IS E Capacitor
0
On/Off Transient Response
VON/OFF (V)
15
10
5ms/div
t=0
On/Off Transient Response
15
10
5
3
3
2
2
1
0
VO U T = 2.8V
IO U T = 150mA Without C NO IS E Capacitor
CO U T = 1µF
0
V OUT (V)
VON/OFF (V)
Output Shorted to Gnd
at time, t = 0
1.0
100µs/div
V OUT (V)
Thermal Cycling
V IN = 4V
1
0
100µS/div
100µS/div
VON /OF F (V)
10
On/Off Transient Response
VOU T = 2.8V
I OU T = 10mA
C NO ISE = 0.01µF, C OU T = 1µF
5
15
10
5
0
0
3
3
2
2
VOUT (V)
VOUT (V)
VON /OF F (V)
On/Off Transient Response
15
1
0
VO UT = 2.8V
IO U T = 150mA
CN OIS E = 0.01µF, CO UT = 1µF
1
0
5mS/div
Impala Linear Corporation
ILC7082 1.3
5mS/div
(408) 574-3939
www.impalalinear.com
April 1999
12
150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified TA T=25°C, VIN =VOUT(NOM), + 1V, ON/OFF pin tied to VIN
Spectral Noise Density
10
Spectral Noise Density
10
Noise (µV/Rt Hz)
VOU T = 2.8V
I OU T = 50mA
CN OI SE = 0.01µF
Noise (µV/Rt Hz)
1
CO UT = 1µF (Ceramic)
0.1
VO UT = 2.8V
CO U T = 2.2µF
CN O ISE = 0.01µF
1
I O UT = 50mA, 100mA or 150 mA
0.1
CO U T = 2.2µF or 4.7µF (Ceramic)
0.01
0.01
IO U T = 1 mA
CO UT = 10µF (Ceramic)
0.001
0.001
10
100
1K
10K
100K
1M
10M
10
100
1K
Frequency (Hz)
Output Noise Voltage vs. C NOISE
Output Noise Voltage vs. CNOISE
60
50
40
30
80
VO U T = 3V
IO U T = 10mA
CO UT = 4.7µF (Ceramic )
CN O ISE = 1.2nF
70
5.6nF
Noise (µVrms)
Noise (µVrms)
70
8.2nF
0.039µF
0.047µF
20
0.022µF
60
50
40
5.6nF
8.2nF
0.039µF
30
20
0.01µF
10
0.047µF
100 Hz–
100 KHz
300 Hz–
50 KHz
0.022µF
0.016µF
10
0
100 Hz–
50 KHz
0
300 Hz–
100 KHz
100 Hz–
50 KHz
100 Hz–
100 KHz
Freq Band
80
CO U T = 4.7µF
CO U T = 10µF
60
CO U T = 1µF
60
CO UT = 2.2µF
CO UT = 4.7µF
50
40
30
CO UT = 1µF
C OU T = 10µF
10
0
0
10
100
1K
Impala Linear Corporation
ILC7082 1.3
VOU T = 2.8V
I OU T = 150mA
70
20
C OU T = 2.2µF
20
Ripple Rejection (dB)
Ripple Rejection (dB)
VO UT = 3V
I O UT = 10mA
40
300 Hz–
100 KHz
Ripple Rejection vs. Frequency
Ripple Rejection vs. Frequency
80
300 Hz–
50 KHz
Freq Band
120
100
1M
90
VO UT = 3V
I O UT = 10mA
CO U T = 2.2µF(Ceramic)
CN OI SE = 1.2nF
100K
Frequency (Hz)
90
80
10K
10K
100K
1M
10M
(408) 574-3939
10
100
1K
www.impalalinear.com
10K
100K
1M
April 1999
13
150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
SOT-23 PACKAGE MARKINGS
ILC7082AIM5-XX
Output Voltage (V)
Grade
Order Information
*Package
Markings
EAXX
EJXX
Supplied As
*Package
Markings
7082
AIK285
XX
7082
AIK33
XX
Supplied As
2.8
A
ILC7082AIM5-28
3k units on tape and reel
2.85
A
ILC7082AIM5-285
3k units on tape and reel
EBXX
3.0
A
ILC7082AIM5-30
3k units on tape and reel
EHXX
3.1
A
ILC7082AIM5-31
3k units on tape and reel
ECXX
3.3
A
ILC7082AIM5-33
3k units on tape and reel
EDXX
3.6
A
ILC7082AIM5-36
3k units on tape and reel
EGXX
4.7
A
ILC7082AIM5-47
3k units on tape and reel
EEXX
5.0
A
ILC7082AIM5-50
3k units on tape and reel
EFXX
Adj
A
ILC7082AIM5-Adj
3k units on tape and reel
*Note: First two characters identify the product and the last two identify the date code
Output Voltage (V)
Grade
2.85
A
ILC7082AIM5-285
3.3
A
ILC7082AIM5-33
Impala Linear Corporation
ILC7082 1.3
Order Information
(408) 574-3939
www.impalalinear.com
2500 units on tape and
reel
2500 units on tape and
reel
April 1999
14
150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
Package Outline Dimensions Dimensions shown in mm and (inches).
8-Lead plastic surface mount (SOIC)
Impala Linear Corporation
ILC7082 1.3
(408) 574-3939
www.impalalinear.com
April 1999
15
150mA SOT-23 Ultra Low Noise CMOS RF-LDO™ Regulator
Package Outline Dimensions Dimensions shown in inches and (mm).
5-Lead plastic surface mount (SOT-23-5)
Devices sold by Impala Linear Corporation are covered by the warranty and patent indemnification provisions appearing
in its Terms of Sale only. Impala Linear Corporation makes no warranty, express, statutory, implied, or by description
regarding the information set forth herein or regarding the freedom of the described devices from patent infringement.
Impala Linear Corporation makes no warranty of merchantability or fitness for any purpose. Impala Linear Corporation
reserves the right to discontinue production and change specifications and prices at any time and without notice.
This product is intended for use in normal commercial applications. Applications requiring an extended temperature
range, unusual environmental requirements, or high reliability applications, such as military and aerospace, are specifically not recommended without additional processing by Impala Linear Corporation.
Impala Linear Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an
Impala Linear Corporation product. No other circuits, patents, licenses are implied.
Impala Linear Corporation
ILC7082 1.3
(408) 574-3939
Life Support Policy
Impala Linear Corporation’s products are not authorized for use as critical components in life support devices or
systems.
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labelling, can be reasonably expected to result in a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be
reasonbly expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
www.impalalinear.com
April 1999
16
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